g) (gcc (Debian 8.3.0-6) 8.3.0) debug=y Thu Oct 22 18:09:08 UTC 2020 (XEN) Latest ChangeSet: Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116 (XEN) build-id: 09913c2aec27f2cb86bd0cb1f1a1a9377d738982 (XEN) Bootloader: GRUB 2.02+dfsg1-20+deb10u2 (XEN) Command line: placeholder conswitch=x watchdog noreboot async-show-all com1=115200,8n1 console=com1,vga dom0_mem=512M,max:512M ucode=scan hvm_fep=1 loglvl=all guest_loglvl=all no-real-mode edd=off (XEN) Xen image load base address: 0x61000000 (XEN) Video information: (XEN) VGA is graphics mode 1024x768, 32 bpp (XEN) Disc information: (XEN) Found 0 MBR signatures (XEN) Found 1 EDD information structures (XEN) CPU Vendor: Intel, Family 6 (0x6), Model 85 (0x55), Stepping 4 (raw 00050654) (XEN) EFI RAM map: (XEN) [0000000000000000, 000000000003dfff] (usable) (XEN) [000000000003e000, 000000000003ffff] (reserved) (XEN) [0000000000040000, 000000000009ffff] (usable) (XEN) [00000000000a0000, 00000000000fffff] (reserved) (XEN) [0000000000100000, 000000006a70efff] (usable) (XEN) [000000006a70f000, 000000006c80efff] (reserved) (XEN) [000000006c80f000, 000000006ca5efff] (usable) (XEN) [000000006ca5f000, 000000006d25efff] (ACPI NVS) (XEN) [000000006d25f000, 000000006f319fff] (reserved) (XEN) [000000006f31a000, 000000006f7fffff] (usable) (XEN) [000000006f800000, 000000008fffffff] (reserved) (XEN) [00000000fd000000, 00000000fe7fffff] (reserved) (XEN) [00000000fed20000, 00000000fed44fff] (reserved) (XEN) [00000000ff000000, 00000000ffffffff] (reserved) (XEN) [0000000100000000, 000000087fffffff] (usable) (XEN) ACPI: RSDP 6CA5F000, 0024 (r2 ORACLE) (XEN) ACPI: XSDT 6CA5F0E0, 013C (r1 ORACLE X7-2 41060300 AMI 10013) (XEN) ACPI: FACP 6CA7C3F0, 0114 (r6 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: DSDT 6CA5F2B0, 1D139 (r2 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: FACS 6D25D080, 0040 (XEN) ACPI: FPDT 6CA7C508, 0044 (r1 ORACLE X7-2 41060300 AMI 10013) (XEN) ACPI: FIDT 6CA7C550, 009C (r1 ORACLE X7-2 41060300 AMI 10013) (XEN) ACPI: SPMI 6CA7C5F0, 0041 (r5 ORACLE X7-2 41060300 AMI. 0) (XEN) ACPI: OEMS 6CA7C638, 1C2B (r1 ORACLE X7-2 41060300 ORCL 1) (XEN) ACPI: UEFI 6CA7E268, 005C (r1 ORACLE X7-2 41060300 0) (XEN) ACPI: UEFI 6CA7E2C8, 0042 (r1 ORACLE X7-2 41060300 1000013) (XEN) ACPI: MCFG 6CA7E310, 003C (r1 ORACLE X7-2 41060300 MSFT 97) (XEN) ACPI: BDAT 6CA7E350, 0030 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: HPET 6CA7E380, 0038 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: APIC 6CA7E3B8, 0552 (r3 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: MIGT 6CA7E910, 0040 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: MSCT 6CA7E950, 0090 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: NFIT 6CA7E9E0, 18028 (r1 ORACLE X7-2 41060300 0) (XEN) ACPI: PCAT 6CA96A08, 0048 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: PCCT 6CA96A50, 006E (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: PMTT 6CA96AC0, 02B0 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: RASF 6CA96D70, 0030 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: SLIT 6CA96DA0, 0030 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: SRAT 6CA96DD0, 2830 (r3 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: SVOS 6CA99600, 0032 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: WDDT 6CA99638, 0040 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: OEM4 6CA99678, A27C4 (r2 INTEL CPU CST 41060300 INTL 20140828) (XEN) ACPI: OEM1 6CB3BE40, 2A2C4 (r2 INTEL CPU EIST 41060300 INTL 20140828) (XEN) ACPI: SSDT 6CB66108, 33C30 (r2 INTEL SSDT PM 41060300 INTL 20140828) (XEN) ACPI: SSDT 6CB99D38, 065B (r2 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: SPCR 6CB9A398, 0050 (r2 ORACLE X7-2 41060300 AMI. 5000C) (XEN) ACPI: DBG2 6CB9A3E8, 0089 (r0 ORACLE X7-2 41060300 MSFT 10013) (XEN) ACPI: TPM2 6CB9A478, 0034 (r3 ORACLE X7-2 41060300 AMI 0) (XEN) ACPI: SSDT 6CB9A4B0, 2AF6 (r2 INTEL SpsNm 41060300 INTL 20140828) (XEN) ACPI: DMAR 6CB9CFA8, 02F0 (r1 ORACLE X7-2 41060300 INTL 20091013) (XEN) ACPI: HEST 6CB9D298, 013C (r1 ORACLE X7-2 41060300 INTL 1) (XEN) ACPI: BERT 6CB9D3D8, 0030 (r1 ORACLE X7-2 41060300 INTL 1) (XEN) ACPI: ERST 6CB9D408, 0230 (r1 ORACLE X7-2 41060300 INTL 1) (XEN) ACPI: EINJ 6CB9D638, 0150 (r1 ORACLE X7-2 41060300 INTL 1) (XEN) System RAM: 32429MB (33208204kB) (XEN) SRAT: PXM 0 -> APIC 00 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 02 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 04 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 06 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 08 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 10 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 12 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 14 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 16 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 18 -> Node 0 (XEN) SRAT: PXM 1 -> APIC 20 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 22 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 24 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 26 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 28 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 30 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 32 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 34 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 36 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 38 -> Node 1 (XEN) SRAT: PXM 0 -> APIC 01 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 03 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 05 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 07 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 09 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 11 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 13 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 15 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 17 -> Node 0 (XEN) SRAT: PXM 0 -> APIC 19 -> Node 0 (XEN) SRAT: PXM 1 -> APIC 21 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 23 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 25 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 27 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 29 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 31 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 33 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 35 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 37 -> Node 1 (XEN) SRAT: PXM 1 -> APIC 39 -> Node 1 (XEN) SRAT: Node 0 PXM 0 0-80000000 (XEN) SRAT: Node 0 PXM 0 100000000-480000000 (XEN) SRAT: Node 1 PXM 1 480000000-880000000 (XEN) NUMA: Using 19 for the hash shift. (XEN) Domain heap initialised DMA width 32 bits (XEN) vesafb: framebuffer at 0x000000009b000000, mapped to 0xffff82c000201000, using 3072k, total 3072k (XEN) vesafb: mode is 1024x768x32, linelength=4096, font 8x14 (XEN) vesafb: Truecolor: size=8:8:8:8, shift=24:16:8:0 (XEN) SMBIOS 3.0 present. (XEN) Using APIC driver default (XEN) ACPI: PM-Timer IO Port: 0x508 (24 bits) (XEN) ACPI: v5 SLEEP INFO: control[0:0], status[0:0] (XEN) ACPI: SLEEP INFO: pm1x_cnt[1:504,1:0], pm1x_evt[1:500,1:0] (XEN) ACPI: 32/64X FACS address mismatch in FADT - 6d25d080/0000000000000000, using 32 (XEN) ACPI: wakeup_vec[6d25d08c], vec_size[20] (XEN) ACPI: Local APIC address 0xfee00000 (XEN) ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) (XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled) (XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x04] enabled) (XEN) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x06] enabled) (XEN) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x08] enabled) (XEN) ACPI: LAPIC (acpi_id[0x10] lapic_id[0x10] enabled) (XEN) ACPI: LAPIC (acpi_id[0x12] lapic_id[0x12] enabled) (XEN) ACPI: LAPIC (acpi_id[0x14] lapic_id[0x14] enabled) (XEN) ACPI: LAPIC (acpi_id[0x16] lapic_id[0x16] enabled) (XEN) ACPI: LAPIC (acpi_id[0x18] lapic_id[0x18] enabled) (XEN) ACPI: LAPIC (acpi_id[0x38] lapic_id[0x20] enabled) (XEN) ACPI: LAPIC (acpi_id[0x3a] lapic_id[0x22] enabled) (XEN) ACPI: LAPIC (acpi_id[0x3c] lapic_id[0x24] enabled) (XEN) ACPI: LAPIC (acpi_id[0x3e] lapic_id[0x26] enabled) (XEN) ACPI: LAPIC (acpi_id[0x40] lapic_id[0x28] enabled) (XEN) ACPI: LAPIC (acpi_id[0x48] lapic_id[0x30] enabled) (XEN) ACPI: LAPIC (acpi_id[0x4a] lapic_id[0x32] enabled) (XEN) ACPI: LAPIC (acpi_id[0x4c] lapic_id[0x34] enabled) (XEN) ACPI: LAPIC (acpi_id[0x4e] lapic_id[0x36] enabled) (XEN) ACPI: LAPIC (acpi_id[0x50] lapic_id[0x38] enabled) (XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) (XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x03] enabled) (XEN) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x05] enabled) (XEN) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x07] enabled) (XEN) ACPI: LAPIC (acpi_id[0x09] lapic_id[0x09] enabled) (XEN) ACPI: LAPIC (acpi_id[0x11] lapic_id[0x11] enabled) (XEN) ACPI: LAPIC (acpi_id[0x13] lapic_id[0x13] enabled) (XEN) ACPI: LAPIC (acpi_id[0x15] lapic_id[0x15] enabled) (XEN) ACPI: LAPIC (acpi_id[0x17] lapic_id[0x17] enabled) (XEN) ACPI: LAPIC (acpi_id[0x19] lapic_id[0x19] enabled) (XEN) ACPI: LAPIC (acpi_id[0x39] lapic_id[0x21] enabled) (XEN) ACPI: LAPIC (acpi_id[0x3b] lapic_id[0x23] enabled) (XEN) ACPI: LAPIC (acpi_id[0x3d] lapic_id[0x25] enabled) (XEN) ACPI: LAPIC (acpi_id[0x3f] lapic_id[0x27] enabled) (XEN) ACPI: LAPIC (acpi_id[0x41] lapic_id[0x29] enabled) (XEN) ACPI: LAPIC (acpi_id[0x49] lapic_id[0x31] enabled) (XEN) ACPI: LAPIC (acpi_id[0x4b] lapic_id[0x33] enabled) (XEN) ACPI: LAPIC (acpi_id[0x4d] lapic_id[0x35] enabled) (XEN) ACPI: LAPIC (acpi_id[0x4f] lapic_id[0x37] enabled) (XEN) ACPI: LAPIC (acpi_id[0x51] lapic_id[0x39] enabled) (XEN) ACPI: LAPIC_NMI (acpi_id[0xff] dfl edge lint[0x1]) (XEN) Overriding APIC driver with bigsmp (XEN) ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0]) (XEN) IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-23 (XEN) ACPI: IOAPIC (id[0x09] address[0xfec01000] gsi_base[24]) (XEN) IOAPIC[1]: apic_id 9, version 32, address 0xfec01000, GSI 24-31 (XEN) ACPI: IOAPIC (id[0x0a] address[0xfec08000] gsi_base[32]) (XEN) IOAPIC[2]: apic_id 10, version 32, address 0xfec08000, GSI 32-39 (XEN) ACPI: IOAPIC (id[0x0b] address[0xfec10000] gsi_base[40]) (XEN) IOAPIC[3]: apic_id 11, version 32, address 0xfec10000, GSI 40-47 (XEN) ACPI: IOAPIC (id[0x0c] address[0xfec18000] gsi_base[48]) (XEN) IOAPIC[4]: apic_id 12, version 32, address 0xfec18000, GSI 48-55 (XEN) ACPI: IOAPIC (id[0x0f] address[0xfec20000] gsi_base[72]) (XEN) IOAPIC[5]: apic_id 15, version 32, address 0xfec20000, GSI 72-79 (XEN) ACPI: IOAPIC (id[0x10] address[0xfec28000] gsi_base[80]) (XEN) IOAPIC[6]: apic_id 16, version 32, address 0xfec28000, GSI 80-87 (XEN) ACPI: IOAPIC (id[0x11] address[0xfec30000] gsi_base[88]) (XEN) IOAPIC[7]: apic_id 17, version 32, address 0xfec30000, GSI 88-95 (XEN) ACPI: IOAPIC (id[0x12] address[0xfec38000] gsi_base[96]) (XEN) IOAPIC[8]: apic_id 18, version 32, address 0xfec38000, GSI 96-103 (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) (XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) (XEN) ACPI: IRQ0 used by override. (XEN) ACPI: IRQ2 used by override. (XEN) ACPI: IRQ9 used by override. (XEN) Enabling APIC mode: Phys. Using 9 I/O APICs (XEN) ACPI: HPET id: 0x8086a701 base: 0xfed00000 (XEN) PCI: MCFG configuration 0: base 80000000 segment 0000 buses 00 - ff (XEN) PCI: MCFG area at 80000000 reserved in E820 (XEN) PCI: Using MCFG for segment 0000 bus 00-ff (XEN) Xen ERST support is initialized. (XEN) HEST: Table parsing has been initialized (XEN) Using ACPI (MADT) for SMP configuration information (XEN) SMP: Allowing 112 CPUs (72 hotplug CPUs) (XEN) IRQ limits: 104 GSI, 8216 MSI/MSI-X (XEN) Switched to APIC driver x2apic_cluster (XEN) microcode: CPU0 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) CPU0: TSC: ratio: 176 / 2 (XEN) CPU0: bus: 100 MHz base: 2200 MHz max: 3000 MHz (XEN) CPU0: 800 ... 2200 MHz (XEN) xstate: size: 0xa88 and states: 0x2ff (XEN) mce_intel.c:779: MCA Capability: firstbank 0, extended MCE MSR 0, BCAST, SER, CMCI (XEN) CMCI: threshold 0x2 too large for CPU0 bank 6, using 0x1 (XEN) CMCI: threshold 0x2 too large for CPU0 bank 9, using 0x1 (XEN) CMCI: threshold 0x2 too large for CPU0 bank 10, using 0x1 (XEN) CMCI: threshold 0x2 too large for CPU0 bank 11, using 0x1 (XEN) CPU0: Intel machine check reporting enabled (XEN) Speculative mitigation facilities: (XEN) Hardware features: IBRS/IBPB STIBP L1D_FLUSH SSBD MD_CLEAR (XEN) Compiled-in support: INDIRECT_THUNK SHADOW_PAGING (XEN) Xen settings: BTI-Thunk JMP, SPEC_CTRL: IBRS+ SSBD-, Other: IBPB L1D_FLUSH VERW BRANCH_HARDEN (XEN) L1TF: believed vulnerable, maxphysaddr L1D 46, CPUID 46, Safe address 300000000000 (XEN) Support for HVM VMs: MSR_SPEC_CTRL RSB EAGER_FPU MD_CLEAR (XEN) Support for PV VMs: MSR_SPEC_CTRL RSB EAGER_FPU MD_CLEAR (XEN) XPTI (64-bit PV only): Dom0 enabled, DomU enabled (with PCID) (XEN) PV L1TF shadowing: Dom0 disabled, DomU enabled (XEN) Using scheduler: SMP Credit Scheduler rev2 (credit2) (XEN) Initializing Credit2 scheduler (XEN) load_precision_shift: 18 (XEN) load_window_shift: 30 (XEN) underload_balance_tolerance: 0 (XEN) overload_balance_tolerance: -3 (XEN) runqueues arrangement: socket (XEN) cap enforcement granularity: 10ms (XEN) load tracking window length 1073741824 ns (XEN) Platform timer is 24.000MHz HPET (XEN) Detected 2194.867 MHz processor. (XEN) EFI memory map: (XEN) 0000000000000-0000000003fff type=2 attr=000000000000000f (XEN) 0000000004000-000000003dfff type=7 attr=000000000000000f (XEN) 000000003e000-000000003ffff type=6 attr=800000000000000f (XEN) 0000000040000-000000008ffff type=7 attr=000000000000000f (XEN) 0000000090000-000000009ffff type=2 attr=000000000000000f (XEN) 0000000100000-00000021cffff type=2 attr=000000000000000f (XEN) 00000021d0000-0000023560fff type=7 attr=000000000000000f (XEN) 0000023561000-00000359f7fff type=1 attr=000000000000000f (XEN) 00000359f8000-000004e1ddfff type=2 attr=000000000000000f (XEN) 000004e1de000-000004e2ddfff type=4 attr=000000000000000f (XEN) 000004e2de000-00000611fffff type=7 attr=000000000000000f (XEN) 0000061200000-00000615fafff type=2 attr=000000000000000f (XEN) 00000615fb000-0000061735fff type=7 attr=000000000000000f (XEN) 0000061736000-00000618acfff type=1 attr=000000000000000f (XEN) 00000618ad000-0000061a24fff type=2 attr=000000000000000f (XEN) 0000061a25000-0000061cf7fff type=1 attr=000000000000000f (XEN) 0000061cf8000-0000069939fff type=4 attr=000000000000000f (XEN) 000006993a000-0000069bfdfff type=7 attr=000000000000000f (XEN) 0000069bfe000-000006a70efff type=3 attr=000000000000000f (XEN) 000006a70f000-000006c80efff type=0 attr=000000000000000f (XEN) 000006c80f000-000006ca5efff type=7 attr=000000000000000f (XEN) 000006ca5f000-000006d25efff type=10 attr=000000000000000f (XEN) 000006d25f000-000006f155fff type=6 attr=800000000000000f (XEN) 000006f156000-000006f319fff type=5 attr=800000000000000f (XEN) 000006f31a000-000006f798fff type=4 attr=000000000000000f (XEN) 000006f799000-000006f799fff type=3 attr=000000000000000f (XEN) 000006f79a000-000006f7fffff type=4 attr=000000000000000f (XEN) 0000100000000-000087fffffff type=7 attr=000000000000000f (XEN) 00000000a0000-00000000fffff type=0 attr=0000000000000000 (XEN) 000006f800000-000007fffffff type=0 attr=0000000000000000 (XEN) 0000080000000-000008fffffff type=11 attr=8000000000000001 (XEN) 00000fd000000-00000fe7fffff type=11 attr=800000000000100d (XEN) 00000fed20000-00000fed44fff type=11 attr=800000000000100d (XEN) 00000ff000000-00000ffffffff type=11 attr=800000000000100d (XEN) alt table ffff82d04048b3f0 -> ffff82d040499452 (XEN) Intel VT-d iommu 6 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 5 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 4 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 3 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 2 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 1 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 0 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d iommu 7 supported page sizes: 4kB, 2MB, 1GB (XEN) Intel VT-d Snoop Control enabled. (XEN) Intel VT-d Dom0 DMA Passthrough not enabled. (XEN) Intel VT-d Queued Invalidation enabled. (XEN) Intel VT-d Interrupt Remapping enabled. (XEN) Intel VT-d Posted Interrupt not enabled. (XEN) Intel VT-d Shared EPT tables enabled. (XEN) I/O virtualisation enabled (XEN) - Dom0 mode: Relaxed (XEN) Interrupt remapping enabled (XEN) nr_sockets: 5 (XEN) Enabled directed EOI with ioapic_ack_old on! (XEN) ENABLING IO-APIC IRQs (XEN) -> Using old ACK method (XEN) ..TIMER: vector=0xF0 apic1=0 pin1=2 apic2=-1 pin2=-1 (XEN) TSC deadline timer enabled (XEN) Defaulting to alternative key handling; send 'A' to switch to normal mode. (XEN) Allocated console ring of 512 KiB. (XEN) mwait-idle: MWAIT substates: 0x2020 (XEN) mwait-idle: v0.4.1 model 0x55 (XEN) mwait-idle: lapic_timer_reliable_states 0xffffffff (XEN) VMX: Supported advanced features: (XEN) - APIC MMIO access virtualisation (XEN) - APIC TPR shadow (XEN) - Extended Page Tables (EPT) (XEN) - Virtual-Processor Identifiers (VPID) (XEN) - Virtual NMI (XEN) - MSR direct-access bitmap (XEN) - Unrestricted Guest (XEN) - APIC Register Virtualization (XEN) - Virtual Interrupt Delivery (XEN) - Posted Interrupt Processing (XEN) - VMCS shadowing (XEN) - VM Functions (XEN) - Virtualisation Exceptions (XEN) - Page Modification Logging (XEN) - TSC Scaling (XEN) HVM: ASIDs enabled. (XEN) VMX: Disabling executable EPT superpages due to CVE-2018-12207 (XEN) HVM: VMX enabled (XEN) HVM: Hardware Assisted Paging (HAP) detected (XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB (XEN) alt table ffff82d04048b3f0 -> ffff82d040499452 (XEN) microcode: CPU2 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU4 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU6 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU8 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU10 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU12 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU14 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU16 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU18 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU20 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) CMCI: threshold 0x2 too large for CPU20 bank 6, using 0x1 (XEN) CMCI: threshold 0x2 too large for CPU20 bank 9, using 0x1 (XEN) CMCI: threshold 0x2 too large for CPU20 bank 10, using 0x1 (XEN) CMCI: threshold 0x2 too large for CPU20 bank 11, using 0x1 (XEN) microcode: CPU22 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU24 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU26 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU28 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU30 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU32 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU34 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU36 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) microcode: CPU38 updated from revision 0x200005e to 0x2006906, date = 2020-04-24 (XEN) Brought up 40 CPUs (XEN) Testing NMI watchdog on all CPUs: ok (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource (XEN) Adding cpu 0 to runqueue 0 (XEN) First cpu on runqueue, activating (XEN) Adding cpu 1 to runqueue 0 (XEN) Adding cpu 2 to runqueue 0 (XEN) Adding cpu 3 to runqueue 0 (XEN) Adding cpu 4 to runqueue 0 (XEN) Adding cpu 5 to runqueue 0 (XEN) Adding cpu 6 to runqueue 0 (XEN) Adding cpu 7 to runqueue 0 (XEN) Adding cpu 8 to runqueue 0 (XEN) Adding cpu 9 to runqueue 0 (XEN) Adding cpu 10 to runqueue 0 (XEN) Adding cpu 11 to runqueue 0 (XEN) Adding cpu 12 to runqueue 1 (XEN) First cpu on runqueue, activating (XEN) Adding cpu 13 to runqueue 1 (XEN) Adding cpu 14 to runqueue 1 (XEN) Adding cpu 15 to runqueue 1 (XEN) Adding cpu 16 to runqueue 1 (XEN) Adding cpu 17 to runqueue 1 (XEN) Adding cpu 18 to runqueue 1 (XEN) Adding cpu 19 to runqueue 1 (XEN) Adding cpu 20 to runqueue 2 (XEN) First cpu on runqueue, activating (XEN) Adding cpu 21 to runqueue 2 (XEN) Adding cpu 22 to runqueue 2 (XEN) Adding cpu 23 to runqueue 2 (XEN) Adding cpu 24 to runqueue 2 (XEN) Adding cpu 25 to runqueue 2 (XEN) Adding cpu 26 to runqueue 2 (XEN) Adding cpu 27 to runqueue 2 (XEN) Adding cpu 28 to runqueue 2 (XEN) Adding cpu 29 to runqueue 2 (XEN) Adding cpu 30 to runqueue 2 (XEN) Adding cpu 31 to runqueue 2 (XEN) Adding cpu 32 to runqueue 3 (XEN) First cpu on runqueue, activating (XEN) Adding cpu 33 to runqueue 3 (XEN) Adding cpu 34 to runqueue 3 (XEN) Adding cpu 35 to runqueue 3 (XEN) Adding cpu 36 to runqueue 3 (XEN) Adding cpu 37 to runqueue 3 (XEN) Adding cpu 38 to runqueue 3 (XEN) Adding cpu 39 to runqueue 3 (XEN) mcheck_poll: Machine check polling timer started. (XEN) Running stub recovery selftests... (XEN) Fixup #UD[0000]: ffff82d07fffe040 [ffff82d07fffe040] -> ffff82d040396a01 (XEN) Fixup #GP[0000]: ffff82d07fffe041 [ffff82d07fffe041] -> ffff82d040396a01 (XEN) Fixup #SS[0000]: ffff82d07fffe040 [ffff82d07fffe040] -> ffff82d040396a01 (XEN) Fixup #BP[0000]: ffff82d07fffe041 [ffff82d07fffe041] -> ffff82d040396a01 (XEN) NX (Execute Disable) protection active (XEN) Dom0 has maximum 1352 PIRQs (XEN) *** Building a PV Dom0 *** (XEN) ELF: phdr: paddr=0x1000000 memsz=0x1097000 (XEN) ELF: phdr: paddr=0x2200000 memsz=0x507000 (XEN) ELF: phdr: paddr=0x2707000 memsz=0x21c18 (XEN) ELF: phdr: paddr=0x2729000 memsz=0x303000 (XEN) ELF: memory: 0x1000000 -> 0x2a2c000 (XEN) ELF: note: GUEST_OS = "linux" (XEN) ELF: note: GUEST_VERSION = "2.6" (XEN) ELF: note: XEN_VERSION = "xen-3.0" (XEN) ELF: note: VIRT_BASE = 0xffffffff80000000 (XEN) ELF: note: INIT_P2M = 0x8000000000 (XEN) ELF: note: ENTRY = 0xffffffff82729180 (XEN) ELF: note: HYPERCALL_PAGE = 0xffffffff81001000 (XEN) ELF: note: FEATURES = "!writable_page_tables|pae_pgdir_above_4gb" (XEN) ELF: note: SUPPORTED_FEATURES = 0x8801 (XEN) ELF: note: PAE_MODE = "yes" (XEN) ELF: note: LOADER = "generic" (XEN) ELF: note: unknown (0xd) (XEN) ELF: note: SUSPEND_CANCEL = 0x1 (XEN) ELF: note: MOD_START_PFN = 0x1 (XEN) ELF: note: HV_START_LOW = 0xffff800000000000 (XEN) ELF: note: PADDR_OFFSET = 0 (XEN) ELF: note: PHYS32_ENTRY = 0x10003b0 (XEN) ELF: Found PVH image (XEN) ELF: addresses: (XEN) virt_base = 0xffffffff80000000 (XEN) elf_paddr_offset = 0x0 (XEN) virt_offset = 0xffffffff80000000 (XEN) virt_kstart = 0xffffffff81000000 (XEN) virt_kend = 0xffffffff82a2c000 (XEN) virt_entry = 0xffffffff82729180 (XEN) p2m_base = 0x8000000000 (XEN) Xen kernel: 64-bit, lsb, compat32 (XEN) Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x2a2c000 (XEN) PHYSICAL MEMORY ARRANGEMENT: (XEN) Dom0 alloc.: 0000000864000000->0000000868000000 (108224 pages to be allocated) (XEN) Init. ramdisk: 000000087e6c0000->000000087ffff82b (XEN) VIRTUAL MEMORY ARRANGEMENT: (XEN) Loaded kernel: ffffffff81000000->ffffffff82a2c000 (XEN) Init. ramdisk: 0000000000000000->0000000000000000 (XEN) Phys-Mach map: 0000008000000000->0000008000100000 (XEN) Start info: ffffffff82a2c000->ffffffff82a2c4b8 (XEN) Xenstore ring: 0000000000000000->0000000000000000 (XEN) Console ring: 0000000000000000->0000000000000000 (XEN) Page tables: ffffffff82a2d000->ffffffff82a46000 (XEN) Boot stack: ffffffff82a46000->ffffffff82a47000 (XEN) TOTAL: ffffffff80000000->ffffffff82c00000 (XEN) ENTRY ADDRESS: ffffffff82729180 (XEN) Dom0 has maximum 40 VCPUs (XEN) ELF: phdr 0 at 0xffffffff81000000 -> 0xffffffff82097000 (XEN) ELF: phdr 1 at 0xffffffff82200000 -> 0xffffffff82707000 (XEN) ELF: phdr 2 at 0xffffffff82707000 -> 0xffffffff82728c18 (XEN) ELF: phdr 3 at 0xffffffff82729000 -> 0xffffffff82861000 (XEN) Initial low memory virq threshold set at 0x4000 pages. (XEN) Scrubbing Free RAM in background (XEN) Std. Loglevel: All (XEN) Guest Loglevel: All (XEN) *************************************************** (XEN) Booted on L1TF-vulnerable hardware with SMT/Hyperthreading (XEN) enabled. Please assess your configuration and choose an (XEN) explicit 'smt=' setting. See XSA-273. (XEN) *************************************************** (XEN) Booted on MLPDS/MFBDS-vulnerable hardware with SMT/Hyperthreading (XEN) enabled. Mitigations will not be fully effective. Please (XEN) choose an explicit smt= setting. See XSA-297. (XEN) *************************************************** (XEN) WARNING: HVM FORCED EMULATION PREFIX IS AVAILABLE (XEN) This option is *ONLY* intended to aid testing of Xen. (XEN) It has implications on the security of the system. (XEN) Please *DO NOT* use this in production. (XEN) *************************************************** (XEN) 3... 2... 1... (XEN) Xen is relinquishing VGA console. (XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input) (XEN) Freed 556kB init memory (XEN) d0: Forcing write emulation on MFNs 80000-8ffff (XEN) PCI add device 0000:00:00.0 (XEN) PCI add device 0000:00:04.0 (XEN) PCI add device 0000:00:04.1 (XEN) PCI add device 0000:00:04.2 (XEN) PCI add device 0000:00:04.3 (XEN) PCI add device 0000:00:04.4 (XEN) PCI add device 0000:00:04.5 (XEN) PCI add device 0000:00:04.6 (XEN) PCI add device 0000:00:04.7 (XEN) PCI add device 0000:00:05.0 (XEN) PCI add device 0000:00:05.2 (XEN) PCI add device 0000:00:05.4 (XEN) PCI add device 0000:00:08.0 (XEN) PCI add device 0000:00:08.1 (XEN) PCI add device 0000:00:08.2 (XEN) PCI add device 0000:00:11.0 (XEN) PCI add device 0000:00:14.0 (XEN) PCI add device 0000:00:14.2 (XEN) PCI add device 0000:00:17.0 (XEN) PCI add device 0000:00:1c.0 (XEN) PCI add device 0000:00:1c.4 (XEN) PCI add device 0000:00:1c.5 (XEN) PCI add device 0000:00:1f.0 (XEN) PCI add device 0000:00:1f.2 (XEN) PCI add device 0000:00:1f.4 (XEN) PCI add device 0000:00:1f.5 (XEN) PCI add device 0000:02:00.0 (XEN) PCI add device 0000:03:00.0 (XEN) PCI add device 0000:04:00.0 (XEN) PCI add device 0000:17:00.0 (XEN) PCI add device 0000:17:02.0 (XEN) PCI add device 0000:17:03.0 (XEN) PCI add device 0000:17:05.0 (XEN) PCI add device 0000:17:05.2 (XEN) PCI add device 0000:17:05.4 (XEN) PCI add device 0000:17:08.0 (XEN) PCI add device 0000:17:08.1 (XEN) PCI add device 0000:17:08.2 (XEN) PCI add device 0000:17:08.3 (XEN) PCI add device 0000:17:08.4 (XEN) PCI add device 0000:17:08.5 (XEN) PCI add device 0000:17:08.6 (XEN) PCI add device 0000:17:08.7 (XEN) PCI add device 0000:17:09.0 (XEN) PCI add device 0000:17:09.1 (XEN) PCI add device 0000:17:0e.0 (XEN) PCI add device 0000:17:0e.1 (XEN) PCI add device 0000:17:0e.2 (XEN) PCI add device 0000:17:0e.3 (XEN) PCI add device 0000:17:0e.4 (XEN) PCI add device 0000:17:0e.5 (XEN) PCI add device 0000:17:0e.6 (XEN) PCI add device 0000:17:0e.7 (XEN) PCI add device 0000:17:0f.0 (XEN) PCI add device 0000:17:0f.1 (XEN) PCI add device 0000:17:1d.0 (XEN) PCI add device 0000:17:1d.1 (XEN) PCI add device 0000:17:1d.2 (XEN) PCI add device 0000:17:1d.3 (XEN) PCI add device 0000:17:1e.0 (XEN) PCI add device 0000:17:1e.1 (XEN) PCI add device 0000:17:1e.2 (XEN) PCI add device 0000:17:1e.3 (XEN) PCI add device 0000:17:1e.4 (XEN) PCI add device 0000:17:1e.5 (XEN) PCI add device 0000:17:1e.6 (XEN) PCI add device 0000:18:00.0 (XEN) PCI add device 0000:18:00.1 (XEN) PCI add device 0000:3a:00.0 (XEN) PCI add device 0000:3a:05.0 (XEN) PCI add device 0000:3a:05.2 (XEN) PCI add device 0000:3a:05.4 (XEN) PCI add device 0000:3a:08.0 (XEN) PCI add device 0000:3a:09.0 (XEN) PCI add device 0000:3a:0a.0 (XEN) PCI add device 0000:3a:0a.1 (XEN) PCI add device 0000:3a:0a.2 (XEN) PCI add device 0000:3a:0a.3 (XEN) PCI add device 0000:3a:0a.4 (XEN) PCI add device 0000:3a:0a.5 (XEN) PCI add device 0000:3a:0a.6 (XEN) PCI add device 0000:3a:0a.7 (XEN) PCI add device 0000:3a:0b.0 (XEN) PCI add device 0000:3a:0b.1 (XEN) PCI add device 0000:3a:0b.2 (XEN) PCI add device 0000:3a:0b.3 (XEN) PCI add device 0000:3a:0c.0 (XEN) PCI add device 0000:3a:0c.1 (XEN) PCI add device 0000:3a:0c.2 (XEN) PCI add device 0000:3a:0c.3 (XEN) PCI add device 0000:3a:0c.4 (XEN) PCI add device 0000:3a:0c.5 (XEN) PCI add device 0000:3a:0c.6 (XEN) PCI add device 0000:3a:0c.7 (XEN) PCI add device 0000:3a:0d.0 (XEN) PCI add device 0000:3a:0d.1 (XEN) PCI add device 0000:3a:0d.2 (XEN) PCI add device 0000:3a:0d.3 (XEN) PCI add device 0000:5d:00.0 (XEN) PCI add device 0000:5d:02.0 (XEN) PCI add device 0000:5d:05.0 (XEN) PCI add device 0000:5d:05.2 (XEN) PCI add device 0000:5d:05.4 (XEN) PCI add device 0000:5d:0e.0 (XEN) PCI add device 0000:5d:0e.1 (XEN) PCI add device 0000:5d:0f.0 (XEN) PCI add device 0000:5d:0f.1 (XEN) PCI add device 0000:5d:12.0 (XEN) PCI add device 0000:5d:12.1 (XEN) PCI add device 0000:5d:12.2 (XEN) PCI add device 0000:5d:15.0 (XEN) PCI add device 0000:5d:16.0 (XEN) PCI add device 0000:5d:16.4 (XEN) PCI add device 0000:65:00.0 (XEN) PCI add device 0000:80:04.0 (XEN) PCI add device 0000:80:04.1 (XEN) PCI add device 0000:80:04.2 (XEN) PCI add device 0000:80:04.3 (XEN) PCI add device 0000:80:04.4 (XEN) PCI add device 0000:80:04.5 (XEN) PCI add device 0000:80:04.6 (XEN) PCI add device 0000:80:04.7 (XEN) PCI add device 0000:80:05.0 (XEN) PCI add device 0000:80:05.2 (XEN) PCI add device 0000:80:05.4 (XEN) PCI add device 0000:80:08.0 (XEN) PCI add device 0000:80:08.1 (XEN) PCI add device 0000:80:08.2 (XEN) PCI add device 0000:85:00.0 (XEN) PCI add device 0000:85:01.0 (XEN) PCI add device 0000:85:02.0 (XEN) PCI add device 0000:85:03.0 (XEN) PCI add device 0000:85:05.0 (XEN) PCI add device 0000:85:05.2 (XEN) PCI add device 0000:85:05.4 (XEN) PCI add device 0000:85:08.0 (XEN) PCI add device 0000:85:08.1 (XEN) PCI add device 0000:85:08.2 (XEN) PCI add device 0000:85:08.3 (XEN) PCI add device 0000:85:08.4 (XEN) PCI add device 0000:85:08.5 (XEN) PCI add device 0000:85:08.6 (XEN) PCI add device 0000:85:08.7 (XEN) PCI add device 0000:85:09.0 (XEN) PCI add device 0000:85:09.1 (XEN) PCI add device 0000:85:0e.0 (XEN) PCI add device 0000:85:0e.1 (XEN) PCI add device 0000:85:0e.2 (XEN) PCI add device 0000:85:0e.3 (XEN) PCI add device 0000:85:0e.4 (XEN) PCI add device 0000:85:0e.5 (XEN) PCI add device 0000:85:0e.6 (XEN) PCI add device 0000:85:0e.7 (XEN) PCI add device 0000:85:0f.0 (XEN) PCI add device 0000:85:0f.1 (XEN) PCI add device 0000:85:1d.0 (XEN) PCI add device 0000:85:1d.1 (XEN) PCI add device 0000:85:1d.2 (XEN) PCI add device 0000:85:1d.3 (XEN) PCI add device 0000:85:1e.0 (XEN) PCI add device 0000:85:1e.1 (XEN) PCI add device 0000:85:1e.2 (XEN) PCI add device 0000:85:1e.3 (XEN) PCI add device 0000:85:1e.4 (XEN) PCI add device 0000:85:1e.5 (XEN) PCI add device 0000:85:1e.6 (XEN) PCI add device 0000:ae:00.0 (XEN) PCI add device 0000:ae:05.0 (XEN) PCI add device 0000:ae:05.2 (XEN) PCI add device 0000:ae:05.4 (XEN) PCI add device 0000:ae:08.0 (XEN) PCI add device 0000:ae:09.0 (XEN) PCI add device 0000:ae:0a.0 (XEN) PCI add device 0000:ae:0a.1 (XEN) PCI add device 0000:ae:0a.2 (XEN) PCI add device 0000:ae:0a.3 (XEN) PCI add device 0000:ae:0a.4 (XEN) PCI add device 0000:ae:0a.5 (XEN) PCI add device 0000:ae:0a.6 (XEN) PCI add device 0000:ae:0a.7 (XEN) PCI add device 0000:ae:0b.0 (XEN) PCI add device 0000:ae:0b.1 (XEN) PCI add device 0000:ae:0b.2 (XEN) PCI add device 0000:ae:0b.3 (XEN) PCI add device 0000:ae:0c.0 (XEN) PCI add device 0000:ae:0c.1 (XEN) PCI add device 0000:ae:0c.2 (XEN) PCI add device 0000:ae:0c.3 (XEN) PCI add device 0000:ae:0c.4 (XEN) PCI add device 0000:ae:0c.5 (XEN) PCI add device 0000:ae:0c.6 (XEN) PCI add device 0000:ae:0c.7 (XEN) PCI add device 0000:ae:0d.0 (XEN) PCI add device 0000:ae:0d.1 (XEN) PCI add device 0000:ae:0d.2 (XEN) PCI add device 0000:ae:0d.3 (XEN) PCI add device 0000:d7:00.0 (XEN) PCI add device 0000:d7:02.0 (XEN) PCI add device 0000:d7:03.0 (XEN) PCI add device 0000:d7:05.0 (XEN) PCI add device 0000:d7:05.2 (XEN) PCI add device 0000:d7:05.4 (XEN) PCI add device 0000:d7:0e.0 (XEN) PCI add device 0000:d7:0e.1 (XEN) PCI add device 0000:d7:0f.0 (XEN) PCI add device 0000:d7:0f.1 (XEN) PCI add device 0000:d7:12.0 (XEN) PCI add device 0000:d7:12.1 (XEN) PCI add device 0000:d7:12.2 (XEN) PCI add device 0000:d7:15.0 (XEN) PCI add device 0000:d7:16.0 (XEN) PCI add device 0000:d7:16.4 (XEN) emul-priv-op.c:993:d0v39 RDMSR 0x0000064e unimplemented (XEN) emul-priv-op.c:993:d0v39 RDMSR 0x00000034 unimplemented (XEN) emul-priv-op.c:993:d0v39 RDMSR 0x00000606 unimplemented (XEN) d0: Forcing read-only access to MFN fed00 (XEN) HVM d1v0 save: CPU (XEN) HVM d1 save: PIC (XEN) HVM d1 save: IOAPIC (XEN) HVM d1v0 save: LAPIC (XEN) HVM d1v0 save: LAPIC_REGS (XEN) HVM d1 save: PCI_IRQ (XEN) HVM d1 save: ISA_IRQ (XEN) HVM d1 save: PCI_LINK (XEN) HVM d1 save: PIT (XEN) HVM d1 save: RTC (XEN) HVM d1 save: HPET (XEN) HVM d1 save: PMTIMER (XEN) HVM d1v0 save: MTRR (XEN) HVM d1 save: VIRIDIAN_DOMAIN (XEN) HVM d1v0 save: CPU_XSAVE (XEN) HVM d1v0 save: VIRIDIAN_VCPU (XEN) HVM d1v0 save: VMCE_VCPU (XEN) HVM d1v0 save: TSC_ADJUST (XEN) HVM d1v0 save: CPU_MSR (XEN) HVM1 restore: CPU 0 (d1) --- Xen Test Framework --- (d1) Environment: HVM 32bit (No paging) (d1) Test availability of HVM forced emulation prefix (d1) Test result: SUCCESS (XEN) HVM d2v0 save: CPU (XEN) HVM d2 save: PIC (XEN) HVM d2 save: IOAPIC (XEN) HVM d2v0 save: LAPIC (XEN) HVM d2v0 save: LAPIC_REGS (XEN) HVM d2 save: PCI_IRQ (XEN) HVM d2 save: ISA_IRQ (XEN) HVM d2 save: PCI_LINK (XEN) HVM d2 save: PIT (XEN) HVM d2 save: RTC (XEN) HVM d2 save: HPET (XEN) HVM d2 save: PMTIMER (XEN) HVM d2v0 save: MTRR (XEN) HVM d2 save: VIRIDIAN_DOMAIN (XEN) HVM d2v0 save: CPU_XSAVE (XEN) HVM d2v0 save: VIRIDIAN_VCPU (XEN) HVM d2v0 save: VMCE_VCPU (XEN) HVM d2v0 save: TSC_ADJUST (XEN) HVM d2v0 save: CPU_MSR (XEN) HVM2 restore: CPU 0 (d2) --- Xen Test Framework --- (d2) Environment: HVM 32bit (No paging) (d2) XTF Selftests (d2) Test: Exception Table (d2) Test: Exception Logging (d2) Test: Userspace execution (d2) Test: Unhandled Exception Hook (d2) Test: Exception Table Handler (d2) Test: Custom IDT entry (d2) Test: Driver basic initialisation (d2) Test: vsnprintf() with CRLF expansion (d2) Test: Xenstore read (d2) Found domid 2 (d2) Test result: SUCCESS (XEN) HVM d3v0 save: CPU (XEN) HVM d3 save: PIC (XEN) HVM d3 save: IOAPIC (XEN) HVM d3v0 save: LAPIC (XEN) HVM d3v0 save: LAPIC_REGS (XEN) HVM d3 save: PCI_IRQ (XEN) HVM d3 save: ISA_IRQ (XEN) HVM d3 save: PCI_LINK (XEN) HVM d3 save: PIT (XEN) HVM d3 save: RTC (XEN) HVM d3 save: HPET (XEN) HVM d3 save: PMTIMER (XEN) HVM d3v0 save: MTRR (XEN) HVM d3 save: VIRIDIAN_DOMAIN (XEN) HVM d3v0 save: CPU_XSAVE (XEN) HVM d3v0 save: VIRIDIAN_VCPU (XEN) HVM d3v0 save: VMCE_VCPU (XEN) HVM d3v0 save: TSC_ADJUST (XEN) HVM d3v0 save: CPU_MSR (XEN) HVM3 restore: CPU 0 (d3) --- Xen Test Framework --- (d3) Environment: HVM 32bit (PAE 3 levels) (d3) XTF Selftests (d3) Test: Exception Table (d3) Test: Exception Logging (d3) Test: Userspace execution (d3) Test: NULL unmapped (d3) Test: Unhandled Exception Hook (d3) Test: Exception Table Handler (d3) Test: Custom IDT entry (d3) Test: Driver basic initialisation (d3) Test: vsnprintf() with CRLF expansion (d3) Test: Xenstore read (d3) Found domid 3 (d3) Test result: SUCCESS (XEN) HVM d4v0 save: CPU (XEN) HVM d4 save: PIC (XEN) HVM d4 save: IOAPIC (XEN) HVM d4v0 save: LAPIC (XEN) HVM d4v0 save: LAPIC_REGS (XEN) HVM d4 save: PCI_IRQ (XEN) HVM d4 save: ISA_IRQ (XEN) HVM d4 save: PCI_LINK (XEN) HVM d4 save: PIT (XEN) HVM d4 save: RTC (XEN) HVM d4 save: HPET (XEN) HVM d4 save: PMTIMER (XEN) HVM d4v0 save: MTRR (XEN) HVM d4 save: VIRIDIAN_DOMAIN (XEN) HVM d4v0 save: CPU_XSAVE (XEN) HVM d4v0 save: VIRIDIAN_VCPU (XEN) HVM d4v0 save: VMCE_VCPU (XEN) HVM d4v0 save: TSC_ADJUST (XEN) HVM d4v0 save: CPU_MSR (XEN) HVM4 restore: CPU 0 (d4) --- Xen Test Framework --- (d4) Environment: HVM 32bit (PSE 2 levels) (d4) XTF Selftests (d4) Test: Exception Table (d4) Test: Exception Logging (d4) Test: Userspace execution (d4) Test: NULL unmapped (d4) Test: Unhandled Exception Hook (d4) Test: Exception Table Handler (d4) Test: Custom IDT entry (d4) Test: Driver basic initialisation (d4) Test: vsnprintf() with CRLF expansion (d4) Test: Xenstore read (d4) Found domid 4 (d4) Test result: SUCCESS (XEN) HVM d5v0 save: CPU (XEN) HVM d5 save: PIC (XEN) HVM d5 save: IOAPIC (XEN) HVM d5v0 save: LAPIC (XEN) HVM d5v0 save: LAPIC_REGS (XEN) HVM d5 save: PCI_IRQ (XEN) HVM d5 save: ISA_IRQ (XEN) HVM d5 save: PCI_LINK (XEN) HVM d5 save: PIT (XEN) HVM d5 save: RTC (XEN) HVM d5 save: HPET (XEN) HVM d5 save: PMTIMER (XEN) HVM d5v0 save: MTRR (XEN) HVM d5 save: VIRIDIAN_DOMAIN (XEN) HVM d5v0 save: CPU_XSAVE (XEN) HVM d5v0 save: VIRIDIAN_VCPU (XEN) HVM d5v0 save: VMCE_VCPU (XEN) HVM d5v0 save: TSC_ADJUST (XEN) HVM d5v0 save: CPU_MSR (XEN) HVM5 restore: CPU 0 (d5) --- Xen Test Framework --- (d5) Environment: HVM 64bit (Long mode 4 levels) (d5) XTF Selftests (d5) Test: Exception Table (d5) Test: Exception Logging (d5) Test: Userspace execution (d5) Test: NULL unmapped (d5) Test: Unhandled Exception Hook (d5) Test: Exception Table Handler (d5) Test: Custom IDT entry (d5) Test: Driver basic initialisation (d5) Test: vsnprintf() with CRLF expansion (d5) Test: Xenstore read (d5) Found domid 5 (d5) Test result: SUCCESS (d6) --- Xen Test Framework --- (d6) Environment: PV 32bit (PAE 3 levels) (d6) XTF Selftests (d6) Test: Exception Table (d6) Test: Exception Logging (d6) Test: Userspace execution (d6) Test: NULL unmapped (d6) Test: Unhandled Exception Hook (d6) Test: Exception Table Handler (d6) Test: Custom IDT entry (d6) Test: Driver basic initialisation (d6) Test: vsnprintf() with CRLF expansion (d6) Test: Xenstore read (d6) Found domid 6 (d6) Test result: SUCCESS (d7) --- Xen Test Framework --- (d7) Environment: PV 64bit (Long mode 4 levels) (d7) XTF Selftests (d7) Test: Exception Table (d7) Test: Exception Logging (d7) Test: Userspace execution (d7) Test: NULL unmapped (d7) Test: Unhandled Exception Hook (d7) Test: Exception Table Handler (d7) Test: Custom IDT entry (d7) Test: Driver basic initialisation (d7) Test: vsnprintf() with CRLF expansion (d7) Test: Xenstore read (d7) Found domid 7 (d7) Test result: SUCCESS (XEN) HVM d8v0 save: CPU (XEN) HVM d8 save: PIC (XEN) HVM d8 save: IOAPIC (XEN) HVM d8v0 save: LAPIC (XEN) HVM d8v0 save: LAPIC_REGS (XEN) HVM d8 save: PCI_IRQ (XEN) HVM d8 save: ISA_IRQ (XEN) HVM d8 save: PCI_LINK (XEN) HVM d8 save: PIT (XEN) HVM d8 save: RTC (XEN) HVM d8 save: HPET (XEN) HVM d8 save: PMTIMER (XEN) HVM d8v0 save: MTRR (XEN) HVM d8 save: VIRIDIAN_DOMAIN (XEN) HVM d8v0 save: CPU_XSAVE (XEN) HVM d8v0 save: VIRIDIAN_VCPU (XEN) HVM d8v0 save: VMCE_VCPU (XEN) HVM d8v0 save: TSC_ADJUST (XEN) HVM d8v0 save: CPU_MSR (XEN) HVM8 restore: CPU 0 (d8) --- Xen Test Framework --- (d8) Environment: HVM 32bit (No paging) (d8) Guest CPUID Faulting support (d8) Testing CPUID without faulting enabled (d8) Testing CPUID with faulting enabled (d8) Retesting CPUID without faulting enabled (d8) Test result: SUCCESS (XEN) HVM d9v0 save: CPU (XEN) HVM d9 save: PIC (XEN) HVM d9 save: IOAPIC (XEN) HVM d9v0 save: LAPIC (XEN) HVM d9v0 save: LAPIC_REGS (XEN) HVM d9 save: PCI_IRQ (XEN) HVM d9 save: ISA_IRQ (XEN) HVM d9 save: PCI_LINK (XEN) HVM d9 save: PIT (XEN) HVM d9 save: RTC (XEN) HVM d9 save: HPET (XEN) HVM d9 save: PMTIMER (XEN) HVM d9v0 save: MTRR (XEN) HVM d9 save: VIRIDIAN_DOMAIN (XEN) HVM d9v0 save: CPU_XSAVE (XEN) HVM d9v0 save: VIRIDIAN_VCPU (XEN) HVM d9v0 save: VMCE_VCPU (XEN) HVM d9v0 save: TSC_ADJUST (XEN) HVM d9v0 save: CPU_MSR (XEN) HVM9 restore: CPU 0 (d9) --- Xen Test Framework --- (d9) Environment: HVM 32bit (No paging) (d9) Invlpg tests (d9) Testing 'invlpg' in normally-faulting conditions (d9) Test: Mapped address (d9) Test: Unmapped address (d9) Test: NULL segment override (d9) Test: Past segment limit (d9) Test: Before expand-down segment limit (d9) Test result: SUCCESS (XEN) HVM d10v0 save: CPU (XEN) HVM d10 save: PIC (XEN) HVM d10 save: IOAPIC (XEN) HVM d10v0 save: LAPIC (XEN) HVM d10v0 save: LAPIC_REGS (XEN) HVM d10 save: PCI_IRQ (XEN) HVM d10 save: ISA_IRQ (XEN) HVM d10 save: PCI_LINK (XEN) HVM d10 save: PIT (XEN) HVM d10 save: RTC (XEN) HVM d10 save: HPET (XEN) HVM d10 save: PMTIMER (XEN) HVM d10v0 save: MTRR (XEN) HVM d10 save: VIRIDIAN_DOMAIN (XEN) HVM d10v0 save: CPU_XSAVE (XEN) HVM d10v0 save: VIRIDIAN_VCPU (XEN) HVM d10v0 save: VMCE_VCPU (XEN) HVM d10v0 save: TSC_ADJUST (XEN) HVM d10v0 save: CPU_MSR (XEN) HVM10 restore: CPU 0 (d10) --- Xen Test Framework --- (d10) Environment: HVM 32bit (No paging) (d10) Invlpg tests (d10) Testing 'invlpg' in normally-faulting conditions (d10) Test: Mapped address (d10) Test: Unmapped address (d10) Test: NULL segment override (d10) Test: Past segment limit (d10) Test: Before expand-down segment limit (d10) Test result: SUCCESS (XEN) HVM d11v0 save: CPU (XEN) HVM d11 save: PIC (XEN) HVM d11 save: IOAPIC (XEN) HVM d11v0 save: LAPIC (XEN) HVM d11v0 save: LAPIC_REGS (XEN) HVM d11 save: PCI_IRQ (XEN) HVM d11 save: ISA_IRQ (XEN) HVM d11 save: PCI_LINK (XEN) HVM d11 save: PIT (XEN) HVM d11 save: RTC (XEN) HVM d11 save: HPET (XEN) HVM d11 save: PMTIMER (XEN) HVM d11v0 save: MTRR (XEN) HVM d11 save: VIRIDIAN_DOMAIN (XEN) HVM d11v0 save: CPU_XSAVE (XEN) HVM d11v0 save: VIRIDIAN_VCPU (XEN) HVM d11v0 save: VMCE_VCPU (XEN) HVM d11v0 save: TSC_ADJUST (XEN) HVM d11v0 save: CPU_MSR (XEN) HVM11 restore: CPU 0 (d11) --- Xen Test Framework --- (d11) Environment: HVM 32bit (No paging) (d11) Live Patch Privilege Check (d11) test_upload: Xen correctly denied Live Patch calls (d11) test_list: Xen correctly denied Live Patch calls (d11) test_get: Xen correctly denied Live Patch calls (d11) test_action: Xen correctly denied Live Patch calls (d11) test_action: Xen correctly denied Live Patch calls (d11) test_action: Xen correctly denied Live Patch calls (d11) test_action: Xen correctly denied Live Patch calls (d11) Test result: SUCCESS (XEN) HVM d12v0 save: CPU (XEN) HVM d12 save: PIC (XEN) HVM d12 save: IOAPIC (XEN) HVM d12v0 save: LAPIC (XEN) HVM d12v0 save: LAPIC_REGS (XEN) HVM d12 save: PCI_IRQ (XEN) HVM d12 save: ISA_IRQ (XEN) HVM d12 save: PCI_LINK (XEN) HVM d12 save: PIT (XEN) HVM d12 save: RTC (XEN) HVM d12 save: HPET (XEN) HVM d12 save: PMTIMER (XEN) HVM d12v0 save: MTRR (XEN) HVM d12 save: VIRIDIAN_DOMAIN (XEN) HVM d12v0 save: CPU_XSAVE (XEN) HVM d12v0 save: VIRIDIAN_VCPU (XEN) HVM d12v0 save: VMCE_VCPU (XEN) HVM d12v0 save: TSC_ADJUST (XEN) HVM d12v0 save: CPU_MSR (XEN) HVM12 restore: CPU 0 (d12) --- Xen Test Framework --- (d12) Environment: HVM 32bit (No paging) (d12) Software interrupt emulation (d12) Test cpl0: all perms ok (d12) Testing int3 (d12) Testing int $3 (d12) Testing icebp (d12) Testing int $1 (d12) Testing into (d12) Test cpl0: p=0 (d12) Testing int3 (d12) Testing int $3 (d12) Testing icebp (d12) Testing int $1 (d12) Testing into (d12) Test cpl3: all perms ok (d12) Testing int3 (d12) Testing int $3 (d12) Testing icebp (d12) Testing int $1 (d12) Testing into (d12) Test cpl3: p=0 (d12) Testing int3 (d12) Testing int $3 (d12) Testing icebp (d12) Testing int $1 (d12) Testing into (d12) Test cpl3: dpl=0 (d12) Testing int3 (d12) Testing int $3 (d12) Testing icebp (d12) Testing int $1 (d12) Testing into (d12) Test result: SUCCESS (XEN) HVM d13v0 save: CPU (XEN) HVM d13 save: PIC (XEN) HVM d13 save: IOAPIC (XEN) HVM d13v0 save: LAPIC (XEN) HVM d13v0 save: LAPIC_REGS (XEN) HVM d13 save: PCI_IRQ (XEN) HVM d13 save: ISA_IRQ (XEN) HVM d13 save: PCI_LINK (XEN) HVM d13 save: PIT (XEN) HVM d13 save: RTC (XEN) HVM d13 save: HPET (XEN) HVM d13 save: PMTIMER (XEN) HVM d13v0 save: MTRR (XEN) HVM d13 save: VIRIDIAN_DOMAIN (XEN) HVM d13v0 save: CPU_XSAVE (XEN) HVM d13v0 save: VIRIDIAN_VCPU (XEN) HVM d13v0 save: VMCE_VCPU (XEN) HVM d13v0 save: TSC_ADJUST (XEN) HVM d13v0 save: CPU_MSR (XEN) HVM13 restore: CPU 0 (d13) --- Xen Test Framework --- (d13) Environment: HVM 32bit (No paging) (d13) User-Mode Instruction Prevention Tests (d13) UMIP is not supported, skip the rest of test (d13) Test result: SKIP (XEN) HVM d14v0 save: CPU (XEN) HVM d14 save: PIC (XEN) HVM d14 save: IOAPIC (XEN) HVM d14v0 save: LAPIC (XEN) HVM d14v0 save: LAPIC_REGS (XEN) HVM d14 save: PCI_IRQ (XEN) HVM d14 save: ISA_IRQ (XEN) HVM d14 save: PCI_LINK (XEN) HVM d14 save: PIT (XEN) HVM d14 save: RTC (XEN) HVM d14 save: HPET (XEN) HVM d14 save: PMTIMER (XEN) HVM d14v0 save: MTRR (XEN) HVM d14 save: VIRIDIAN_DOMAIN (XEN) HVM d14v0 save: CPU_XSAVE (XEN) HVM d14v0 save: VIRIDIAN_VCPU (XEN) HVM d14v0 save: VMCE_VCPU (XEN) HVM d14v0 save: TSC_ADJUST (XEN) HVM d14v0 save: CPU_MSR (XEN) HVM14 restore: CPU 0 (d14) --- Xen Test Framework --- (d14) Environment: HVM 32bit (No paging) (d14) XSA-122 PoC (d14) XENVER_extraversion: (d14) Got '-unstable' (d14) XENVER_compile_info: (d14) Got 'gcc (Debian 8.3.0-6) 8.3.0' (d14) 'osstest' (d14) 'test-lab.xenproject.org' (d14) 'Thu Oct 22 18:09:08 UTC 2020' (d14) XENVER_changeset: (d14) Got 'Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116' (d14) Test result: SUCCESS (XEN) HVM d15v0 save: CPU (XEN) HVM d15 save: PIC (XEN) HVM d15 save: IOAPIC (XEN) HVM d15v0 save: LAPIC (XEN) HVM d15v0 save: LAPIC_REGS (XEN) HVM d15 save: PCI_IRQ (XEN) HVM d15 save: ISA_IRQ (XEN) HVM d15 save: PCI_LINK (XEN) HVM d15 save: PIT (XEN) HVM d15 save: RTC (XEN) HVM d15 save: HPET (XEN) HVM d15 save: PMTIMER (XEN) HVM d15v0 save: MTRR (XEN) HVM d15 save: VIRIDIAN_DOMAIN (XEN) HVM d15v0 save: CPU_XSAVE (XEN) HVM d15v0 save: VIRIDIAN_VCPU (XEN) HVM d15v0 save: VMCE_VCPU (XEN) HVM d15v0 save: TSC_ADJUST (XEN) HVM d15v0 save: CPU_MSR (XEN) HVM15 restore: CPU 0 (d15) --- Xen Test Framework --- (d15) Environment: HVM 32bit (No paging) (d15) XSA-123 PoC (d15) '%cs:mov %reg, %reg' was emulated correctly (d15) Test result: SUCCESS (XEN) HVM d16v0 save: CPU (XEN) HVM d16 save: PIC (XEN) HVM d16 save: IOAPIC (XEN) HVM d16v0 save: LAPIC (XEN) HVM d16v0 save: LAPIC_REGS (XEN) HVM d16 save: PCI_IRQ (XEN) HVM d16 save: ISA_IRQ (XEN) HVM d16 save: PCI_LINK (XEN) HVM d16 save: PIT (XEN) HVM d16 save: RTC (XEN) HVM d16 save: HPET (XEN) HVM d16 save: PMTIMER (XEN) HVM d16v0 save: MTRR (XEN) HVM d16 save: VIRIDIAN_DOMAIN (XEN) HVM d16v0 save: CPU_XSAVE (XEN) HVM d16v0 save: VIRIDIAN_VCPU (XEN) HVM d16v0 save: VMCE_VCPU (XEN) HVM d16v0 save: TSC_ADJUST (XEN) HVM d16v0 save: CPU_MSR (XEN) HVM16 restore: CPU 0 (d16) --- Xen Test Framework --- (d16) Environment: HVM 32bit (No paging) (d16) XSA-186 PoC (d16) Test result: SUCCESS (XEN) HVM d17v0 save: CPU (XEN) HVM d17 save: PIC (XEN) HVM d17 save: IOAPIC (XEN) HVM d17v0 save: LAPIC (XEN) HVM d17v0 save: LAPIC_REGS (XEN) HVM d17 save: PCI_IRQ (XEN) HVM d17 save: ISA_IRQ (XEN) HVM d17 save: PCI_LINK (XEN) HVM d17 save: PIT (XEN) HVM d17 save: RTC (XEN) HVM d17 save: HPET (XEN) HVM d17 save: PMTIMER (XEN) HVM d17v0 save: MTRR (XEN) HVM d17 save: VIRIDIAN_DOMAIN (XEN) HVM d17v0 save: CPU_XSAVE (XEN) HVM d17v0 save: VIRIDIAN_VCPU (XEN) HVM d17v0 save: VMCE_VCPU (XEN) HVM d17v0 save: TSC_ADJUST (XEN) HVM d17v0 save: CPU_MSR (XEN) HVM17 restore: CPU 0 (d17) --- Xen Test Framework --- (d17) Environment: HVM 32bit (No paging) (d17) XSA-188 PoC (d17) Test result: SUCCESS (XEN) HVM d18v0 save: CPU (XEN) HVM d18 save: PIC (XEN) HVM d18 save: IOAPIC (XEN) HVM d18v0 save: LAPIC (XEN) HVM d18v0 save: LAPIC_REGS (XEN) HVM d18 save: PCI_IRQ (XEN) HVM d18 save: ISA_IRQ (XEN) HVM d18 save: PCI_LINK (XEN) HVM d18 save: PIT (XEN) HVM d18 save: RTC (XEN) HVM d18 save: HPET (XEN) HVM d18 save: PMTIMER (XEN) HVM d18v0 save: MTRR (XEN) HVM d18 save: VIRIDIAN_DOMAIN (XEN) HVM d18v0 save: CPU_XSAVE (XEN) HVM d18v0 save: VIRIDIAN_VCPU (XEN) HVM d18v0 save: VMCE_VCPU (XEN) HVM d18v0 save: TSC_ADJUST (XEN) HVM d18v0 save: CPU_MSR (XEN) HVM18 restore: CPU 0 (d18) --- Xen Test Framework --- (d18) Environment: HVM 32bit (No paging) (d18) XSA-191 PoC (d18) Testing read through NULL segment: (d18) Success: Got #GP fault (d18) Testing stale LDT: (d18) Success: Got #GP fault (d18) Test result: SUCCESS (XEN) HVM d19v0 save: CPU (XEN) HVM d19 save: PIC (XEN) HVM d19 save: IOAPIC (XEN) HVM d19v0 save: LAPIC (XEN) HVM d19v0 save: LAPIC_REGS (XEN) HVM d19 save: PCI_IRQ (XEN) HVM d19 save: ISA_IRQ (XEN) HVM d19 save: PCI_LINK (XEN) HVM d19 save: PIT (XEN) HVM d19 save: RTC (XEN) HVM d19 save: HPET (XEN) HVM d19 save: PMTIMER (XEN) HVM d19v0 save: MTRR (XEN) HVM d19 save: VIRIDIAN_DOMAIN (XEN) HVM d19v0 save: CPU_XSAVE (XEN) HVM d19v0 save: VIRIDIAN_VCPU (XEN) HVM d19v0 save: VMCE_VCPU (XEN) HVM d19v0 save: TSC_ADJUST (XEN) HVM d19v0 save: CPU_MSR (XEN) HVM19 restore: CPU 0 (d19) --- Xen Test Framework --- (d19) Environment: HVM 32bit (No paging) (d19) XSA-192 PoC (d19) Success: LDT not valid (d19) Test result: SUCCESS (XEN) HVM d20v0 save: CPU (XEN) HVM d20 save: PIC (XEN) HVM d20 save: IOAPIC (XEN) HVM d20v0 save: LAPIC (XEN) HVM d20v0 save: LAPIC_REGS (XEN) HVM d20 save: PCI_IRQ (XEN) HVM d20 save: ISA_IRQ (XEN) HVM d20 save: PCI_LINK (XEN) HVM d20 save: PIT (XEN) HVM d20 save: RTC (XEN) HVM d20 save: HPET (XEN) HVM d20 save: PMTIMER (XEN) HVM d20v0 save: MTRR (XEN) HVM d20 save: VIRIDIAN_DOMAIN (XEN) HVM d20v0 save: CPU_XSAVE (XEN) HVM d20v0 save: VIRIDIAN_VCPU (XEN) HVM d20v0 save: VMCE_VCPU (XEN) HVM d20v0 save: TSC_ADJUST (XEN) HVM d20v0 save: CPU_MSR (XEN) HVM20 restore: CPU 0 (d20) --- Xen Test Framework --- (d20) Environment: HVM 32bit (No paging) (d20) XSA-200 PoC (d20) Success: Probably not vulnerable to XSA-200 (d20) Test result: SUCCESS (XEN) HVM d21v0 save: CPU (XEN) HVM d21 save: PIC (XEN) HVM d21 save: IOAPIC (XEN) HVM d21v0 save: LAPIC (XEN) HVM d21v0 save: LAPIC_REGS (XEN) HVM d21 save: PCI_IRQ (XEN) HVM d21 save: ISA_IRQ (XEN) HVM d21 save: PCI_LINK (XEN) HVM d21 save: PIT (XEN) HVM d21 save: RTC (XEN) HVM d21 save: HPET (XEN) HVM d21 save: PMTIMER (XEN) HVM d21v0 save: MTRR (XEN) HVM d21 save: VIRIDIAN_DOMAIN (XEN) HVM d21v0 save: CPU_XSAVE (XEN) HVM d21v0 save: VIRIDIAN_VCPU (XEN) HVM d21v0 save: VMCE_VCPU (XEN) HVM d21v0 save: TSC_ADJUST (XEN) HVM d21v0 save: CPU_MSR (XEN) HVM21 restore: CPU 0 (d21) --- Xen Test Framework --- (d21) Environment: HVM 32bit (No paging) (d21) XSA-203 PoC (d21) Success: Not vulnerable to XSA-203 (d21) Test result: SUCCESS (XEN) HVM d22v0 save: CPU (XEN) HVM d22 save: PIC (XEN) HVM d22 save: IOAPIC (XEN) HVM d22v0 save: LAPIC (XEN) HVM d22v0 save: LAPIC_REGS (XEN) HVM d22 save: PCI_IRQ (XEN) HVM d22 save: ISA_IRQ (XEN) HVM d22 save: PCI_LINK (XEN) HVM d22 save: PIT (XEN) HVM d22 save: RTC (XEN) HVM d22 save: HPET (XEN) HVM d22 save: PMTIMER (XEN) HVM d22v0 save: MTRR (XEN) HVM d22 save: VIRIDIAN_DOMAIN (XEN) HVM d22v0 save: CPU_XSAVE (XEN) HVM d22v0 save: VIRIDIAN_VCPU (XEN) HVM d22v0 save: VMCE_VCPU (XEN) HVM d22v0 save: TSC_ADJUST (XEN) HVM d22v0 save: CPU_MSR (XEN) HVM22 restore: CPU 0 (d22) --- Xen Test Framework --- (d22) Environment: HVM 32bit (No paging) (d22) XSA-239 PoC (d22) Success: Probably not vulnerable to XSA-239 (d22) Test result: SUCCESS (XEN) HVM d23v0 save: CPU (XEN) HVM d23 save: PIC (XEN) HVM d23 save: IOAPIC (XEN) HVM d23v0 save: LAPIC (XEN) HVM d23v0 save: LAPIC_REGS (XEN) HVM d23 save: PCI_IRQ (XEN) HVM d23 save: ISA_IRQ (XEN) HVM d23 save: PCI_LINK (XEN) HVM d23 save: PIT (XEN) HVM d23 save: RTC (XEN) HVM d23 save: HPET (XEN) HVM d23 save: PMTIMER (XEN) HVM d23v0 save: MTRR (XEN) HVM d23 save: VIRIDIAN_DOMAIN (XEN) HVM d23v0 save: CPU_XSAVE (XEN) HVM d23v0 save: VIRIDIAN_VCPU (XEN) HVM d23v0 save: VMCE_VCPU (XEN) HVM d23v0 save: TSC_ADJUST (XEN) HVM d23v0 save: CPU_MSR (XEN) HVM23 restore: CPU 0 (d23) --- Xen Test Framework --- (d23) Environment: HVM 32bit (No paging) (d23) XSA-317 PoC (XEN) event_channel.c:265:d23v0 EVTCHNOP failure: domain 23, error -28 (d23) Success: Not vulnerable to XSA-317 (d23) Test result: SUCCESS (XEN) HVM d24v0 save: CPU (XEN) HVM d24 save: PIC (XEN) HVM d24 save: IOAPIC (XEN) HVM d24v0 save: LAPIC (XEN) HVM d24v0 save: LAPIC_REGS (XEN) HVM d24 save: PCI_IRQ (XEN) HVM d24 save: ISA_IRQ (XEN) HVM d24 save: PCI_LINK (XEN) HVM d24 save: PIT (XEN) HVM d24 save: RTC (XEN) HVM d24 save: HPET (XEN) HVM d24 save: PMTIMER (XEN) HVM d24v0 save: MTRR (XEN) HVM d24 save: VIRIDIAN_DOMAIN (XEN) HVM d24v0 save: CPU_XSAVE (XEN) HVM d24v0 save: VIRIDIAN_VCPU (XEN) HVM d24v0 save: VMCE_VCPU (XEN) HVM d24v0 save: TSC_ADJUST (XEN) HVM d24v0 save: CPU_MSR (XEN) HVM24 restore: CPU 0 (d24) --- Xen Test Framework --- (d24) Environment: HVM 32bit (PAE 3 levels) (d24) Guest CPUID Faulting support (d24) Testing CPUID without faulting enabled (d24) Testing CPUID with faulting enabled (d24) Retesting CPUID without faulting enabled (d24) Test result: SUCCESS (XEN) HVM d25v0 save: CPU (XEN) HVM d25 save: PIC (XEN) HVM d25 save: IOAPIC (XEN) HVM d25v0 save: LAPIC (XEN) HVM d25v0 save: LAPIC_REGS (XEN) HVM d25 save: PCI_IRQ (XEN) HVM d25 save: ISA_IRQ (XEN) HVM d25 save: PCI_LINK (XEN) HVM d25 save: PIT (XEN) HVM d25 save: RTC (XEN) HVM d25 save: HPET (XEN) HVM d25 save: PMTIMER (XEN) HVM d25v0 save: MTRR (XEN) HVM d25 save: VIRIDIAN_DOMAIN (XEN) HVM d25v0 save: CPU_XSAVE (XEN) HVM d25v0 save: VIRIDIAN_VCPU (XEN) HVM d25v0 save: VMCE_VCPU (XEN) HVM d25v0 save: TSC_ADJUST (XEN) HVM d25v0 save: CPU_MSR (XEN) HVM25 restore: CPU 0 (d25) --- Xen Test Framework --- (d25) Environment: HVM 32bit (PAE 3 levels) (d25) Invlpg tests (d25) Testing 'invlpg 0x1000' with segment bases (d25) Test: No segment (d25) TLB refill of 0x1000 (d25) Test: %fs (base 0x0) (d25) TLB refill of 0x1000 (d25) Test: %fs (base 0x0, limit 0x1) (d25) TLB refill of 0x1000 (d25) Test: %fs (base 0x1000) (d25) TLB refill of 0x2000 (d25) Test: %fs (base 0x1000, limit 0x1001) (d25) TLB refill of 0x2000 (d25) Testing 'invlpg' in normally-faulting conditions (d25) Test: Mapped address (d25) Test: Unmapped address (d25) Test: NULL segment override (d25) Test: Past segment limit (d25) Test: Before expand-down segment limit (d25) Test result: SUCCESS (XEN) HVM d26v0 save: CPU (XEN) HVM d26 save: PIC (XEN) HVM d26 save: IOAPIC (XEN) HVM d26v0 save: LAPIC (XEN) HVM d26v0 save: LAPIC_REGS (XEN) HVM d26 save: PCI_IRQ (XEN) HVM d26 save: ISA_IRQ (XEN) HVM d26 save: PCI_LINK (XEN) HVM d26 save: PIT (XEN) HVM d26 save: RTC (XEN) HVM d26 save: HPET (XEN) HVM d26 save: PMTIMER (XEN) HVM d26v0 save: MTRR (XEN) HVM d26 save: VIRIDIAN_DOMAIN (XEN) HVM d26v0 save: CPU_XSAVE (XEN) HVM d26v0 save: VIRIDIAN_VCPU (XEN) HVM d26v0 save: VMCE_VCPU (XEN) HVM d26v0 save: TSC_ADJUST (XEN) HVM d26v0 save: CPU_MSR (XEN) HVM26 restore: CPU 0 (d26) --- Xen Test Framework --- (d26) Environment: HVM 32bit (PAE 3 levels) (d26) Invlpg tests (d26) Testing 'invlpg 0x1000' with segment bases (d26) Test: No segment (d26) TLB refill of 0x1000 (d26) Test: %fs (base 0x0) (d26) TLB refill of 0x1000 (d26) Test: %fs (base 0x0, limit 0x1) (d26) TLB refill of 0x1000 (d26) Test: %fs (base 0x1000) (d26) TLB refill of 0x2000 (d26) Test: %fs (base 0x1000, limit 0x1001) (d26) TLB refill of 0x2000 (d26) Testing 'invlpg' in normally-faulting conditions (d26) Test: Mapped address (d26) Test: Unmapped address (d26) Test: NULL segment override (d26) Test: Past segment limit (d26) Test: Before expand-down segment limit (d26) Test result: SUCCESS (XEN) HVM d27v0 save: CPU (XEN) HVM d27 save: PIC (XEN) HVM d27 save: IOAPIC (XEN) HVM d27v0 save: LAPIC (XEN) HVM d27v0 save: LAPIC_REGS (XEN) HVM d27 save: PCI_IRQ (XEN) HVM d27 save: ISA_IRQ (XEN) HVM d27 save: PCI_LINK (XEN) HVM d27 save: PIT (XEN) HVM d27 save: RTC (XEN) HVM d27 save: HPET (XEN) HVM d27 save: PMTIMER (XEN) HVM d27v0 save: MTRR (XEN) HVM d27 save: VIRIDIAN_DOMAIN (XEN) HVM d27v0 save: CPU_XSAVE (XEN) HVM d27v0 save: VIRIDIAN_VCPU (XEN) HVM d27v0 save: VMCE_VCPU (XEN) HVM d27v0 save: TSC_ADJUST (XEN) HVM d27v0 save: CPU_MSR (XEN) HVM27 restore: CPU 0 (d27) --- Xen Test Framework --- (d27) Environment: HVM 32bit (PAE 3 levels) (d27) Memory operand and segment emulation tests (d27) Test result: SUCCESS (XEN) HVM d28v0 save: CPU (XEN) HVM d28 save: PIC (XEN) HVM d28 save: IOAPIC (XEN) HVM d28v0 save: LAPIC (XEN) HVM d28v0 save: LAPIC_REGS (XEN) HVM d28 save: PCI_IRQ (XEN) HVM d28 save: ISA_IRQ (XEN) HVM d28 save: PCI_LINK (XEN) HVM d28 save: PIT (XEN) HVM d28 save: RTC (XEN) HVM d28 save: HPET (XEN) HVM d28 save: PMTIMER (XEN) HVM d28v0 save: MTRR (XEN) HVM d28 save: VIRIDIAN_DOMAIN (XEN) HVM d28v0 save: CPU_XSAVE (XEN) HVM d28v0 save: VIRIDIAN_VCPU (XEN) HVM d28v0 save: VMCE_VCPU (XEN) HVM d28v0 save: TSC_ADJUST (XEN) HVM d28v0 save: CPU_MSR (XEN) HVM28 restore: CPU 0 (d28) --- Xen Test Framework --- (d28) Environment: HVM 32bit (PAE 3 levels) (d28) Test nmi-taskswitch-priv (d28) First self-nmi, from supervisor mode (d28) NMI at 0010:00103a24, stack 0018:00118fd0 (d28) Second self-nmi, from user mode (d28) NMI at 002b:00104024, stack 0033:0011cff8 (d28) Test result: SUCCESS (XEN) HVM d29v0 save: CPU (XEN) HVM d29 save: PIC (XEN) HVM d29 save: IOAPIC (XEN) HVM d29v0 save: LAPIC (XEN) HVM d29v0 save: LAPIC_REGS (XEN) HVM d29 save: PCI_IRQ (XEN) HVM d29 save: ISA_IRQ (XEN) HVM d29 save: PCI_LINK (XEN) HVM d29 save: PIT (XEN) HVM d29 save: RTC (XEN) HVM d29 save: HPET (XEN) HVM d29 save: PMTIMER (XEN) HVM d29v0 save: MTRR (XEN) HVM d29 save: VIRIDIAN_DOMAIN (XEN) HVM d29v0 save: CPU_XSAVE (XEN) HVM d29v0 save: VIRIDIAN_VCPU (XEN) HVM d29v0 save: VMCE_VCPU (XEN) HVM d29v0 save: TSC_ADJUST (XEN) HVM d29v0 save: CPU_MSR (XEN) HVM29 restore: CPU 0 (d29) --- Xen Test Framework --- (d29) Environment: HVM 32bit (PAE 3 levels) (d29) Software interrupt emulation (d29) Test cpl0: all perms ok (d29) Testing int3 (d29) Testing int $3 (d29) Testing icebp (d29) Testing int $1 (d29) Testing into (d29) Test cpl0: p=0 (d29) Testing int3 (d29) Testing int $3 (d29) Testing icebp (d29) Testing int $1 (d29) Testing into (d29) Test cpl3: all perms ok (d29) Testing int3 (d29) Testing int $3 (d29) Testing icebp (d29) Testing int $1 (d29) Testing into (d29) Test cpl3: p=0 (d29) Testing int3 (d29) Testing int $3 (d29) Testing icebp (d29) Testing int $1 (d29) Testing into (d29) Test cpl3: dpl=0 (d29) Testing int3 (d29) Testing int $3 (d29) Testing icebp (d29) Testing int $1 (d29) Testing into (d29) Test result: SUCCESS (XEN) HVM d30v0 save: CPU (XEN) HVM d30 save: PIC (XEN) HVM d30 save: IOAPIC (XEN) HVM d30v0 save: LAPIC (XEN) HVM d30v0 save: LAPIC_REGS (XEN) HVM d30 save: PCI_IRQ (XEN) HVM d30 save: ISA_IRQ (XEN) HVM d30 save: PCI_LINK (XEN) HVM d30 save: PIT (XEN) HVM d30 save: RTC (XEN) HVM d30 save: HPET (XEN) HVM d30 save: PMTIMER (XEN) HVM d30v0 save: MTRR (XEN) HVM d30 save: VIRIDIAN_DOMAIN (XEN) HVM d30v0 save: CPU_XSAVE (XEN) HVM d30v0 save: VIRIDIAN_VCPU (XEN) HVM d30v0 save: VMCE_VCPU (XEN) HVM d30v0 save: TSC_ADJUST (XEN) HVM d30v0 save: CPU_MSR (XEN) HVM30 restore: CPU 0 (d30) --- Xen Test Framework --- (d30) Environment: HVM 32bit (PAE 3 levels) (d30) XSA-122 PoC (d30) XENVER_extraversion: (d30) Got '-unstable' (d30) XENVER_compile_info: (d30) Got 'gcc (Debian 8.3.0-6) 8.3.0' (d30) 'osstest' (d30) 'test-lab.xenproject.org' (d30) 'Thu Oct 22 18:09:08 UTC 2020' (d30) XENVER_changeset: (d30) Got 'Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116' (d30) Test result: SUCCESS (XEN) HVM d31v0 save: CPU (XEN) HVM d31 save: PIC (XEN) HVM d31 save: IOAPIC (XEN) HVM d31v0 save: LAPIC (XEN) HVM d31v0 save: LAPIC_REGS (XEN) HVM d31 save: PCI_IRQ (XEN) HVM d31 save: ISA_IRQ (XEN) HVM d31 save: PCI_LINK (XEN) HVM d31 save: PIT (XEN) HVM d31 save: RTC (XEN) HVM d31 save: HPET (XEN) HVM d31 save: PMTIMER (XEN) HVM d31v0 save: MTRR (XEN) HVM d31 save: VIRIDIAN_DOMAIN (XEN) HVM d31v0 save: CPU_XSAVE (XEN) HVM d31v0 save: VIRIDIAN_VCPU (XEN) HVM d31v0 save: VMCE_VCPU (XEN) HVM d31v0 save: TSC_ADJUST (XEN) HVM d31v0 save: CPU_MSR (XEN) HVM31 restore: CPU 0 (d31) --- Xen Test Framework --- (d31) Environment: HVM 32bit (PAE 3 levels) (d31) XSA-188 PoC (d31) Test result: SUCCESS (XEN) HVM d32v0 save: CPU (XEN) HVM d32 save: PIC (XEN) HVM d32 save: IOAPIC (XEN) HVM d32v0 save: LAPIC (XEN) HVM d32v0 save: LAPIC_REGS (XEN) HVM d32 save: PCI_IRQ (XEN) HVM d32 save: ISA_IRQ (XEN) HVM d32 save: PCI_LINK (XEN) HVM d32 save: PIT (XEN) HVM d32 save: RTC (XEN) HVM d32 save: HPET (XEN) HVM d32 save: PMTIMER (XEN) HVM d32v0 save: MTRR (XEN) HVM d32 save: VIRIDIAN_DOMAIN (XEN) HVM d32v0 save: CPU_XSAVE (XEN) HVM d32v0 save: VIRIDIAN_VCPU (XEN) HVM d32v0 save: VMCE_VCPU (XEN) HVM d32v0 save: TSC_ADJUST (XEN) HVM d32v0 save: CPU_MSR (XEN) HVM32 restore: CPU 0 (d32) --- Xen Test Framework --- (d32) Environment: HVM 32bit (PAE 3 levels) (d32) XSA-317 PoC (XEN) event_channel.c:265:d32v0 EVTCHNOP failure: domain 32, error -28 (d32) Success: Not vulnerable to XSA-317 (d32) Test result: SUCCESS (XEN) HVM d33v0 save: CPU (XEN) HVM d33 save: PIC (XEN) HVM d33 save: IOAPIC (XEN) HVM d33v0 save: LAPIC (XEN) HVM d33v0 save: LAPIC_REGS (XEN) HVM d33 save: PCI_IRQ (XEN) HVM d33 save: ISA_IRQ (XEN) HVM d33 save: PCI_LINK (XEN) HVM d33 save: PIT (XEN) HVM d33 save: RTC (XEN) HVM d33 save: HPET (XEN) HVM d33 save: PMTIMER (XEN) HVM d33v0 save: MTRR (XEN) HVM d33 save: VIRIDIAN_DOMAIN (XEN) HVM d33v0 save: CPU_XSAVE (XEN) HVM d33v0 save: VIRIDIAN_VCPU (XEN) HVM d33v0 save: VMCE_VCPU (XEN) HVM d33v0 save: TSC_ADJUST (XEN) HVM d33v0 save: CPU_MSR (XEN) HVM33 restore: CPU 0 (d33) --- Xen Test Framework --- (d33) Environment: HVM 32bit (PAE 3 levels) (d33) CONSOLEIO_write stack overflow PoC (d33) Success: Not vulnerable to CONSOLEIO_write stack overflow (d33) Test result: SUCCESS (XEN) HVM d34v0 save: CPU (XEN) HVM d34 save: PIC (XEN) HVM d34 save: IOAPIC (XEN) HVM d34v0 save: LAPIC (XEN) HVM d34v0 save: LAPIC_REGS (XEN) HVM d34 save: PCI_IRQ (XEN) HVM d34 save: ISA_IRQ (XEN) HVM d34 save: PCI_LINK (XEN) HVM d34 save: PIT (XEN) HVM d34 save: RTC (XEN) HVM d34 save: HPET (XEN) HVM d34 save: PMTIMER (XEN) HVM d34v0 save: MTRR (XEN) HVM d34 save: VIRIDIAN_DOMAIN (XEN) HVM d34v0 save: CPU_XSAVE (XEN) HVM d34v0 save: VIRIDIAN_VCPU (XEN) HVM d34v0 save: VMCE_VCPU (XEN) HVM d34v0 save: TSC_ADJUST (XEN) HVM d34v0 save: CPU_MSR (XEN) HVM34 restore: CPU 0 (d34) --- Xen Test Framework --- (d34) Environment: HVM 32bit (PSE 2 levels) (d34) Guest CPUID Faulting support (d34) Testing CPUID without faulting enabled (d34) Testing CPUID with faulting enabled (d34) Retesting CPUID without faulting enabled (d34) Test result: SUCCESS (XEN) HVM d35v0 save: CPU (XEN) HVM d35 save: PIC (XEN) HVM d35 save: IOAPIC (XEN) HVM d35v0 save: LAPIC (XEN) HVM d35v0 save: LAPIC_REGS (XEN) HVM d35 save: PCI_IRQ (XEN) HVM d35 save: ISA_IRQ (XEN) HVM d35 save: PCI_LINK (XEN) HVM d35 save: PIT (XEN) HVM d35 save: RTC (XEN) HVM d35 save: HPET (XEN) HVM d35 save: PMTIMER (XEN) HVM d35v0 save: MTRR (XEN) HVM d35 save: VIRIDIAN_DOMAIN (XEN) HVM d35v0 save: CPU_XSAVE (XEN) HVM d35v0 save: VIRIDIAN_VCPU (XEN) HVM d35v0 save: VMCE_VCPU (XEN) HVM d35v0 save: TSC_ADJUST (XEN) HVM d35v0 save: CPU_MSR (XEN) HVM35 restore: CPU 0 (d35) --- Xen Test Framework --- (d35) Environment: HVM 32bit (PSE 2 levels) (d35) Software interrupt emulation (d35) Test cpl0: all perms ok (d35) Testing int3 (d35) Testing int $3 (d35) Testing icebp (d35) Testing int $1 (d35) Testing into (d35) Test cpl0: p=0 (d35) Testing int3 (d35) Testing int $3 (d35) Testing icebp (d35) Testing int $1 (d35) Testing into (d35) Test cpl3: all perms ok (d35) Testing int3 (d35) Testing int $3 (d35) Testing icebp (d35) Testing int $1 (d35) Testing into (d35) Test cpl3: p=0 (d35) Testing int3 (d35) Testing int $3 (d35) Testing icebp (d35) Testing int $1 (d35) Testing into (d35) Test cpl3: dpl=0 (d35) Testing int3 (d35) Testing int $3 (d35) Testing icebp (d35) Testing int $1 (d35) Testing into (d35) Test result: SUCCESS (XEN) HVM d36v0 save: CPU (XEN) HVM d36 save: PIC (XEN) HVM d36 save: IOAPIC (XEN) HVM d36v0 save: LAPIC (XEN) HVM d36v0 save: LAPIC_REGS (XEN) HVM d36 save: PCI_IRQ (XEN) HVM d36 save: ISA_IRQ (XEN) HVM d36 save: PCI_LINK (XEN) HVM d36 save: PIT (XEN) HVM d36 save: RTC (XEN) HVM d36 save: HPET (XEN) HVM d36 save: PMTIMER (XEN) HVM d36v0 save: MTRR (XEN) HVM d36 save: VIRIDIAN_DOMAIN (XEN) HVM d36v0 save: CPU_XSAVE (XEN) HVM d36v0 save: VIRIDIAN_VCPU (XEN) HVM d36v0 save: VMCE_VCPU (XEN) HVM d36v0 save: TSC_ADJUST (XEN) HVM d36v0 save: CPU_MSR (XEN) HVM36 restore: CPU 0 (d36) --- Xen Test Framework --- (d36) Environment: HVM 32bit (PSE 2 levels) (d36) XSA-122 PoC (d36) XENVER_extraversion: (d36) Got '-unstable' (d36) XENVER_compile_info: (d36) Got 'gcc (Debian 8.3.0-6) 8.3.0' (d36) 'osstest' (d36) 'test-lab.xenproject.org' (d36) 'Thu Oct 22 18:09:08 UTC 2020' (d36) XENVER_changeset: (d36) Got 'Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116' (d36) Test result: SUCCESS (XEN) HVM d37v0 save: CPU (XEN) HVM d37 save: PIC (XEN) HVM d37 save: IOAPIC (XEN) HVM d37v0 save: LAPIC (XEN) HVM d37v0 save: LAPIC_REGS (XEN) HVM d37 save: PCI_IRQ (XEN) HVM d37 save: ISA_IRQ (XEN) HVM d37 save: PCI_LINK (XEN) HVM d37 save: PIT (XEN) HVM d37 save: RTC (XEN) HVM d37 save: HPET (XEN) HVM d37 save: PMTIMER (XEN) HVM d37v0 save: MTRR (XEN) HVM d37 save: VIRIDIAN_DOMAIN (XEN) HVM d37v0 save: CPU_XSAVE (XEN) HVM d37v0 save: VIRIDIAN_VCPU (XEN) HVM d37v0 save: VMCE_VCPU (XEN) HVM d37v0 save: TSC_ADJUST (XEN) HVM d37v0 save: CPU_MSR (XEN) HVM37 restore: CPU 0 (d37) --- Xen Test Framework --- (d37) Environment: HVM 32bit (PSE 2 levels) (d37) XSA-188 PoC (d37) Test result: SUCCESS (XEN) HVM d38v0 save: CPU (XEN) HVM d38 save: PIC (XEN) HVM d38 save: IOAPIC (XEN) HVM d38v0 save: LAPIC (XEN) HVM d38v0 save: LAPIC_REGS (XEN) HVM d38 save: PCI_IRQ (XEN) HVM d38 save: ISA_IRQ (XEN) HVM d38 save: PCI_LINK (XEN) HVM d38 save: PIT (XEN) HVM d38 save: RTC (XEN) HVM d38 save: HPET (XEN) HVM d38 save: PMTIMER (XEN) HVM d38v0 save: MTRR (XEN) HVM d38 save: VIRIDIAN_DOMAIN (XEN) HVM d38v0 save: CPU_XSAVE (XEN) HVM d38v0 save: VIRIDIAN_VCPU (XEN) HVM d38v0 save: VMCE_VCPU (XEN) HVM d38v0 save: TSC_ADJUST (XEN) HVM d38v0 save: CPU_MSR (XEN) HVM38 restore: CPU 0 (d38) --- Xen Test Framework --- (d38) Environment: HVM 32bit (PSE 2 levels) (d38) XSA-317 PoC (XEN) event_channel.c:265:d38v0 EVTCHNOP failure: domain 38, error -28 (d38) Success: Not vulnerable to XSA-317 (d38) Test result: SUCCESS (XEN) HVM d39v0 save: CPU (XEN) HVM d39 save: PIC (XEN) HVM d39 save: IOAPIC (XEN) HVM d39v0 save: LAPIC (XEN) HVM d39v0 save: LAPIC_REGS (XEN) HVM d39 save: PCI_IRQ (XEN) HVM d39 save: ISA_IRQ (XEN) HVM d39 save: PCI_LINK (XEN) HVM d39 save: PIT (XEN) HVM d39 save: RTC (XEN) HVM d39 save: HPET (XEN) HVM d39 save: PMTIMER (XEN) HVM d39v0 save: MTRR (XEN) HVM d39 save: VIRIDIAN_DOMAIN (XEN) HVM d39v0 save: CPU_XSAVE (XEN) HVM d39v0 save: VIRIDIAN_VCPU (XEN) HVM d39v0 save: VMCE_VCPU (XEN) HVM d39v0 save: TSC_ADJUST (XEN) HVM d39v0 save: CPU_MSR (XEN) HVM39 restore: CPU 0 (d39) --- Xen Test Framework --- (d39) Environment: HVM 64bit (Long mode 4 levels) (d39) Guest CPUID Faulting support (d39) Testing CPUID without faulting enabled (d39) Testing CPUID with faulting enabled (d39) Retesting CPUID without faulting enabled (d39) Test result: SUCCESS (XEN) HVM d40v0 save: CPU (XEN) HVM d40 save: PIC (XEN) HVM d40 save: IOAPIC (XEN) HVM d40v0 save: LAPIC (XEN) HVM d40v0 save: LAPIC_REGS (XEN) HVM d40 save: PCI_IRQ (XEN) HVM d40 save: ISA_IRQ (XEN) HVM d40 save: PCI_LINK (XEN) HVM d40 save: PIT (XEN) HVM d40 save: RTC (XEN) HVM d40 save: HPET (XEN) HVM d40 save: PMTIMER (XEN) HVM d40v0 save: MTRR (XEN) HVM d40 save: VIRIDIAN_DOMAIN (XEN) HVM d40v0 save: CPU_XSAVE (XEN) HVM d40v0 save: VIRIDIAN_VCPU (XEN) HVM d40v0 save: VMCE_VCPU (XEN) HVM d40v0 save: TSC_ADJUST (XEN) HVM d40v0 save: CPU_MSR (XEN) HVM40 restore: CPU 0 (d40) --- Xen Test Framework --- (d40) Environment: HVM 64bit (Long mode 4 levels) (d40) FPU Exception Emulation (d40) Testing x87 (d40) Testing x87 wait (d40) Testing MMX (d40) Testing SSE (d40) Testing SSE (CR4.OSFXSR) (d40) Testing AVX (d40) Testing AVX (CR4.OSXSAVE) (d40) Testing AVX (CR4.OSXSAVE+XCR0.YMM) (d40) Testing emulated x87 (d40) Testing emulated x87 wait (d40) Testing emulated MMX (d40) Testing emulated SSE (d40) Testing emulated SSE (CR4.OSFXSR) (d40) Testing emulated AVX (d40) Testing emulated AVX (CR4.OSXSAVE) (d40) Testing emulated AVX (CR4.OSXSAVE+XCR0.YMM) (d40) Test result: SUCCESS (XEN) HVM d41v0 save: CPU (XEN) HVM d41 save: PIC (XEN) HVM d41 save: IOAPIC (XEN) HVM d41v0 save: LAPIC (XEN) HVM d41v0 save: LAPIC_REGS (XEN) HVM d41 save: PCI_IRQ (XEN) HVM d41 save: ISA_IRQ (XEN) HVM d41 save: PCI_LINK (XEN) HVM d41 save: PIT (XEN) HVM d41 save: RTC (XEN) HVM d41 save: HPET (XEN) HVM d41 save: PMTIMER (XEN) HVM d41v0 save: MTRR (XEN) HVM d41 save: VIRIDIAN_DOMAIN (XEN) HVM d41v0 save: CPU_XSAVE (XEN) HVM d41v0 save: VIRIDIAN_VCPU (XEN) HVM d41v0 save: VMCE_VCPU (XEN) HVM d41v0 save: TSC_ADJUST (XEN) HVM d41v0 save: CPU_MSR (XEN) HVM41 restore: CPU 0 (d41) --- Xen Test Framework --- (d41) Environment: HVM 64bit (Long mode 4 levels) (d41) Invlpg tests (d41) Testing 'invlpg 0x1000' with segment bases (d41) Test: No segment (d41) TLB refill of 0x1000 (d41) Test: %fs (base 0x0) (d41) TLB refill of 0x1000 (d41) Test: %fs (base 0x0, limit 0x1) (d41) TLB refill of 0x1000 (d41) Test: %fs (base 0x1000) (d41) TLB refill of 0x2000 (d41) Test: %fs (base 0x1000, limit 0x1001) (d41) TLB refill of 0x2000 (d41) Testing 'invlpg' in normally-faulting conditions (d41) Test: Mapped address (d41) Test: Unmapped address (d41) Test: NULL segment override (d41) Test: Past segment limit (d41) Test: Before expand-down segment limit (d41) Test: Noncanonical address (d41) Test: Noncanonical including segment base (d41) Test result: SUCCESS (XEN) HVM d42v0 save: CPU (XEN) HVM d42 save: PIC (XEN) HVM d42 save: IOAPIC (XEN) HVM d42v0 save: LAPIC (XEN) HVM d42v0 save: LAPIC_REGS (XEN) HVM d42 save: PCI_IRQ (XEN) HVM d42 save: ISA_IRQ (XEN) HVM d42 save: PCI_LINK (XEN) HVM d42 save: PIT (XEN) HVM d42 save: RTC (XEN) HVM d42 save: HPET (XEN) HVM d42 save: PMTIMER (XEN) HVM d42v0 save: MTRR (XEN) HVM d42 save: VIRIDIAN_DOMAIN (XEN) HVM d42v0 save: CPU_XSAVE (XEN) HVM d42v0 save: VIRIDIAN_VCPU (XEN) HVM d42v0 save: VMCE_VCPU (XEN) HVM d42v0 save: TSC_ADJUST (XEN) HVM d42v0 save: CPU_MSR (XEN) HVM42 restore: CPU 0 (d42) --- Xen Test Framework --- (d42) Environment: HVM 64bit (Long mode 4 levels) (d42) Invlpg tests (d42) Testing 'invlpg 0x1000' with segment bases (d42) Test: No segment (d42) TLB refill of 0x1000 (d42) Test: %fs (base 0x0) (d42) TLB refill of 0x1000 (d42) Test: %fs (base 0x0, limit 0x1) (d42) TLB refill of 0x1000 (d42) Test: %fs (base 0x1000) (d42) TLB refill of 0x2000 (d42) Test: %fs (base 0x1000, limit 0x1001) (d42) TLB refill of 0x2000 (d42) Testing 'invlpg' in normally-faulting conditions (d42) Test: Mapped address (d42) Test: Unmapped address (d42) Test: NULL segment override (d42) Test: Past segment limit (d42) Test: Before expand-down segment limit (d42) Test: Noncanonical address (d42) Test: Noncanonical including segment base (d42) Test result: SUCCESS (XEN) HVM d43v0 save: CPU (XEN) HVM d43 save: PIC (XEN) HVM d43 save: IOAPIC (XEN) HVM d43v0 save: LAPIC (XEN) HVM d43v0 save: LAPIC_REGS (XEN) HVM d43 save: PCI_IRQ (XEN) HVM d43 save: ISA_IRQ (XEN) HVM d43 save: PCI_LINK (XEN) HVM d43 save: PIT (XEN) HVM d43 save: RTC (XEN) HVM d43 save: HPET (XEN) HVM d43 save: PMTIMER (XEN) HVM d43v0 save: MTRR (XEN) HVM d43 save: VIRIDIAN_DOMAIN (XEN) HVM d43v0 save: CPU_XSAVE (XEN) HVM d43v0 save: VIRIDIAN_VCPU (XEN) HVM d43v0 save: VMCE_VCPU (XEN) HVM d43v0 save: TSC_ADJUST (XEN) HVM d43v0 save: CPU_MSR (XEN) HVM43 restore: CPU 0 (d43) --- Xen Test Framework --- (d43) Environment: HVM 64bit (Long mode 4 levels) (d43) LBR/TSX VMentry failure test (d43) Latched a Last Branch Record in the upper canonical half (d43) Success: No LBR/TSX VMentry failure in this configuration (d43) Test result: SUCCESS (XEN) HVM d44v0 save: CPU (XEN) HVM d44 save: PIC (XEN) HVM d44 save: IOAPIC (XEN) HVM d44v0 save: LAPIC (XEN) HVM d44v0 save: LAPIC_REGS (XEN) HVM d44 save: PCI_IRQ (XEN) HVM d44 save: ISA_IRQ (XEN) HVM d44 save: PCI_LINK (XEN) HVM d44 save: PIT (XEN) HVM d44 save: RTC (XEN) HVM d44 save: HPET (XEN) HVM d44 save: PMTIMER (XEN) HVM d44v0 save: MTRR (XEN) HVM d44 save: VIRIDIAN_DOMAIN (XEN) HVM d44v0 save: CPU_XSAVE (XEN) HVM d44v0 save: VIRIDIAN_VCPU (XEN) HVM d44v0 save: VMCE_VCPU (XEN) HVM d44v0 save: TSC_ADJUST (XEN) HVM d44v0 save: CPU_MSR (XEN) HVM44 restore: CPU 0 (d44) --- Xen Test Framework --- (d44) Environment: HVM 64bit (Long mode 4 levels) (d44) Live Patch Privilege Check (d44) test_upload: Xen correctly denied Live Patch calls (d44) test_list: Xen correctly denied Live Patch calls (d44) test_get: Xen correctly denied Live Patch calls (d44) test_action: Xen correctly denied Live Patch calls (d44) test_action: Xen correctly denied Live Patch calls (d44) test_action: Xen correctly denied Live Patch calls (d44) test_action: Xen correctly denied Live Patch calls (d44) Test result: SUCCESS (XEN) HVM d45v0 save: CPU (XEN) HVM d45 save: PIC (XEN) HVM d45 save: IOAPIC (XEN) HVM d45v0 save: LAPIC (XEN) HVM d45v0 save: LAPIC_REGS (XEN) HVM d45 save: PCI_IRQ (XEN) HVM d45 save: ISA_IRQ (XEN) HVM d45 save: PCI_LINK (XEN) HVM d45 save: PIT (XEN) HVM d45 save: RTC (XEN) HVM d45 save: HPET (XEN) HVM d45 save: PMTIMER (XEN) HVM d45v0 save: MTRR (XEN) HVM d45 save: VIRIDIAN_DOMAIN (XEN) HVM d45v0 save: CPU_XSAVE (XEN) HVM d45v0 save: VIRIDIAN_VCPU (XEN) HVM d45v0 save: VMCE_VCPU (XEN) HVM d45v0 save: TSC_ADJUST (XEN) HVM d45v0 save: CPU_MSR (XEN) HVM45 restore: CPU 0 (d45) --- Xen Test Framework --- (d45) Environment: HVM 64bit (Long mode 4 levels) (d45) Memory operand and segment emulation tests (d45) Test result: SUCCESS (XEN) HVM d46v0 save: CPU (XEN) HVM d46 save: PIC (XEN) HVM d46 save: IOAPIC (XEN) HVM d46v0 save: LAPIC (XEN) HVM d46v0 save: LAPIC_REGS (XEN) HVM d46 save: PCI_IRQ (XEN) HVM d46 save: ISA_IRQ (XEN) HVM d46 save: PCI_LINK (XEN) HVM d46 save: PIT (XEN) HVM d46 save: RTC (XEN) HVM d46 save: HPET (XEN) HVM d46 save: PMTIMER (XEN) HVM d46v0 save: MTRR (XEN) HVM d46 save: VIRIDIAN_DOMAIN (XEN) HVM d46v0 save: CPU_XSAVE (XEN) HVM d46v0 save: VIRIDIAN_VCPU (XEN) HVM d46v0 save: VMCE_VCPU (XEN) HVM d46v0 save: TSC_ADJUST (XEN) HVM d46v0 save: CPU_MSR (XEN) HVM46 restore: CPU 0 (d46) --- Xen Test Framework --- (d46) Environment: HVM 64bit (Long mode 4 levels) (d46) Software interrupt emulation (d46) Test cpl0: all perms ok (d46) Testing int3 (d46) Testing int $3 (d46) Testing icebp (d46) Testing int $1 (d46) Testing into (d46) Test cpl0: p=0 (d46) Testing int3 (d46) Testing int $3 (d46) Testing icebp (d46) Testing int $1 (d46) Testing into (d46) Test cpl3: all perms ok (d46) Testing int3 (d46) Testing int $3 (d46) Testing icebp (d46) Testing int $1 (d46) Testing into (d46) Test cpl3: p=0 (d46) Testing int3 (d46) Testing int $3 (d46) Testing icebp (d46) Testing int $1 (d46) Testing into (d46) Test cpl3: dpl=0 (d46) Testing int3 (d46) Testing int $3 (d46) Testing icebp (d46) Testing int $1 (d46) Testing into (d46) Test result: SUCCESS (XEN) HVM d47v0 save: CPU (XEN) HVM d47 save: PIC (XEN) HVM d47 save: IOAPIC (XEN) HVM d47v0 save: LAPIC (XEN) HVM d47v0 save: LAPIC_REGS (XEN) HVM d47 save: PCI_IRQ (XEN) HVM d47 save: ISA_IRQ (XEN) HVM d47 save: PCI_LINK (XEN) HVM d47 save: PIT (XEN) HVM d47 save: RTC (XEN) HVM d47 save: HPET (XEN) HVM d47 save: PMTIMER (XEN) HVM d47v0 save: MTRR (XEN) HVM d47 save: VIRIDIAN_DOMAIN (XEN) HVM d47v0 save: CPU_XSAVE (XEN) HVM d47v0 save: VIRIDIAN_VCPU (XEN) HVM d47v0 save: VMCE_VCPU (XEN) HVM d47v0 save: TSC_ADJUST (XEN) HVM d47v0 save: CPU_MSR (XEN) HVM47 restore: CPU 0 (d47) --- Xen Test Framework --- (d47) Environment: HVM 64bit (Long mode 4 levels) (d47) User-Mode Instruction Prevention Tests (d47) UMIP is not supported, skip the rest of test (d47) Test result: SKIP (XEN) HVM d48v0 save: CPU (XEN) HVM d48 save: PIC (XEN) HVM d48 save: IOAPIC (XEN) HVM d48v0 save: LAPIC (XEN) HVM d48v0 save: LAPIC_REGS (XEN) HVM d48 save: PCI_IRQ (XEN) HVM d48 save: ISA_IRQ (XEN) HVM d48 save: PCI_LINK (XEN) HVM d48 save: PIT (XEN) HVM d48 save: RTC (XEN) HVM d48 save: HPET (XEN) HVM d48 save: PMTIMER (XEN) HVM d48v0 save: MTRR (XEN) HVM d48 save: VIRIDIAN_DOMAIN (XEN) HVM d48v0 save: CPU_XSAVE (XEN) HVM d48v0 save: VIRIDIAN_VCPU (XEN) HVM d48v0 save: VMCE_VCPU (XEN) HVM d48v0 save: TSC_ADJUST (XEN) HVM d48v0 save: CPU_MSR (XEN) HVM48 restore: CPU 0 (d48) --- Xen Test Framework --- (d48) Environment: HVM 64bit (Long mode 4 levels) (d48) XSA-122 PoC (d48) XENVER_extraversion: (d48) Got '-unstable' (d48) XENVER_compile_info: (d48) Got 'gcc (Debian 8.3.0-6) 8.3.0' (d48) 'osstest' (d48) 'test-lab.xenproject.org' (d48) 'Thu Oct 22 18:09:08 UTC 2020' (d48) XENVER_changeset: (d48) Got 'Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116' (d48) Test result: SUCCESS (XEN) HVM d49v0 save: CPU (XEN) HVM d49 save: PIC (XEN) HVM d49 save: IOAPIC (XEN) HVM d49v0 save: LAPIC (XEN) HVM d49v0 save: LAPIC_REGS (XEN) HVM d49 save: PCI_IRQ (XEN) HVM d49 save: ISA_IRQ (XEN) HVM d49 save: PCI_LINK (XEN) HVM d49 save: PIT (XEN) HVM d49 save: RTC (XEN) HVM d49 save: HPET (XEN) HVM d49 save: PMTIMER (XEN) HVM d49v0 save: MTRR (XEN) HVM d49 save: VIRIDIAN_DOMAIN (XEN) HVM d49v0 save: CPU_XSAVE (XEN) HVM d49v0 save: VIRIDIAN_VCPU (XEN) HVM d49v0 save: VMCE_VCPU (XEN) HVM d49v0 save: TSC_ADJUST (XEN) HVM d49v0 save: CPU_MSR (XEN) HVM49 restore: CPU 0 (d49) --- Xen Test Framework --- (d49) Environment: HVM 64bit (Long mode 4 levels) (d49) XSA-168 PoC (d49) Test result: SUCCESS (XEN) HVM d50v0 save: CPU (XEN) HVM d50 save: PIC (XEN) HVM d50 save: IOAPIC (XEN) HVM d50v0 save: LAPIC (XEN) HVM d50v0 save: LAPIC_REGS (XEN) HVM d50 save: PCI_IRQ (XEN) HVM d50 save: ISA_IRQ (XEN) HVM d50 save: PCI_LINK (XEN) HVM d50 save: PIT (XEN) HVM d50 save: RTC (XEN) HVM d50 save: HPET (XEN) HVM d50 save: PMTIMER (XEN) HVM d50v0 save: MTRR (XEN) HVM d50 save: VIRIDIAN_DOMAIN (XEN) HVM d50v0 save: CPU_XSAVE (XEN) HVM d50v0 save: VIRIDIAN_VCPU (XEN) HVM d50v0 save: VMCE_VCPU (XEN) HVM d50v0 save: TSC_ADJUST (XEN) HVM d50v0 save: CPU_MSR (XEN) HVM50 restore: CPU 0 (d50) --- Xen Test Framework --- (d50) Environment: HVM 64bit (Long mode 4 levels) (d50) XSA-170 PoC (d50) Executing user wild jump (d50) Executing user nop slide (XEN) d50v0 Bad rIP 800000000000 for mode 8 (d50) Success: Not vulnerable to XSA-170 (d50) Test result: SUCCESS (XEN) HVM d51v0 save: CPU (XEN) HVM d51 save: PIC (XEN) HVM d51 save: IOAPIC (XEN) HVM d51v0 save: LAPIC (XEN) HVM d51v0 save: LAPIC_REGS (XEN) HVM d51 save: PCI_IRQ (XEN) HVM d51 save: ISA_IRQ (XEN) HVM d51 save: PCI_LINK (XEN) HVM d51 save: PIT (XEN) HVM d51 save: RTC (XEN) HVM d51 save: HPET (XEN) HVM d51 save: PMTIMER (XEN) HVM d51v0 save: MTRR (XEN) HVM d51 save: VIRIDIAN_DOMAIN (XEN) HVM d51v0 save: CPU_XSAVE (XEN) HVM d51v0 save: VIRIDIAN_VCPU (XEN) HVM d51v0 save: VMCE_VCPU (XEN) HVM d51v0 save: TSC_ADJUST (XEN) HVM d51v0 save: CPU_MSR (XEN) HVM51 restore: CPU 0 (d51) --- Xen Test Framework --- (d51) Environment: HVM 64bit (Long mode 4 levels) (d51) XSA-173 PoC (d51) Xen appears not vulnerable (d51) Test result: SUCCESS (XEN) HVM d52v0 save: CPU (XEN) HVM d52 save: PIC (XEN) HVM d52 save: IOAPIC (XEN) HVM d52v0 save: LAPIC (XEN) HVM d52v0 save: LAPIC_REGS (XEN) HVM d52 save: PCI_IRQ (XEN) HVM d52 save: ISA_IRQ (XEN) HVM d52 save: PCI_LINK (XEN) HVM d52 save: PIT (XEN) HVM d52 save: RTC (XEN) HVM d52 save: HPET (XEN) HVM d52 save: PMTIMER (XEN) HVM d52v0 save: MTRR (XEN) HVM d52 save: VIRIDIAN_DOMAIN (XEN) HVM d52v0 save: CPU_XSAVE (XEN) HVM d52v0 save: VIRIDIAN_VCPU (XEN) HVM d52v0 save: VMCE_VCPU (XEN) HVM d52v0 save: TSC_ADJUST (XEN) HVM d52v0 save: CPU_MSR (XEN) HVM52 restore: CPU 0 (d52) --- Xen Test Framework --- (d52) Environment: HVM 64bit (Long mode 4 levels) (d52) XSA-186 PoC (d52) Test result: SUCCESS (XEN) HVM d53v0 save: CPU (XEN) HVM d53 save: PIC (XEN) HVM d53 save: IOAPIC (XEN) HVM d53v0 save: LAPIC (XEN) HVM d53v0 save: LAPIC_REGS (XEN) HVM d53 save: PCI_IRQ (XEN) HVM d53 save: ISA_IRQ (XEN) HVM d53 save: PCI_LINK (XEN) HVM d53 save: PIT (XEN) HVM d53 save: RTC (XEN) HVM d53 save: HPET (XEN) HVM d53 save: PMTIMER (XEN) HVM d53v0 save: MTRR (XEN) HVM d53 save: VIRIDIAN_DOMAIN (XEN) HVM d53v0 save: CPU_XSAVE (XEN) HVM d53v0 save: VIRIDIAN_VCPU (XEN) HVM d53v0 save: VMCE_VCPU (XEN) HVM d53v0 save: TSC_ADJUST (XEN) HVM d53v0 save: CPU_MSR (XEN) HVM53 restore: CPU 0 (d53) --- Xen Test Framework --- (d53) Environment: HVM 64bit (Long mode 4 levels) (d53) XSA-188 PoC (d53) Test result: SUCCESS (XEN) HVM d54v0 save: CPU (XEN) HVM d54 save: PIC (XEN) HVM d54 save: IOAPIC (XEN) HVM d54v0 save: LAPIC (XEN) HVM d54v0 save: LAPIC_REGS (XEN) HVM d54 save: PCI_IRQ (XEN) HVM d54 save: ISA_IRQ (XEN) HVM d54 save: PCI_LINK (XEN) HVM d54 save: PIT (XEN) HVM d54 save: RTC (XEN) HVM d54 save: HPET (XEN) HVM d54 save: PMTIMER (XEN) HVM d54v0 save: MTRR (XEN) HVM d54 save: VIRIDIAN_DOMAIN (XEN) HVM d54v0 save: CPU_XSAVE (XEN) HVM d54v0 save: VIRIDIAN_VCPU (XEN) HVM d54v0 save: VMCE_VCPU (XEN) HVM d54v0 save: TSC_ADJUST (XEN) HVM d54v0 save: CPU_MSR (XEN) HVM54 restore: CPU 0 (d54) --- Xen Test Framework --- (d54) Environment: HVM 64bit (Long mode 4 levels) (d54) XSA-195 PoC (d54) Success: Not vulnerable to XSA-195 (d54) Test result: SUCCESS (XEN) HVM d55v0 save: CPU (XEN) HVM d55 save: PIC (XEN) HVM d55 save: IOAPIC (XEN) HVM d55v0 save: LAPIC (XEN) HVM d55v0 save: LAPIC_REGS (XEN) HVM d55 save: PCI_IRQ (XEN) HVM d55 save: ISA_IRQ (XEN) HVM d55 save: PCI_LINK (XEN) HVM d55 save: PIT (XEN) HVM d55 save: RTC (XEN) HVM d55 save: HPET (XEN) HVM d55 save: PMTIMER (XEN) HVM d55v0 save: MTRR (XEN) HVM d55 save: VIRIDIAN_DOMAIN (XEN) HVM d55v0 save: CPU_XSAVE (XEN) HVM d55v0 save: VIRIDIAN_VCPU (XEN) HVM d55v0 save: VMCE_VCPU (XEN) HVM d55v0 save: TSC_ADJUST (XEN) HVM d55v0 save: CPU_MSR (XEN) HVM55 restore: CPU 0 (d55) --- Xen Test Framework --- (d55) Environment: HVM 64bit (Long mode 4 levels) (d55) XSA-196 PoC (d55) Success: #DF DPL was checked correctly (d55) Test result: SUCCESS (XEN) HVM d56v0 save: CPU (XEN) HVM d56 save: PIC (XEN) HVM d56 save: IOAPIC (XEN) HVM d56v0 save: LAPIC (XEN) HVM d56v0 save: LAPIC_REGS (XEN) HVM d56 save: PCI_IRQ (XEN) HVM d56 save: ISA_IRQ (XEN) HVM d56 save: PCI_LINK (XEN) HVM d56 save: PIT (XEN) HVM d56 save: RTC (XEN) HVM d56 save: HPET (XEN) HVM d56 save: PMTIMER (XEN) HVM d56v0 save: MTRR (XEN) HVM d56 save: VIRIDIAN_DOMAIN (XEN) HVM d56v0 save: CPU_XSAVE (XEN) HVM d56v0 save: VIRIDIAN_VCPU (XEN) HVM d56v0 save: VMCE_VCPU (XEN) HVM d56v0 save: TSC_ADJUST (XEN) HVM d56v0 save: CPU_MSR (XEN) HVM56 restore: CPU 0 (d56) --- Xen Test Framework --- (d56) Environment: HVM 64bit (Long mode 4 levels) (d56) XSA-204 PoC (d56) Success: Not vulnerable to XSA-204 (d56) Test result: SUCCESS (XEN) HVM d57v0 save: CPU (XEN) HVM d57 save: PIC (XEN) HVM d57 save: IOAPIC (XEN) HVM d57v0 save: LAPIC (XEN) HVM d57v0 save: LAPIC_REGS (XEN) HVM d57 save: PCI_IRQ (XEN) HVM d57 save: ISA_IRQ (XEN) HVM d57 save: PCI_LINK (XEN) HVM d57 save: PIT (XEN) HVM d57 save: RTC (XEN) HVM d57 save: HPET (XEN) HVM d57 save: PMTIMER (XEN) HVM d57v0 save: MTRR (XEN) HVM d57 save: VIRIDIAN_DOMAIN (XEN) HVM d57v0 save: CPU_XSAVE (XEN) HVM d57v0 save: VIRIDIAN_VCPU (XEN) HVM d57v0 save: VMCE_VCPU (XEN) HVM d57v0 save: TSC_ADJUST (XEN) HVM d57v0 save: CPU_MSR (XEN) HVM57 restore: CPU 0 (d57) --- Xen Test Framework --- (d57) Environment: HVM 64bit (Long mode 4 levels) (d57) XSA-221 PoC (d57) Success: Probably not vulnerable to XSA-221 (d57) Test result: SUCCESS (XEN) HVM d58v0 save: CPU (XEN) HVM d58 save: PIC (XEN) HVM d58 save: IOAPIC (XEN) HVM d58v0 save: LAPIC (XEN) HVM d58v0 save: LAPIC_REGS (XEN) HVM d58 save: PCI_IRQ (XEN) HVM d58 save: ISA_IRQ (XEN) HVM d58 save: PCI_LINK (XEN) HVM d58 save: PIT (XEN) HVM d58 save: RTC (XEN) HVM d58 save: HPET (XEN) HVM d58 save: PMTIMER (XEN) HVM d58v0 save: MTRR (XEN) HVM d58 save: VIRIDIAN_DOMAIN (XEN) HVM d58v0 save: CPU_XSAVE (XEN) HVM d58v0 save: VIRIDIAN_VCPU (XEN) HVM d58v0 save: VMCE_VCPU (XEN) HVM d58v0 save: TSC_ADJUST (XEN) HVM d58v0 save: CPU_MSR (XEN) HVM58 restore: CPU 0 (d58) --- Xen Test Framework --- (d58) Environment: HVM 64bit (Long mode 4 levels) (d58) XSA-231 PoC (d58) Success: Probably not vulnerable to XSA-231 (d58) Test result: SUCCESS (XEN) HVM d59v0 save: CPU (XEN) HVM d59 save: PIC (XEN) HVM d59 save: IOAPIC (XEN) HVM d59v0 save: LAPIC (XEN) HVM d59v0 save: LAPIC_REGS (XEN) HVM d59 save: PCI_IRQ (XEN) HVM d59 save: ISA_IRQ (XEN) HVM d59 save: PCI_LINK (XEN) HVM d59 save: PIT (XEN) HVM d59 save: RTC (XEN) HVM d59 save: HPET (XEN) HVM d59 save: PMTIMER (XEN) HVM d59v0 save: MTRR (XEN) HVM d59 save: VIRIDIAN_DOMAIN (XEN) HVM d59v0 save: CPU_XSAVE (XEN) HVM d59v0 save: VIRIDIAN_VCPU (XEN) HVM d59v0 save: VMCE_VCPU (XEN) HVM d59v0 save: TSC_ADJUST (XEN) HVM d59v0 save: CPU_MSR (XEN) HVM59 restore: CPU 0 (d59) --- Xen Test Framework --- (d59) Environment: HVM 64bit (Long mode 4 levels) (d59) XSA-232 PoC (d59) Success: Probably not vulnerable to XSA-232 (d59) Test result: SUCCESS (XEN) HVM d60v0 save: CPU (XEN) HVM d60 save: PIC (XEN) HVM d60 save: IOAPIC (XEN) HVM d60v0 save: LAPIC (XEN) HVM d60v0 save: LAPIC_REGS (XEN) HVM d60 save: PCI_IRQ (XEN) HVM d60 save: ISA_IRQ (XEN) HVM d60 save: PCI_LINK (XEN) HVM d60 save: PIT (XEN) HVM d60 save: RTC (XEN) HVM d60 save: HPET (XEN) HVM d60 save: PMTIMER (XEN) HVM d60v0 save: MTRR (XEN) HVM d60 save: VIRIDIAN_DOMAIN (XEN) HVM d60v0 save: CPU_XSAVE (XEN) HVM d60v0 save: VIRIDIAN_VCPU (XEN) HVM d60v0 save: VMCE_VCPU (XEN) HVM d60v0 save: TSC_ADJUST (XEN) HVM d60v0 save: CPU_MSR (XEN) HVM60 restore: CPU 0 (d60) --- Xen Test Framework --- (d60) Environment: HVM 64bit (Long mode 4 levels) (d60) XSA-261 PoC (d60) Success: Probably not vulnerable to XSA-261 (d60) Test result: SUCCESS (XEN) HVM d61v0 save: CPU (XEN) HVM d61 save: PIC (XEN) HVM d61 save: IOAPIC (XEN) HVM d61v0 save: LAPIC (XEN) HVM d61v0 save: LAPIC_REGS (XEN) HVM d61 save: PCI_IRQ (XEN) HVM d61 save: ISA_IRQ (XEN) HVM d61 save: PCI_LINK (XEN) HVM d61 save: PIT (XEN) HVM d61 save: RTC (XEN) HVM d61 save: HPET (XEN) HVM d61 save: PMTIMER (XEN) HVM d61v0 save: MTRR (XEN) HVM d61 save: VIRIDIAN_DOMAIN (XEN) HVM d61v0 save: CPU_XSAVE (XEN) HVM d61v0 save: VIRIDIAN_VCPU (XEN) HVM d61v0 save: VMCE_VCPU (XEN) HVM d61v0 save: TSC_ADJUST (XEN) HVM d61v0 save: CPU_MSR (XEN) HVM61 restore: CPU 0 (d61) --- Xen Test Framework --- (d61) Environment: HVM 64bit (Long mode 4 levels) (d61) XSA-269 PoC (d61) Success: Not vulnerable to XSA-269 (d61) Test result: SUCCESS (XEN) HVM d62v0 save: CPU (XEN) HVM d62 save: PIC (XEN) HVM d62 save: IOAPIC (XEN) HVM d62v0 save: LAPIC (XEN) HVM d62v0 save: LAPIC_REGS (XEN) HVM d62 save: PCI_IRQ (XEN) HVM d62 save: ISA_IRQ (XEN) HVM d62 save: PCI_LINK (XEN) HVM d62 save: PIT (XEN) HVM d62 save: RTC (XEN) HVM d62 save: HPET (XEN) HVM d62 save: PMTIMER (XEN) HVM d62v0 save: MTRR (XEN) HVM d62 save: VIRIDIAN_DOMAIN (XEN) HVM d62v0 save: CPU_XSAVE (XEN) HVM d62v0 save: VIRIDIAN_VCPU (XEN) HVM d62v0 save: VMCE_VCPU (XEN) HVM d62v0 save: TSC_ADJUST (XEN) HVM d62v0 save: CPU_MSR (XEN) HVM62 restore: CPU 0 (d62) --- Xen Test Framework --- (d62) Environment: HVM 64bit (Long mode 4 levels) (d62) XSA-277 PoC (d62) Success: Not vulnerable to XSA-277 (d62) Test result: SUCCESS (XEN) HVM d63v0 save: CPU (XEN) HVM d63 save: PIC (XEN) HVM d63 save: IOAPIC (XEN) HVM d63v0 save: LAPIC (XEN) HVM d63v0 save: LAPIC_REGS (XEN) HVM d63 save: PCI_IRQ (XEN) HVM d63 save: ISA_IRQ (XEN) HVM d63 save: PCI_LINK (XEN) HVM d63 save: PIT (XEN) HVM d63 save: RTC (XEN) HVM d63 save: HPET (XEN) HVM d63 save: PMTIMER (XEN) HVM d63v0 save: MTRR (XEN) HVM d63 save: VIRIDIAN_DOMAIN (XEN) HVM d63v0 save: CPU_XSAVE (XEN) HVM d63v0 save: VIRIDIAN_VCPU (XEN) HVM d63v0 save: VMCE_VCPU (XEN) HVM d63v0 save: TSC_ADJUST (XEN) HVM d63v0 save: CPU_MSR (XEN) HVM63 restore: CPU 0 (d63) --- Xen Test Framework --- (d63) Environment: HVM 64bit (Long mode 4 levels) (d63) XSA-278 PoC (d63) Success: Probably not vulnerable to XSA-278 (d63) Test result: SUCCESS (XEN) HVM d64v0 save: CPU (XEN) HVM d64 save: PIC (XEN) HVM d64 save: IOAPIC (XEN) HVM d64v0 save: LAPIC (XEN) HVM d64v0 save: LAPIC_REGS (XEN) HVM d64 save: PCI_IRQ (XEN) HVM d64 save: ISA_IRQ (XEN) HVM d64 save: PCI_LINK (XEN) HVM d64 save: PIT (XEN) HVM d64 save: RTC (XEN) HVM d64 save: HPET (XEN) HVM d64 save: PMTIMER (XEN) HVM d64v0 save: MTRR (XEN) HVM d64 save: VIRIDIAN_DOMAIN (XEN) HVM d64v0 save: CPU_XSAVE (XEN) HVM d64v0 save: VIRIDIAN_VCPU (XEN) HVM d64v0 save: VMCE_VCPU (XEN) HVM d64v0 save: TSC_ADJUST (XEN) HVM d64v0 save: CPU_MSR (XEN) HVM64 restore: CPU 0 (d64) --- Xen Test Framework --- (d64) Environment: HVM 64bit (Long mode 4 levels) (d64) XSA-308 PoC (d64) Success: Not vulnerable to XSA-308 (d64) Test result: SUCCESS (XEN) HVM d65v0 save: CPU (XEN) HVM d65 save: PIC (XEN) HVM d65 save: IOAPIC (XEN) HVM d65v0 save: LAPIC (XEN) HVM d65v0 save: LAPIC_REGS (XEN) HVM d65 save: PCI_IRQ (XEN) HVM d65 save: ISA_IRQ (XEN) HVM d65 save: PCI_LINK (XEN) HVM d65 save: PIT (XEN) HVM d65 save: RTC (XEN) HVM d65 save: HPET (XEN) HVM d65 save: PMTIMER (XEN) HVM d65v0 save: MTRR (XEN) HVM d65 save: VIRIDIAN_DOMAIN (XEN) HVM d65v0 save: CPU_XSAVE (XEN) HVM d65v0 save: VIRIDIAN_VCPU (XEN) HVM d65v0 save: VMCE_VCPU (XEN) HVM d65v0 save: TSC_ADJUST (XEN) HVM d65v0 save: CPU_MSR (XEN) HVM65 restore: CPU 0 (d65) --- Xen Test Framework --- (d65) Environment: HVM 64bit (Long mode 4 levels) (d65) XSA-317 PoC (XEN) event_channel.c:265:d65v0 EVTCHNOP failure: domain 65, error -28 (d65) Success: Not vulnerable to XSA-317 (d65) Test result: SUCCESS (d66) --- Xen Test Framework --- (d66) Environment: PV 32bit (PAE 3 levels) (d66) Guest CPUID Faulting support (d66) Testing CPUID without faulting enabled (d66) Testing CPUID with faulting enabled (d66) Retesting CPUID without faulting enabled (d66) Test result: SUCCESS (d67) --- Xen Test Framework --- (d67) Environment: PV 32bit (PAE 3 levels) (d67) Live Patch Privilege Check (d67) test_upload: Xen correctly denied Live Patch calls (d67) test_list: Xen correctly denied Live Patch calls (d67) test_get: Xen correctly denied Live Patch calls (d67) test_action: Xen correctly denied Live Patch calls (d67) test_action: Xen correctly denied Live Patch calls (d67) test_action: Xen correctly denied Live Patch calls (d67) test_action: Xen correctly denied Live Patch calls (d67) Test result: SUCCESS (d68) --- Xen Test Framework --- (d68) Environment: PV 32bit (PAE 3 levels) (d68) Memory operand and segment emulation tests (d68) Test result: SUCCESS (d69) --- Xen Test Framework --- (d69) Environment: PV 32bit (PAE 3 levels) (d69) PV IOPL emulation (d69) Test: PHYSDEVOP_set_iopl (d69) vIOPL 0 (d69) vIOPL 1 (d69) vIOPL 3 (d69) Test result: SUCCESS (d70) --- Xen Test Framework --- (d70) Environment: PV 32bit (PAE 3 levels) (d70) PV IOPL emulation (d70) Test: VMASST_TYPE_architectural_iopl (d70) vIOPL 0 (d70) vIOPL 1 (d70) vIOPL 3 (d70) Test result: SUCCESS (d71) --- Xen Test Framework --- (d71) Environment: PV 32bit (PAE 3 levels) (d71) XSA-122 PoC (d71) XENVER_extraversion: (d71) Got '-unstable' (d71) XENVER_compile_info: (d71) Got 'gcc (Debian 8.3.0-6) 8.3.0' (d71) 'osstest' (d71) 'test-lab.xenproject.org' (d71) 'Thu Oct 22 18:09:08 UTC 2020' (d71) XENVER_changeset: (d71) Got 'Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116' (d71) Test result: SUCCESS (d72) --- Xen Test Framework --- (d72) Environment: PV 32bit (PAE 3 levels) (d72) XSA-183 PoC (d72) Xen is not vulnerable to XSA-183 (d72) Test result: SUCCESS (d73) --- Xen Test Framework --- (d73) Environment: PV 32bit (PAE 3 levels) (d73) XSA-185 PoC (d73) Creating recursive l3 mapping (d73) Attempt to create recursive l3 mapping was blocked (d73) Not vulerable to XSA-185 (d73) Test result: SUCCESS (d74) --- Xen Test Framework --- (d74) Environment: PV 32bit (PAE 3 levels) (d74) XSA-188 PoC (d74) Test result: SUCCESS (d75) --- Xen Test Framework --- (d75) Environment: PV 32bit (PAE 3 levels) (d75) XSA-194 PoC (d75) Success: No leak detected (d75) Test result: SUCCESS (d76) --- Xen Test Framework --- (d76) Environment: PV 32bit (PAE 3 levels) (d76) XSA-213 PoC (d76) Found Xen 4.15 (d76) Success: Not vulnerable to XSA-213 (d76) Test result: SUCCESS (d77) --- Xen Test Framework --- (d77) Environment: PV 32bit (PAE 3 levels) (d77) XSA-259 PoC (d77) Success: Not vulnerable to XSA-259 (d77) Test result: SUCCESS (d78) --- Xen Test Framework --- (d78) Environment: PV 32bit (PAE 3 levels) (d78) XSA-260 PoC (d78) Testing native syscall (d78) Hit #UD for syscall (not vulnerable) (d78) Success: Not vulnerable to XSA-260 (d78) Test result: SUCCESS (d79) --- Xen Test Framework --- (d79) Environment: PV 32bit (PAE 3 levels) (d79) XSA-296 PoC (d79) Success: Probably not vulnerable to XSA-296 (d79) Test result: SUCCESS (d80) --- Xen Test Framework --- (d80) Environment: PV 32bit (PAE 3 levels) (d80) XSA-298 PoC (d80) Success: Not vulnerable to XSA-298 (d80) Test result: SUCCESS (d81) --- Xen Test Framework --- (d81) Environment: PV 32bit (PAE 3 levels) (d81) XSA-317 PoC (XEN) event_channel.c:265:d81v0 EVTCHNOP failure: domain 81, error -28 (d81) Success: Not vulnerable to XSA-317 (d81) Test result: SUCCESS (d82) --- Xen Test Framework --- (d82) Environment: PV 32bit (PAE 3 levels) (d82) XSA-339 PoC (d82) Success: Not vulnerable to XSA-339 (d82) Test result: SUCCESS (d83) --- Xen Test Framework --- (d83) Environment: PV 64bit (Long mode 4 levels) (d83) Guest CPUID Faulting support (d83) Testing CPUID without faulting enabled (d83) Testing CPUID with faulting enabled (d83) Retesting CPUID without faulting enabled (d83) Test result: SUCCESS (d84) --- Xen Test Framework --- (d84) Environment: PV 64bit (Long mode 4 levels) (d84) Live Patch Privilege Check (d84) test_upload: Xen correctly denied Live Patch calls (d84) test_list: Xen correctly denied Live Patch calls (d84) test_get: Xen correctly denied Live Patch calls (d84) test_action: Xen correctly denied Live Patch calls (d84) test_action: Xen correctly denied Live Patch calls (d84) test_action: Xen correctly denied Live Patch calls (d84) test_action: Xen correctly denied Live Patch calls (d84) Test result: SUCCESS (d85) --- Xen Test Framework --- (d85) Environment: PV 64bit (Long mode 4 levels) (d85) Memory operand and segment emulation tests (d85) Test result: SUCCESS (d86) --- Xen Test Framework --- (d86) Environment: PV 64bit (Long mode 4 levels) (d86) Test PV FSGSBASE behaviour (d86) Test result: SUCCESS (d87) --- Xen Test Framework --- (d87) Environment: PV 64bit (Long mode 4 levels) (d87) PV IOPL emulation (d87) Test: PHYSDEVOP_set_iopl (d87) vIOPL 0 (d87) vIOPL 1 (d87) vIOPL 3 (d87) Test result: SUCCESS (d88) --- Xen Test Framework --- (d88) Environment: PV 64bit (Long mode 4 levels) (d88) PV IOPL emulation (d88) Test: VMASST_TYPE_architectural_iopl (d88) vIOPL 0 (d88) vIOPL 1 (d88) vIOPL 3 (d88) Test result: SUCCESS (d89) --- Xen Test Framework --- (d89) Environment: PV 64bit (Long mode 4 levels) (d89) XSA-122 PoC (d89) XENVER_extraversion: (d89) Got '-unstable' (d89) XENVER_compile_info: (d89) Got 'gcc (Debian 8.3.0-6) 8.3.0' (d89) 'osstest' (d89) 'test-lab.xenproject.org' (d89) 'Thu Oct 22 18:09:08 UTC 2020' (d89) XENVER_changeset: (d89) Got 'Thu Oct 15 10:16:09 2020 +0100 git:0dfddb2116' (d89) Test result: SUCCESS (d90) --- Xen Test Framework --- (d90) Environment: PV 64bit (Long mode 4 levels) (d90) XSA-167 PoC (d90) Attempting to mark mfn 0xffffffffffe00000 as a superpage (d90) PV superpage support not detected (d90) Test result: SKIP (d91) --- Xen Test Framework --- (d91) Environment: PV 64bit (Long mode 4 levels) (d91) XSA-182 PoC (d91) Creating recursive l4 mapping (d91) Remapping l4 RW (XEN) mm.c:1190:d91v0 Attempt to create linear p.t. with write perms (d91) Attempt to create writeable linear map was blocked (d91) Not vulnerable to XSA-182 (d91) Test result: SUCCESS (d92) --- Xen Test Framework --- (d92) Environment: PV 64bit (Long mode 4 levels) (d92) XSA-188 PoC (d92) Test result: SUCCESS (d93) --- Xen Test Framework --- (d93) Environment: PV 64bit (Long mode 4 levels) (d93) XSA-193 PoC (d93) Success: not vulnerable to XSA-193 (d93) Test result: SUCCESS (d94) --- Xen Test Framework --- (d94) Environment: PV 64bit (Long mode 4 levels) (d94) XSA-212 PoC (d94) XENMEM_exchange returned -14 (d94) Probably not vulnerable to XSA-212 (d94) Attempting to confirm... (d94) Success: Got #DE as expected (d94) Test result: SUCCESS (d95) --- Xen Test Framework --- (d95) Environment: PV 64bit (Long mode 4 levels) (d95) XSA-213 PoC (d95) Found Xen 4.15 (d95) Success: Not vulnerable to XSA-213 (d95) Test result: SUCCESS (d96) --- Xen Test Framework --- (d96) Environment: PV 64bit (Long mode 4 levels) (d96) XSA-221 PoC (d96) Success: Probably not vulnerable to XSA-221 (d96) Test result: SUCCESS (d97) --- Xen Test Framework --- (d97) Environment: PV 64bit (Long mode 4 levels) (d97) XSA-224 PoC (XEN) mm.c:2933:d97v0 Bad type (saw e400000000000001 != exp 2000000000000000) for mfn 861511 (pfn 00111) (XEN) mm.c:3431:d97v0 Error -22 while pinning mfn 861511 (d97) Success: Not vulnerable to XSA-224 (d97) Test result: SUCCESS (d98) --- Xen Test Framework --- (d98) Environment: PV 64bit (Long mode 4 levels) (d98) XSA-227 PoC (XEN) grant_table.c:71:d98v0 Misaligned PTE address 86155900e (d98) Probably not vulnerable to XSA-227 (d98) Attempting to confirm... (d98) Success: Not vulnerable to XSA-227 (d98) Test result: SUCCESS (d99) --- Xen Test Framework --- (d99) Environment: PV 64bit (Long mode 4 levels) (d99) XSA-231 PoC (d99) Success: Probably not vulnerable to XSA-231 (d99) Test result: SUCCESS (d100) --- Xen Test Framework --- (d100) Environment: PV 64bit (Long mode 4 levels) (d100) XSA-232 PoC (d100) Success: Probably not vulnerable to XSA-232 (d100) Test result: SUCCESS (d101) --- Xen Test Framework --- (d101) Environment: PV 64bit (Long mode 4 levels) (d101) XSA-234 PoC (XEN) grant_table.c:286:d101v0 PTE 001000087e512065 for 1000 doesn't match grant (c01000087e512067) (XEN) mm.c:2933:d101v0 Bad type (saw e400000000000001 != exp 2000000000000000) for mfn 87e512 (pfn 00112) (XEN) mm.c:3431:d101v0 Error -22 while pinning mfn 87e512 (d101) Success: Not vulnerable to XSA-234 (d101) Test result: SUCCESS (XEN) grant_table.c:3729:d0v26 Grant release 0 ref 0x8 flags 0x2 d101 (d102) --- Xen Test Framework --- (d102) Environment: PV 64bit (Long mode 4 levels) (d102) XSA-255 PoC (d102) Success: Not vulnerable to XSA-255 (d102) Test result: SUCCESS (d103) --- Xen Test Framework --- (d103) Environment: PV 64bit (Long mode 4 levels) (d103) XSA-259 PoC (d103) Success: Not vulnerable to XSA-259 (d103) Test result: SUCCESS (d104) --- Xen Test Framework --- (d104) Environment: PV 64bit (Long mode 4 levels) (d104) XSA-260 PoC (d104) Testing native syscall (XEN) d104v0 Hit #DB in Xen context: e008:ffff82d07ffd8300 [ffff82d07ffd8300], stk e010:8000000000112ff0, dr6 ffff0ff0 (d104) Entered XTF via syscall (d104) Testing compat syscall (d104) Hit #UD for syscall (not vulnerable) (d104) Success: Not vulnerable to XSA-260 (d104) Test result: SUCCESS (d105) --- Xen Test Framework --- (d105) Environment: PV 64bit (Long mode 4 levels) (d105) XSA-265 PoC (XEN) d105v0 Hit #DB in Xen context: e008:ffff82d040394bd0 [int3], stk 0000:ffff830868f3ff78, dr6 ffff2ff0 (d105) Success: Not vulnerable to XSA-265 (d105) Test result: SUCCESS (d106) --- Xen Test Framework --- (d106) Environment: PV 64bit (Long mode 4 levels) (d106) XSA-279 PoC (d106) Success: Not vulnerable to XSA-279 (d106) Test result: SUCCESS (d107) --- Xen Test Framework --- (d107) Environment: PV 64bit (Long mode 4 levels) (d107) XSA-296 PoC (XEN) d107 L1TF-vulnerable L3e 000000087e513000 - Shadowing (d107) Success: Not vulnerable to XSA-296 (d107) Test result: SUCCESS (d108) --- Xen Test Framework --- (d108) Environment: PV 64bit (Long mode 4 levels) (d108) XSA-298 PoC (d108) Success: Not vulnerable to XSA-298 (d108) Test result: SUCCESS (d109) --- Xen Test Framework --- (d109) Environment: PV 64bit (Long mode 4 levels) (d109) XSA-316 PoC (XEN) grant_table.c:790:d109v0 Bad flags (0) or dom (0); expected d109 (d109) Success: Not vulnerable to XSA-316 (d109) Test result: SUCCESS (d110) --- Xen Test Framework --- (d110) Environment: PV 64bit (Long mode 4 levels) (d110) XSA-317 PoC (XEN) event_channel.c:265:d110v0 EVTCHNOP failure: domain 110, error -28 (d110) Success: Not vulnerable to XSA-317 (d110) Test result: SUCCESS (d111) --- Xen Test Framework --- (d111) Environment: PV 64bit (Long mode 4 levels) (d111) XSA-333 PoC (d111) Success: Not vulnerable to XSA-333 (d111) Test result: SUCCESS (d112) --- Xen Test Framework --- (d112) Environment: PV 64bit (Long mode 4 levels) (d112) XSA-339 PoC (d112) Success: Not vulnerable to XSA-339 (d112) Test result: SUCCESS