Apr 24 04:12:06.414332 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:06.424783 (XEN) Apr 24 04:12:06.424812 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:06.424846 (XEN) HPFAR_EL2: 0000009010800300 Apr 24 04:12:06.424871 (XEN) FAR_EL2: ffff80000b030100 Apr 24 04:12:06.424894 (XEN) Apr 24 04:12:06.436789 (XEN) Xen stack trace from sp=0000800ffb3afe60: Apr 24 04:12:06.436823 (XEN) 0000800ffb3afe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:06.436863 (XEN) 0000000000000019 0000000000000000 0000000000000000 0000000000000109 Apr 24 04:12:06.448786 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.460786 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.460820 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.472791 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.472838 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.484788 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.484822 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.496786 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.508793 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.508840 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.520784 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.520818 (XEN) Xen call trace: Apr 24 04:12:06.520842 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:06.532796 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:06.532847 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:06.544790 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:06.544823 (XEN) Apr 24 04:12:06.544845 (XEN) *** Dumping CPU26 host state: *** Apr 24 04:12:06.556789 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:06.556837 (XEN) CPU: 26 Apr 24 04:12:06.556861 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:06.568790 (XEN) LR: 00000a0000276fcc Apr 24 04:12:06.568822 (XEN) SP: 0000800ffb3a7e60 Apr 24 04:12:06.568846 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:06.580789 (XEN) X0: 0000000000000000 X1: 0000760ffb072000 X2: 0000800ffb3b2078 Apr 24 04:12:06.580824 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:06.592788 (XEN) X6: 00000a00003825c8 X7: 0000800ffb3b1150 X8: 0000000000000012 Apr 24 04:12:06.592823 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:06.604790 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:06.604824 (XEN) X15: ffff00003118fa0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:06.616791 (XEN) X18: ffff8000100f3c58 X19: 00000a00003825c8 X20: 000000000000001a Apr 24 04:12:06.628785 (XEN) X21: 00000a0000346180 X22: 0000000004000000 X23: 000000000000001a Apr 24 04:12:06.628820 (XEN) X24: 000000000000001a X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:06.640791 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb3a7e60 Apr 24 04:12:06.640826 (XEN) Apr 24 04:12:06.640863 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:06.656811 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:06.656811 (XEN) Apr 24 04:12:06.656811 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:06.656811 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:06.656811 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:06.656811 (XEN) Apr 24 04:12:06.656811 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:06.668655 (XEN) HPFAR_EL2: 0000009010800f00 Apr 24 04:12:06.668655 (XEN) FAR_EL2: ffff80000b0f0100 Apr 24 04:12:06.668655 (XEN) Apr 24 04:12:06.668655 (XEN) Xen stack trace from sp=0000800ffb3a7e60: Apr 24 04:12:06.680826 (XEN) 0000800ffb3a7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:06.680870 (XEN) 000000000000001a 0000000000000000 0000000000000000 000000000000010a Apr 24 04:12:06.692791 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.692839 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.704743 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.704743 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.712855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.724871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.724919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.736865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.748779 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.748814 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.760849 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.760895 (XEN) Xen call trace: Apr 24 04:12:06.760919 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:06.772840 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:06.784754 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:06.784788 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:06.784825 (XEN) Apr 24 04:12:06.784847 (XEN) *** Dumping CPU27 host state: *** Apr 24 04:12:06.796690 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:06.796690 (XEN) CPU: 27 Apr 24 04:12:06.796690 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:06.808852 (XEN) LR: 00000a0000276fcc Apr 24 04:12:06.808892 (XEN) SP: 0000800ffe057e60 Apr 24 04:12:06.808917 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:06.820850 (XEN) X0: 0000000000000000 X1: 0000760ffdd1e000 X2: 0000800ffe05e078 Apr 24 04:12:06.820885 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:06.832862 (XEN) X6: 00000a00003825c8 X7: 0000800ffb3b1590 X8: 0000000000000012 Apr 24 04:12:06.832898 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:06.844785 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:06.860747 (XEN) X15: 0000000000000003 X16: 0000000000000217 X17: 0000000000000000 Apr 24 04:12:06.860747 (XEN) X18: 0000000000000217 X19: 00000a00003825c8 X20: 000000000000001b Apr 24 04:12:06.860747 (XEN) X21: 00000a0000346200 X22: 0000000008000000 X23: 000000000000001b Apr 24 04:12:06.868730 (XEN) X24: 000000000000001b X25: Apr 24 04:12:06.869620 0000000000000000 X26: 0000000000000000 Apr 24 04:12:06.884916 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffe057e60 Apr 24 04:12:06.884963 (XEN) Apr 24 04:12:06.884985 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:06.885024 (XEN) VTTBR_EL2: 00010 Apr 24 04:12:06.888163 107fb649000 Apr 24 04:12:06.896787 (XEN) Apr 24 04:12:06.896815 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:06.896839 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:06.896863 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:06.896897 (XEN) Apr 24 04:12:06.896919 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:06.908886 (XEN) HPFAR_EL2: 0000009010801b00 Apr 24 04:12:06.908919 (XEN) FAR_EL2: ffff80000b1b0100 Apr 24 04:12:06.908963 (XEN) Apr 24 04:12:06.908999 (XEN) Xen stack trace from sp=0000800ffe057e60: Apr 24 04:12:06.920848 (XEN) 0000800ffe057e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:06.920883 (XEN) 000000000000001b 0000000000000000 0000000000000000 000000000000010b Apr 24 04:12:06.932848 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.932882 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.940843 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.952862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.952896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.964881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.976750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.976750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.988898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:06.988898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.000741 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.000741 (XEN) Xen call trace: Apr 24 04:12:07.012749 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:07.012749 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:07.024746 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:07.024746 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:07.024746 (XEN) Apr 24 04:12:07.024746 (XEN) *** Dumping CPU28 host state: *** Apr 24 04:12:07.036750 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:07.036750 (XEN) CPU: 28 Apr 24 04:12:07.036750 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:07.048749 (XEN) LR: 00000a0000276fcc Apr 24 04:12:07.048749 (XEN) SP: 0000800ffe04fe60 Apr 24 04:12:07.048749 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:07.060746 (XEN) X0: 0000000000000000 X1: 0000760ffdd1c000 X2: 0000800ffe05c078 Apr 24 04:12:07.060746 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:07.072742 (XEN) X6: 00000a00003825c8 X7: 0000800ffb3b1a50 X8: 0000000000000012 Apr 24 04:12:07.084745 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:07.084745 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:07.096839 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:07.096839 (XEN) X18: 0000000000000000 X19: 00000a00003825c8 X20: 000000000000001c Apr 24 04:12:07.108837 (XEN) X21: 00000a0000346280 X22: 0000000010000000 X23: 000000000000001c Apr 24 04:12:07.108897 (XEN) X24: 000000000000001c X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:07.120893 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffe04fe60 Apr 24 04:12:07.120893 (XEN) Apr 24 04:12:07.120893 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:07.132882 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:07.132922 (XEN) Apr 24 04:12:07.132968 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:07.132992 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:07.144821 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:07.144854 (XEN) Apr 24 04:12:07.144876 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:07.144912 (XEN) HPFAR_EL2: 0000009010802700 Apr 24 04:12:07.144936 (XEN) FAR_EL2: ffff80000b270100 Apr 24 04:12:07.156870 (XEN) Apr 24 04:12:07.156900 (XEN) Xen stack trace from sp=0000800ffe04fe60: Apr 24 04:12:07.156925 (XEN) 0000800ffe04fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:07.168891 (XEN) 000000000000001c 0000000000000000 0000000000000000 000000000000010c Apr 24 04:12:07.168927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.180862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.180896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.192860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.192907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.204881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.227563 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.227619 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.228815 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.228850 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.240861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.240896 (XEN) Xen call trace: Apr 24 04:12:07.252861 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:07.252898 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:07.264867 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:07.264901 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:07.264927 (XEN) Apr 24 04:12:07.276860 (XEN) *** Dumping CPU29 host state: *** Apr 24 04:12:07.276893 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:07.276920 (XEN) CPU: 29 Apr 24 04:12:07.276943 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:07.288875 (XEN) LR: 00000a0000276fcc Apr 24 04:12:07.288919 (XEN) SP: 0000800ffe047e60 Apr 24 04:12:07.288943 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:07.300870 (XEN) X0: 0000000000000000 X1: 0000760ffdd18000 X2: 0000800ffe058078 Apr 24 04:12:07.300906 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:07.312870 (XEN) X6: 00000a00003825c8 X7: 0000800ffdddf010 X8: 0000000000000012 Apr 24 04:12:07.324862 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:07.324897 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:07.336865 (XEN) X15: ffff000032a4b10c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:07.336901 (XEN) X18: ffff80000d3abc58 X19: 00000a00003825c8 X20: 000000000000001d Apr 24 04:12:07.348865 (XEN) X21: 00000a0000346300 X22: 0000000020000000 X23: 000000000000001d Apr 24 04:12:07.348913 (XEN) X24: 000000000000001d X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:07.360872 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffe047e60 Apr 24 04:12:07.360907 (XEN) Apr 24 04:12:07.372866 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:07.372898 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:07.372935 (XEN) Apr 24 04:12:07.372957 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:07.372981 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:07.384863 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:07.384895 (XEN) Apr 24 04:12:07.384917 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:07.384941 (XEN) HPFAR_EL2: 0000009010803300 Apr 24 04:12:07.384964 (XEN) FAR_EL2: ffff80000b330100 Apr 24 04:12:07.396867 (XEN) Apr 24 04:12:07.396896 (XEN) Xen stack trace from sp=0000800ffe047e60: Apr 24 04:12:07.396922 (XEN) 0000800ffe047e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:07.408874 (XEN) 000000000000001d 0000000000000000 0000000000000000 000000000000010d Apr 24 04:12:07.408908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.420893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.420928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.432865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.444859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.444894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.456860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.456894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.468855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.468890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.480871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.480905 (XEN) Xen call trace: Apr 24 04:12:07.492857 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:07.492893 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:07.504811 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:07.504846 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:07.516708 (XEN) Apr 24 04:12:07.516708 (XEN) *** Dumping CPU30 host state: *** Apr 24 04:12:07.516708 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:07.516708 (XEN) CPU: 30 Apr 24 04:12:07.516708 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:07.528804 (XEN) LR: 00000a0000276fcc Apr 24 04:12:07.528804 (XEN) SP: 0000800ffddd7e60 Apr 24 04:12:07.528804 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:07.540909 (XEN) X0: 0000000000000000 X1: 0000760ffda9c000 X2: 0000800ffdddc078 Apr 24 04:12:07.552865 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:07.552900 (XEN) X6: 00000a00003825c8 X7: 0000800ffdddf410 X8: 0000000000000012 Apr 24 04:12:07.564861 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:07.564895 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:07.576868 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:07.576903 (XEN) X18: 0000000000000000 X19: 00000a00003825c8 X20: 000000000000001e Apr 24 04:12:07.588867 (XEN) X21: 00000a0000346380 X22: 0000000040000000 X23: 000000000000001e Apr 24 04:12:07.588902 (XEN) X24: 000000000000001e X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:07.600872 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffddd7e60 Apr 24 04:12:07.612866 (XEN) Apr 24 04:12:07.612896 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:07.612921 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:07.612944 (XEN) Apr 24 04:12:07.612965 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:07.612989 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:07.624862 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:07.624894 (XEN) Apr 24 04:12:07.624916 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:07.624940 (XEN) HPFAR_EL2: 0000009010803f00 Apr 24 04:12:07.636863 (XEN) FAR_EL2: ffff80000b3f0100 Apr 24 04:12:07.636895 (XEN) Apr 24 04:12:07.636917 (XEN) Xen stack trace from sp=0000800ffddd7e60: Apr 24 04:12:07.636942 (XEN) 0000800ffddd7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:07.648868 (XEN) 000000000000001e 0000000000000000 0000000000000000 000000000000010e Apr 24 04:12:07.648902 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.660870 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.660905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.672894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.684862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.684896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.696907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.696907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.708881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.708921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.720876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.732865 (XEN) Xen call trace: Apr 24 04:12:07.732896 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:07.732925 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:07.744864 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:07.744899 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:07.756859 (XEN) Apr 24 04:12:07.756889 (XEN) *** Dumping CPU31 host state: *** Apr 24 04:12:07.756914 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:07.756941 (XEN) CPU: 31 Apr 24 04:12:07.768869 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:07.768904 (XEN) LR: 00000a0000276fcc Apr 24 04:12:07.768928 (XEN) SP: 0000800ffddcfe60 Apr 24 04:12:07.780869 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:07.780905 (XEN) X0: 0000000000000000 X1: 0000760ffda9a000 X2: 0000800ffddda078 Apr 24 04:12:07.792864 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:07.792899 (XEN) X6: 00000a00003825c8 X7: 0000800ffdddf8d0 X8: 0000000000000012 Apr 24 04:12:07.804865 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:07.804899 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:07.816866 (XEN) X15: 0000000000000003 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:07.816900 (XEN) X18: 0000000000000000 X19: 00000a00003825c8 X20: 000000000000001f Apr 24 04:12:07.828868 (XEN) X21: 00000a0000346400 X22: 0000000080000000 X23: 000000000000001f Apr 24 04:12:07.840865 (XEN) X24: 000000000000001f X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:07.840900 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffddcfe60 Apr 24 04:12:07.852864 (XEN) Apr 24 04:12:07.852893 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:07.852918 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:07.852942 (XEN) Apr 24 04:12:07.852963 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:07.864865 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:07.864897 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:07.864921 (XEN) Apr 24 04:12:07.864943 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:07.864966 (XEN) HPFAR_EL2: 0000009010804d00 Apr 24 04:12:07.876865 (XEN) FAR_EL2: ffff80000b4d0100 Apr 24 04:12:07.876898 (XEN) Apr 24 04:12:07.876920 (XEN) Xen stack trace from sp=0000800ffddcfe60: Apr 24 04:12:07.876945 (XEN) 0000800ffddcfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:07.888869 (XEN) 000000000000001f 0000000000000000 0000000000000000 000000000000010f Apr 24 04:12:07.888903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.900872 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.912860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.912894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.924861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.924926 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.936860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.936894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.948866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.960859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.960894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:07.972865 (XEN) Xen call trace: Apr 24 04:12:07.972896 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:07.972926 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:07.984862 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:07.984896 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:07.996858 (XEN) Apr 24 04:12:07.996888 (XEN) *** Dumping CPU32 host state: *** Apr 24 04:12:07.996913 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:08.008858 (XEN) CPU: 32 Apr 24 04:12:08.008889 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:08.008917 (XEN) LR: 00000a0000276fcc Apr 24 04:12:08.008940 (XEN) SP: 0000800ffda5fe60 Apr 24 04:12:08.020869 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:08.020905 (XEN) X0: 0000000000000000 X1: 0000760ffda86000 X2: 0000800ffddc6078 Apr 24 04:12:08.032869 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:08.032904 (XEN) X6: 00000a00003825c8 X7: 0000800ffdddfd90 X8: 0000000000000012 Apr 24 04:12:08.044862 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:08.044897 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:08.056865 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:08.056899 (XEN) X18: ffff0000264f01a0 X19: 00000a00003825cc X20: 0000000000000020 Apr 24 04:12:08.068870 (XEN) X21: 00000a0000346480 X22: 0000000000000001 X23: 0000000000000020 Apr 24 04:12:08.080860 (XEN) X24: 0000000000000020 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:08.080894 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffda5fe60 Apr 24 04:12:08.092863 (XEN) Apr 24 04:12:08.092892 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:08.092916 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:08.092940 (XEN) Apr 24 04:12:08.092961 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:08.104863 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:08.104895 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:08.104919 (XEN) Apr 24 04:12:08.104941 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:08.104964 (XEN) HPFAR_EL2: 0000009010805900 Apr 24 04:12:08.116863 (XEN) FAR_EL2: ffff80000b590100 Apr 24 04:12:08.116896 (XEN) Apr 24 04:12:08.116918 (XEN) Xen stack trace from sp=0000800ffda5fe60: Apr 24 04:12:08.116943 (XEN) 0000800ffda5fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:08.128869 (XEN) 0000000000000020 0000000000000000 0000000000000000 0000000000000200 Apr 24 04:12:08.140859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.140895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.152867 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.152901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.164864 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.164899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.176861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.176927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.188865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.200861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.200895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.212863 (XEN) Xen call trace: Apr 24 04:12:08.212894 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:08.212923 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:08.224871 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:08.224905 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:08.236863 (XEN) Apr 24 04:12:08.236892 (XEN) *** Dumping CPU33 host state: *** Apr 24 04:12:08.236918 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:08.248855 (XEN) CPU: 33 Apr 24 04:12:08.248885 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:08.248914 (XEN) LR: 00000a0000276fcc Apr 24 04:12:08.248937 (XEN) SP: 0000800ffda57e60 Apr 24 04:12:08.260860 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:08.260895 (XEN) X0: 0000000000000000 X1: 0000760ffda82000 X2: 0000800ffddc2078 Apr 24 04:12:08.272868 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:08.272902 (XEN) X6: 00000a00003825c8 X7: 0000800ffddc5280 X8: 0000000000000012 Apr 24 04:12:08.284867 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 04:12:08.284901 (XEN) X12: 0000000000000001 X13: 0000000000000003 X14: 0000000000000003 Apr 24 04:12:08.296862 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:08.308863 (XEN) X18: ffff0000264f01a0 X19: 00000a00003825cc X20: 0000000000000021 Apr 24 04:12:08.308898 (XEN) X21: 00000a0000346500 X22: 0000000000000002 X23: 0000000000000021 Apr 24 04:12:08.320862 (XEN) X24: 0000000000000021 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:08.320897 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffda57e60 Apr 24 04:12:08.332859 (XEN) Apr 24 04:12:08.332889 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:08.332914 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:08.332938 (XEN) Apr 24 04:12:08.332959 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:08.344862 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:08.344894 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:08.344918 (XEN) Apr 24 04:12:08.344940 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:08.356855 (XEN) HPFAR_EL2: 0000008010800500 Apr 24 04:12:08.356887 (XEN) FAR_EL2: ffff80000a850100 Apr 24 04:12:08.356912 (XEN) Apr 24 04:12:08.356933 (XEN) Xen stack trace from sp=0000800ffda57e60: Apr 24 04:12:08.356958 (XEN) 0000800ffda57e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:08.368872 (XEN) 0000000000000021 0000000000000000 0000000000000000 0000000000000201 Apr 24 04:12:08.380862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.380896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.392862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.392896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.404863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.404897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.416860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.428859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.428894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.440892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.440927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.452862 (XEN) Xen call trace: Apr 24 04:12:08.452893 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:08.452921 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:08.464864 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:08.464898 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:08.476868 (XEN) Apr 24 04:12:08.476897 (XEN) *** Dumping CPU34 host state: *** Apr 24 04:12:08.476922 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:08.488864 (XEN) CPU: 34 Apr 24 04:12:08.488894 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:08.488923 (XEN) LR: 00000a0000276fcc Apr 24 04:12:08.500864 (XEN) SP: 0000800ffda47e60 Apr 24 04:12:08.500896 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:08.500925 (XEN) X0: 0000000000000000 X1: 0000760ffda80000 X2: 0000800ffddc0078 Apr 24 04:12:08.512864 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:08.512898 (XEN) X6: 00000a00003825c8 X7: 0000800ffddc5740 X8: 0000000000000012 Apr 24 04:12:08.524864 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:08.536867 (XEN) X12: 0000000000000001 X13: 00000000000003a4 X14: 00000000000003a4 Apr 24 04:12:08.536902 (XEN) X15: 00003d0900000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:08.548863 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000022 Apr 24 04:12:08.548898 (XEN) X21: 00000a0000346580 X22: 0000000000000004 X23: 0000000000000022 Apr 24 04:12:08.560862 (XEN) X24: 0000000000000022 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:08.560897 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffda47e60 Apr 24 04:12:08.572867 (XEN) Apr 24 04:12:08.572896 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:08.572921 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:08.572944 (XEN) Apr 24 04:12:08.572966 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:08.584862 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:08.584894 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:08.584918 (XEN) Apr 24 04:12:08.584940 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:08.596860 (XEN) HPFAR_EL2: 0000008010801100 Apr 24 04:12:08.596892 (XEN) FAR_EL2: ffff80000a910100 Apr 24 04:12:08.596917 (XEN) Apr 24 04:12:08.596938 (XEN) Xen stack trace from sp=0000800ffda47e60: Apr 24 04:12:08.608857 (XEN) 0000800ffda47e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:08.608893 (XEN) 0000000000000022 0000000000000000 0000000000000000 0000000000000202 Apr 24 04:12:08.620863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.620897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.632860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.632895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.644856 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.644890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.656867 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.668797 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.668832 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.684815 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.684850 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.696684 (XEN) Xen call trace: Apr 24 04:12:08.696684 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:08.696684 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:08.708648 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:08.708648 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:08.716863 (XEN) Apr 24 04:12:08.716900 (XEN) *** Dumping CPU35 host state: *** Apr 24 04:12:08.716926 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:08.728867 (XEN) CPU: 35 Apr 24 04:12:08.728898 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:08.728926 (XEN) LR: 00000a0000276fcc Apr 24 04:12:08.740864 (XEN) SP: 0000800ffb85fe60 Apr 24 04:12:08.740896 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:08.740924 (XEN) X0: 0000000000000000 X1: 0000760ffd70c000 X2: 0000800ffda4c078 Apr 24 04:12:08.752878 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:08.752878 (XEN) X6: 00000a00003825c8 X7: 0000800ffddc5c00 X8: 0000000000000012 Apr 24 04:12:08.764751 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 04:12:08.780755 (XEN) X12: 0000000000000001 X13: 0000000000000015 X14: 0000000000000015 Apr 24 04:12:08.780755 (XEN) X15: ffff000028798d58 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:08.780755 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000023 Apr 24 04:12:08.792688 (XEN) X21: 00000a0000346600 X22: 0000000000000008 X23: 0000000000000023 Apr 24 04:12:08.792688 (XEN) X24: 0000000000000023 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:08.804843 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb85fe60 Apr 24 04:12:08.816811 (XEN) Apr 24 04:12:08.816849 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:08.816874 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:08.816899 (XEN) Apr 24 04:12:08.816920 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:08.816943 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:08.828828 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:08.828860 (XEN) Apr 24 04:12:08.828883 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:08.828907 (XEN) HPFAR_EL2: 0000008010801d00 Apr 24 04:12:08.840846 (XEN) FAR_EL2: ffff80000a9d0100 Apr 24 04:12:08.840878 (XEN) Apr 24 04:12:08.840900 (XEN) Xen stack trace from sp=0000800ffb85fe60: Apr 24 04:12:08.840925 (XEN) 0000800ffb85fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:08.848851 (XEN) 0000000000000023 0000000000000000 0000000000000000 0000000000000203 Apr 24 04:12:08.860796 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.860831 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.872755 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.872791 (XEN) 00 Apr 24 04:12:08.880283 00000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:08.884851 (XEN) 0000000000000000 0000000000000000 0000000000000000 000000000000 Apr 24 04:12:08.886117 0000 Apr 24 04:12:08.896754 (XEN) (XEN) sched_smt_power_savings: disabled Apr 24 04:12:08.896754 0000000000000000(XEN) NOW=1273529773020 Apr 24 04:12:08.896754 0000000000000000(XEN) Online Cpus: 0-95 Apr 24 04:12:08.908747 0000000000000000(XEN) Cpupool 0: Apr 24 04:12:08.908747 0000000000000000(XEN) Cpus: 0-95 Apr 24 04:12:08.908747 Apr 24 04:12:08.908747 (XEN) (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource Apr 24 04:12:08.920757 0000000000000000(XEN) Scheduler: SMP Credit Scheduler rev2 (credit2) Apr 24 04:12:08.920757 0000000000000000(XEN) Active queues: 6 Apr 24 04:12:08.920757 (XEN) default-weight = 256 Apr 24 04:12:08.932756 0000000000000000(XEN) Runqueue 0: Apr 24 04:12:08.932756 (XEN) ncpus = 16 Apr 24 04:12:08.932756 (XEN) cpus = 0-15 Apr 24 04:12:08.932756 (XEN) max_weight = 256 Apr 24 04:12:08.944748 (XEN) pick_bias = 14 Apr 24 04:12:08.944748 (XEN) instload = 0 Apr 24 04:12:08.944748 (XEN) aveload = 505 (~0%) Apr 24 04:12:08.944748 0000000000000000(XEN) idlers: 00000000,00000000,0000fffe Apr 24 04:12:08.956748 (XEN) tickled: 00000000,00000000,00000000 Apr 24 04:12:08.956748 (XEN) fully idle cores: 00000000,00000000,0000fffe Apr 24 04:12:08.956748 Apr 24 04:12:08.956748 (XEN) (XEN) Runqueue 1: Apr 24 04:12:08.968891 (XEN) ncpus = 16 Apr 24 04:12:08.968962 (XEN) cpus = 16-31 Apr 24 04:12:08.968962 (XEN) max_weight = 256 Apr 24 04:12:08.968962 (XEN) pick_bias = 21 Apr 24 04:12:08.980749 (XEN) instload = 0 Apr 24 04:12:08.980749 (XEN) aveload = 1493 (~0%) Apr 24 04:12:08.980749 0000000000000000(XEN) idlers: 00000000,00000000,ffff0000 Apr 24 04:12:08.992747 (XEN) tickled: 00000000,00000000,00000000 Apr 24 04:12:08.992747 (XEN) fully idle cores: 00000000,00000000,ffff0000 Apr 24 04:12:08.992747 0000000000000000(XEN) Runqueue 2: Apr 24 04:12:09.004905 (XEN) ncpus = 16 Apr 24 04:12:09.004945 (XEN) cpus = 32-47 Apr 24 04:12:09.004970 (XEN) max_weight = 256 Apr 24 04:12:09.004994 (XEN) pick_bias = 43 Apr 24 04:12:09.016868 (XEN) instload = 0 Apr 24 04:12:09.016900 (XEN) aveload = 32846 (~12%) Apr 24 04:12:09.016926 0000000000000000(XEN) idlers: 00000000,0000ffff,00000000 Apr 24 04:12:09.028861 (XEN) tickled: 00000000,00000000,00000000 Apr 24 04:12:09.028894 (XEN) fully idle cores: 00000000,0000ffff,00000000 Apr 24 04:12:09.028921 0000000000000000(XEN) Runqueue 3: Apr 24 04:12:09.040865 (XEN) ncpus = 16 Apr 24 04:12:09.040897 (XEN) cpus = 48-63 Apr 24 04:12:09.040921 (XEN) max_weight = 256 Apr 24 04:12:09.040945 (XEN) pick_bias = 53 Apr 24 04:12:09.040969 (XEN) instload = 0 Apr 24 04:12:09.052864 (XEN) aveload = 100 (~0%) Apr 24 04:12:09.052896 Apr 24 04:12:09.052917 (XEN) (XEN) idlers: 00000000,ffff0000,00000000 Apr 24 04:12:09.052942 (XEN) tickled: 00000000,00000000,00000000 Apr 24 04:12:09.064862 (XEN) fully idle cores: 00000000,ffff0000,00000000 Apr 24 04:12:09.064895 0000000000000000(XEN) Runqueue 4: Apr 24 04:12:09.064920 (XEN) ncpus = 16 Apr 24 04:12:09.076859 (XEN) cpus = 64-79 Apr 24 04:12:09.076891 (XEN) max_weight = 256 Apr 24 04:12:09.076917 (XEN) pick_bias = 71 Apr 24 04:12:09.076940 (XEN) instload = 0 Apr 24 04:12:09.088859 (XEN) aveload = 0 (~0%) Apr 24 04:12:09.088892 0000000000000000(XEN) idlers: 0000ffff,00000000,00000000 Apr 24 04:12:09.088919 (XEN) tickled: 00000000,00000000,00000000 Apr 24 04:12:09.100853 (XEN) fully idle cores: 0000ffff,00000000,00000000 Apr 24 04:12:09.100887 0000000000000000(XEN) Runqueue 5: Apr 24 04:12:09.100912 (XEN) ncpus = 16 Apr 24 04:12:09.112860 (XEN) cpus = 80-95 Apr 24 04:12:09.112892 (XEN) max_weight = 256 Apr 24 04:12:09.112917 (XEN) pick_bias = 81 Apr 24 04:12:09.112940 (XEN) instload = 0 Apr 24 04:12:09.112963 (XEN) aveload = 1171 (~0%) Apr 24 04:12:09.124860 0000000000000000(XEN) idlers: ffff0000,00000000,00000000 Apr 24 04:12:09.124893 (XEN) tickled: 00000000,00000000,00000000 Apr 24 04:12:09.136857 (XEN) fully idle cores: ffff0000,00000000,00000000 Apr 24 04:12:09.136891 Apr 24 04:12:09.136912 (XEN) (XEN) Domain info: Apr 24 04:12:09.136936 0000000000000000(XEN) Domain: 0 w 256 c 0 v 96 Apr 24 04:12:09.136960 0000000000000000(XEN) 1: 0000000000000000[0.0] flags=0 cpu=17 0000000000000000 credit=10411390 [w=256] Apr 24 04:12:09.148904 (XEN) load=24 (~0%) 0000000000000000 Apr 24 04:12:09.160866 0000000000000000(XEN) 2: 0000000000000000[0.1] flags=0 cpu=53 0000000000000000 credit=10500000 [w=256] Apr 24 04:12:09.160906 load=8 (~0%)(XEN) Xen call trace: Apr 24 04:12:09.172861 Apr 24 04:12:09.172889 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:09.172918 (XEN) 3: (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:09.184874 [0.2] flags=0 cpu=33(XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:09.184910 credit=10500000 [w=256](XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:09.196867 load=64 (~0%)(XEN) Apr 24 04:12:09.196898 Apr 24 04:12:09.196920 (XEN) *** Dumping CPU36 host state: *** Apr 24 04:12:09.196944 (XEN) 4: (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:09.208866 [0.3] flags=0 cpu=50(XEN) CPU: 36 Apr 24 04:12:09.208898 credit=9377770 [w=256](XEN) PC: 00000a0000276fe8 load=42 (~0%) arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:09.220866 Apr 24 04:12:09.220894 (XEN) 5: (XEN) LR: 00000a0000276fcc Apr 24 04:12:09.220920 [0.4] flags=0 cpu=81(XEN) SP: 0000800ffb857e60 Apr 24 04:12:09.232868 credit=3056630 [w=256](XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:09.232907 load=747 (~0%)(XEN) X0: 0000000000000000 X1: 0000760ffd70a000 X2: 0000800ffda4a078 Apr 24 04:12:09.244873 Apr 24 04:12:09.244901 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:09.256865 (XEN) 6: (XEN) X6: 00000a00003825c8 X7: 0000800ffda48150 X8: 0000000000000012 Apr 24 04:12:09.256903 [0.5] flags=0 cpu=84(XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:09.268875 credit=1516450 [w=256](XEN) X12: 0000000000000001 X13: 00000000000000e3 X14: 00000000000000e3 Apr 24 04:12:09.280872 load=610 (~0%)(XEN) X15: ffff00002c85a40c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:09.280910 Apr 24 04:12:09.280931 (XEN) X18: ffff80000b60bc58 X19: 00000a00003825cc X20: 0000000000000024 Apr 24 04:12:09.292878 (XEN) 7: (XEN) X21: 00000a0000346680 X22: 0000000000000010 X23: 0000000000000024 Apr 24 04:12:09.304862 [0.6] flags=0 cpu=8(XEN) X24: 0000000000000024 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:09.304901 credit=7466450 [w=256](XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb857e60 Apr 24 04:12:09.316872 load=733 (~0%)(XEN) Apr 24 04:12:09.316902 Apr 24 04:12:09.316923 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:09.328856 (XEN) 8: (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:09.328890 [0.7] flags=0 cpu=20(XEN) Apr 24 04:12:09.328914 credit=7340260 [w=256](XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:09.328940 load=771 (~0%)(XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:09.340866 Apr 24 04:12:09.340895 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:09.340920 (XEN) 9: (XEN) Apr 24 04:12:09.340942 [0.8] flags=0 cpu=34(XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:09.352862 credit=8045170 [w=256](XEN) HPFAR_EL2: 0000008010802900 Apr 24 04:12:09.352896 load=630 (~0%)(XEN) FAR_EL2: ffff80000aa90100 Apr 24 04:12:09.352923 Apr 24 04:12:09.352944 (XEN) Apr 24 04:12:09.364866 (XEN) 10: (XEN) Xen stack trace from sp=0000800ffb857e60: Apr 24 04:12:09.364902 (XEN) [0.9] flags=0 cpu=51 0000800ffb857e70 credit=8224880 [w=256] 00000a0000283a58 load=2950 (~1%) 00000a0000341420 Apr 24 04:12:09.376868 00000a00003785a8(XEN) 11: Apr 24 04:12:09.376899 (XEN) [0.10] flags=0 cpu=19 0000000000000024 credit=9790200 [w=256] 0000000000000000 load=625 (~0%) 0000000000000000 Apr 24 04:12:09.388870 0000000000000204(XEN) 12: Apr 24 04:12:09.388901 (XEN) [0.11] flags=0 cpu=84 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) 0000000000000000 Apr 24 04:12:09.400868 0000000000000000(XEN) 13: Apr 24 04:12:09.400930 (XEN) [0.12] flags=0 cpu=8 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:09.412875 0000000000000000(XEN) 14: Apr 24 04:12:09.412906 (XEN) [0.13] flags=0 cpu=20 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) 0000000000000000 Apr 24 04:12:09.424872 0000000000000000(XEN) 15: Apr 24 04:12:09.424902 (XEN) [0.14] flags=0 cpu=35 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=173 (~0%) 0000000000000000 Apr 24 04:12:09.436869 0000000000000000(XEN) 16: Apr 24 04:12:09.448860 (XEN) [0.15] flags=0 cpu=56 0000000000000000 credit=7331420 [w=256] 0000000000000000 load=54 (~0%) 0000000000000000 Apr 24 04:12:09.448901 0000000000000000(XEN) 17: Apr 24 04:12:09.460863 (XEN) [0.16] flags=0 cpu=70 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:09.460904 0000000000000000(XEN) 18: Apr 24 04:12:09.472826 (XEN) [0.17] flags=0 cpu=83 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=8 (~0%) 0000000000000000 Apr 24 04:12:09.484855 0000000000000000(XEN) 19: Apr 24 04:12:09.484886 (XEN) [0.18] flags=0 cpu=22 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000000 Apr 24 04:12:09.496860 0000000000000000(XEN) 20: Apr 24 04:12:09.496892 (XEN) [0.19] flags=0 cpu=2 0000000000000000 credit=10126040 [w=256] 0000000000000000 load=78 (~0%) 0000000000000000 Apr 24 04:12:09.508869 0000000000000000(XEN) 21: Apr 24 04:12:09.508900 (XEN) [0.20] flags=0 cpu=36 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:09.520874 0000000000000000(XEN) 22: Apr 24 04:12:09.520904 (XEN) [0.21] flags=0 cpu=54 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) 0000000000000000 Apr 24 04:12:09.532870 0000000000000000(XEN) 23: Apr 24 04:12:09.532901 [0.22] flags=0 cpu=68(XEN) Xen call trace: Apr 24 04:12:09.544861 credit=3401080 [w=256](XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:09.544901 load=1867 (~0%)(XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:09.556870 Apr 24 04:12:09.556898 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:09.556934 (XEN) 24: (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:09.568831 [0.23] flags=0 cpu=85(XEN) Apr 24 04:12:09.568863 credit=10500000 [w=256](XEN) *** Dumping CPU37 host state: *** Apr 24 04:12:09.568890 load=11 (~0%)(XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:09.580820 Apr 24 04:12:09.580845 (XEN) CPU: 37 Apr 24 04:12:09.580867 (XEN) 25: (XEN) PC: 00000a0000276fe8[0.24] flags=0 cpu=10 arch/arm/domain.c#idle_loop+0x12c/0x194 credit=10500000 [w=256] Apr 24 04:12:09.592822 load=11 (~0%)(XEN) LR: 00000a0000276fcc Apr 24 04:12:09.592850 Apr 24 04:12:09.592871 (XEN) SP: 0000800ffb847e60 Apr 24 04:12:09.604874 (XEN) 26: (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:09.604913 [0.25] flags=0 cpu=22(XEN) X0: 0000000000000000 X1: 0000760ffb50e000 X2: 0000800ffb84e078 Apr 24 04:12:09.616868 credit=10500000 [w=256](XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:09.628867 load=10 (~0%)(XEN) X6: 00000a00003825c8 X7: 0000800ffda48590 X8: 0000000000000012 Apr 24 04:12:09.628905 Apr 24 04:12:09.628926 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:09.640866 (XEN) 27: (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:09.652825 [0.26] flags=0 cpu=37(XEN) X15: ffff00002caad80c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:09.652863 credit=10500000 [w=256](XEN) X18: ffff80000d2bbc58 X19: 00000a00003825cc X20: 0000000000000025 Apr 24 04:12:09.664873 load=10 (~0%)(XEN) X21: 00000a0000346700 X22: 0000000000000020 X23: 0000000000000025 Apr 24 04:12:09.676895 Apr 24 04:12:09.676923 (XEN) X24: 0000000000000025 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:09.676951 (XEN) 28: (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb847e60 Apr 24 04:12:09.688875 [0.27] flags=0 cpu=23(XEN) Apr 24 04:12:09.688906 credit=10500000 [w=256](XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:09.700870 load=12 (~0%)(XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:09.700903 Apr 24 04:12:09.700924 (XEN) Apr 24 04:12:09.700946 (XEN) 29: (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:09.700971 [0.28] flags=0 cpu=71(XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:09.712863 credit=10500000 [w=256](XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:09.712897 load=9 (~0%)(XEN) Apr 24 04:12:09.712921 Apr 24 04:12:09.712942 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:09.724869 (XEN) 30: (XEN) HPFAR_EL2: 0000008010803500 Apr 24 04:12:09.724903 [0.29] flags=0 cpu=86(XEN) FAR_EL2: ffff80000ab50100 Apr 24 04:12:09.724929 credit=10500000 [w=256](XEN) Apr 24 04:12:09.736857 load=10 (~0%)(XEN) Xen stack trace from sp=0000800ffb847e60: Apr 24 04:12:09.736892 (XEN) Apr 24 04:12:09.736914 0000800ffb847e70(XEN) 31: 00000a0000283a58[0.30] flags=0 cpu=14 00000a0000341420 credit=10500000 [w=256] 00000a00003785a8 load=10 (~0%) Apr 24 04:12:09.748871 (XEN) Apr 24 04:12:09.748900 0000000000000025(XEN) 32: 0000000000000000[0.31] flags=0 cpu=49 0000000000000000 credit=10500000 [w=256] 0000000000000205 load=10 (~0%) Apr 24 04:12:09.760839 (XEN) Apr 24 04:12:09.760867 0000000000000000(XEN) 33: 0000000000000000[0.32] flags=0 cpu=33 0000000000000000 credit=2352080 [w=256] 0000000000000000 load=32550 (~12%) Apr 24 04:12:09.772889 (XEN) Apr 24 04:12:09.784866 0000000000000000(XEN) 34: 0000000000000000[0.33] flags=0 cpu=24 0000000000000000 credit=10370040 [w=256] 0000000000000000 load=94 (~0%) Apr 24 04:12:09.796863 (XEN) Apr 24 04:12:09.796892 0000000000000000(XEN) 35: 0000000000000000[0.34] flags=0 cpu=73 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) Apr 24 04:12:09.808871 (XEN) Apr 24 04:12:09.808900 0000000000000000(XEN) 36: 0000000000000000[0.35] flags=0 cpu=87 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) Apr 24 04:12:09.820869 (XEN) Apr 24 04:12:09.820899 0000000000000000(XEN) 37: 0000000000000000[0.36] flags=0 cpu=12 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=17 (~0%) Apr 24 04:12:09.832869 (XEN) Apr 24 04:12:09.832899 0000000000000000(XEN) 38: 0000000000000000[0.37] flags=0 cpu=25 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=14 (~0%) Apr 24 04:12:09.844872 (XEN) Apr 24 04:12:09.844900 0000000000000000(XEN) 39: 0000000000000000[0.38] flags=0 cpu=39 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=13 (~0%) Apr 24 04:12:09.856870 (XEN) Apr 24 04:12:09.856870 0000000000000000(XEN) 40: 0000000000000000[0.39] flags=0 cpu=55 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) Apr 24 04:12:09.868886 (XEN) Apr 24 04:12:09.868886 0000000000000000(XEN) 41: 0000000000000000[0.40] flags=0 cpu=75 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=12 (~0%) Apr 24 04:12:09.880901 (XEN) Apr 24 04:12:09.880931 0000000000000000(XEN) 42: 0000000000000000[0.41] flags=0 cpu=88 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=530 (~0%) Apr 24 04:12:09.892880 (XEN) Apr 24 04:12:09.904871 0000000000000000(XEN) 43: 0000000000000000[0.42] flags=0 cpu=15 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=14 (~0%) Apr 24 04:12:09.916810 Apr 24 04:12:09.916839 (XEN) Xen call trace: Apr 24 04:12:09.916864 (XEN) 44: (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:09.916895 [0.43] flags=0 cpu=4(XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:09.928750 credit=10500000 [w=256](XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:09.940748 load=10 (~0%)(XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:09.940748 Apr 24 04:12:09.940748 (XEN) Apr 24 04:12:09.940748 (XEN) 45: (XEN) *** Dumping CPU38 host state: *** Apr 24 04:12:09.952749 [0.44] flags=0 cpu=40(XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:09.952749 credit=10500000 [w=256](XEN) CPU: 38 Apr 24 04:12:09.952749 load=13 (~0%)(XEN) PC: 00000a0000276fe8 Apr 24 04:12:09.964748 arch/arm/domain.c#idle_loop+0x12c/0x194(XEN) 46: Apr 24 04:12:09.964748 [0.45] flags=0 cpu=59(XEN) LR: 00000a0000276fcc Apr 24 04:12:09.976744 credit=10500000 [w=256](XEN) SP: 0000800ffb4dfe60 Apr 24 04:12:09.976744 load=12 (~0%)(XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:09.988750 Apr 24 04:12:09.988750 (XEN) X0: 0000000000000000 X1: 0000760ffb50a000 X2: 0000800ffb84a078 Apr 24 04:12:09.988750 (XEN) 47: (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:10.000743 [0.46] flags=0 cpu=72(XEN) X6: 00000a00003825c8 X7: 0000800ffda48a50 X8: 0000000000000012 Apr 24 04:12:10.012746 credit=10313450 [w=256](XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:10.012746 load=48 (~0%)(XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:10.024744 Apr 24 04:12:10.024744 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:10.036749 (XEN) 48: (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000026 Apr 24 04:12:10.036749 [0.47] flags=0 cpu=67(XEN) X21: 00000a0000346780 X22: 0000000000000040 X23: 0000000000000026 Apr 24 04:12:10.048751 credit=10500000 [w=256](XEN) X24: 0000000000000026 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:10.060778 load=10 (~0%)(XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb4dfe60 Apr 24 04:12:10.060778 Apr 24 04:12:10.060778 (XEN) Apr 24 04:12:10.060778 (XEN) 49: (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:10.072809 [0.48] flags=0 cpu=3(XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:10.072809 credit=10500000 [w=256](XEN) Apr 24 04:12:10.072809 load=10 (~0%)(XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:10.084926 Apr 24 04:12:10.084976 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:10.085001 (XEN) 50: (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:10.085026 [0.49] flags=0 cpu=26(XEN) Apr 24 04:12:10.085049 credit=10500000 [w=256](XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:10.096867 load=11 (~0%)(XEN) HPFAR_EL2: 0000008010804100 Apr 24 04:12:10.096900 Apr 24 04:12:10.096921 (XEN) FAR_EL2: ffff80000ac10100 Apr 24 04:12:10.108853 (XEN) 51: (XEN) Apr 24 04:12:10.108884 [0.50] flags=0 cpu=41(XEN) Xen stack trace from sp=0000800ffb4dfe60: Apr 24 04:12:10.108913 (XEN) credit=10500000 [w=256] 0000800ffb4dfe70 load=14 (~0%) 00000a0000283a58 Apr 24 04:12:10.120863 00000a0000341420(XEN) 52: 00000a00003785a8[0.51] flags=0 cpu=57 Apr 24 04:12:10.120898 (XEN) credit=10500000 [w=256] 0000000000000026 load=11 (~0%) 0000000000000000 Apr 24 04:12:10.132867 0000000000000000(XEN) 53: 0000000000000206[0.52] flags=0 cpu=74 Apr 24 04:12:10.144858 (XEN) credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.144894 0000000000000000(XEN) 54: 0000000000000000[0.53] flags=0 cpu=89 Apr 24 04:12:10.156867 (XEN) credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.156903 0000000000000000(XEN) 55: 0000000000000000[0.54] flags=0 cpu=1 Apr 24 04:12:10.168871 (XEN) credit=10500000 [w=256] 0000000000000000 load=12 (~0%) 0000000000000000 Apr 24 04:12:10.168907 0000000000000000(XEN) 56: 0000000000000000[0.55] flags=0 cpu=27 Apr 24 04:12:10.180866 (XEN) credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.180902 0000000000000000(XEN) 57: 0000000000000000[0.56] flags=0 cpu=42 Apr 24 04:12:10.192869 (XEN) credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.192906 0000000000000000(XEN) 58: 0000000000000000[0.57] flags=0 cpu=58 Apr 24 04:12:10.204816 (XEN) credit=10500000 [w=256] 0000000000000000 load=8 (~0%) 0000000000000000 Apr 24 04:12:10.216810 0000000000000000(XEN) 59: 0000000000000000[0.58] flags=0 cpu=5 Apr 24 04:12:10.216846 (XEN) credit=10500000 [w=256] 0000000000000000 load=12 (~0%) 0000000000000000 Apr 24 04:12:10.228748 0000000000000000(XEN) 60: 0000000000000000[0.59] flags=0 cpu=90 Apr 24 04:12:10.228748 (XEN) credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.240749 0000000000000000(XEN) 61: 0000000000000000[0.60] flags=0 cpu=2 Apr 24 04:12:10.240749 (XEN) credit=10500000 [w=256] 0000000000000000 load=9 (~0%) 0000000000000000 Apr 24 04:12:10.252742 0000000000000000(XEN) 62: 0000000000000000[0.61] flags=0 cpu=52 Apr 24 04:12:10.252742 (XEN) credit=10500000 [w=256] 0000000000000000 load=9 (~0%) 0000000000000000 Apr 24 04:12:10.264741 0000000000000000(XEN) 63: 0000000000000000[0.62] flags=0 cpu=43 Apr 24 04:12:10.264741 (XEN) credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000000 Apr 24 04:12:10.276748 0000000000000000(XEN) 64: 0000000000000000[0.63] flags=0 cpu=11 Apr 24 04:12:10.288748 credit=10500000 [w=256](XEN) Xen call trace: Apr 24 04:12:10.288748 load=13 (~0%)(XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:10.300749 Apr 24 04:12:10.300749 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:10.300749 (XEN) 65: (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:10.312746 [0.64] flags=0 cpu=76(XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:10.312746 credit=10500000 [w=256](XEN) Apr 24 04:12:10.312746 load=9 (~0%)(XEN) *** Dumping CPU39 host state: *** Apr 24 04:12:10.324787 Apr 24 04:12:10.324787 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:10.324787 (XEN) 66: (XEN) CPU: 39 Apr 24 04:12:10.324787 [0.65] flags=0 cpu=91(XEN) PC: 00000a0000276fe8 credit=10500000 [w=256] arch/arm/domain.c#idle_loop+0x12c/0x194 load=10 (~0%) Apr 24 04:12:10.336956 Apr 24 04:12:10.336999 (XEN) LR: 00000a0000276fcc Apr 24 04:12:10.348886 (XEN) 67: (XEN) SP: 0000800ffb4cfe60 Apr 24 04:12:10.348918 [0.66] flags=0 cpu=3(XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:10.360862 credit=10500000 [w=256](XEN) X0: 0000000000000000 X1: 0000760ffb508000 X2: 0000800ffb848078 Apr 24 04:12:10.360901 load=10 (~0%)(XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:10.372873 Apr 24 04:12:10.372901 (XEN) X6: 00000a00003825c8 X7: 0000800ffb4d6010 X8: 0000000000000012 Apr 24 04:12:10.384854 (XEN) 68: (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:10.384892 [0.67] flags=0 cpu=28(XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:10.396861 credit=10500000 [w=256](XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:10.408858 load=9 (~0%)(XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000027 Apr 24 04:12:10.408896 Apr 24 04:12:10.408917 (XEN) X21: 00000a0000346800 X22: 0000000000000080 X23: 0000000000000027 Apr 24 04:12:10.420870 (XEN) 69: (XEN) X24: 0000000000000027 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:10.432863 [0.68] flags=0 cpu=44(XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb4cfe60 Apr 24 04:12:10.432903 credit=10500000 [w=256](XEN) Apr 24 04:12:10.432927 load=14 (~0%)(XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:10.444863 Apr 24 04:12:10.444892 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:10.444917 (XEN) 70: (XEN) Apr 24 04:12:10.444972 [0.69] flags=0 cpu=60(XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:10.456865 credit=10500000 [w=256](XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:10.456899 load=11 (~0%)(XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:10.456926 Apr 24 04:12:10.456946 (XEN) Apr 24 04:12:10.468867 (XEN) 71: (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:10.468901 [0.70] flags=0 cpu=77(XEN) HPFAR_EL2: 0000008010804d00 Apr 24 04:12:10.468928 credit=10500000 [w=256](XEN) FAR_EL2: ffff80000acd0100 Apr 24 04:12:10.480871 load=13 (~0%)(XEN) Apr 24 04:12:10.480902 Apr 24 04:12:10.480923 (XEN) Xen stack trace from sp=0000800ffb4cfe60: Apr 24 04:12:10.480949 (XEN) (XEN) 72: 0000800ffb4cfe70[0.71] flags=0 cpu=92 00000a0000283a58 credit=10500000 [w=256] 00000a0000341420 load=12 (~0%) 00000a00003785a8 Apr 24 04:12:10.492861 Apr 24 04:12:10.504857 (XEN) (XEN) 73: 0000000000000027[0.72] flags=0 cpu=14 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000207 Apr 24 04:12:10.516830 Apr 24 04:12:10.516858 (XEN) (XEN) 74: 0000000000000000[0.73] flags=0 cpu=29 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.528861 Apr 24 04:12:10.528890 (XEN) (XEN) 75: 0000000000000000[0.74] flags=0 cpu=45 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=14 (~0%) 0000000000000000 Apr 24 04:12:10.540868 Apr 24 04:12:10.540896 (XEN) (XEN) 76: 0000000000000000[0.75] flags=0 cpu=61 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000000 Apr 24 04:12:10.552864 Apr 24 04:12:10.552892 (XEN) (XEN) 77: 0000000000000000[0.76] flags=0 cpu=78 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000000 Apr 24 04:12:10.564868 Apr 24 04:12:10.564897 (XEN) (XEN) 78: 0000000000000000[0.77] flags=0 cpu=93 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000000 Apr 24 04:12:10.576864 Apr 24 04:12:10.576892 (XEN) (XEN) 79: 0000000000000000[0.78] flags=0 cpu=7 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=11 (~0%) 0000000000000000 Apr 24 04:12:10.588872 Apr 24 04:12:10.588900 (XEN) (XEN) 80: 0000000000000000[0.79] flags=0 cpu=30 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.600868 Apr 24 04:12:10.600896 (XEN) (XEN) 81: 0000000000000000[0.80] flags=0 cpu=46 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=14 (~0%) 0000000000000000 Apr 24 04:12:10.612869 Apr 24 04:12:10.612897 (XEN) (XEN) 82: 0000000000000000[0.81] flags=0 cpu=62 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=8 (~0%) 0000000000000000 Apr 24 04:12:10.624873 Apr 24 04:12:10.624901 (XEN) (XEN) 83: 0000000000000000[0.82] flags=0 cpu=79 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) 0000000000000000 Apr 24 04:12:10.648847 Apr 24 04:12:10.648877 (XEN) (XEN) 84: 0000000000000000[0.83] flags=0 cpu=94 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=10 (~0%) 0000000000000000 Apr 24 04:12:10.660793 Apr 24 04:12:10.660822 (XEN) 85: (XEN) Xen call trace: Apr 24 04:12:10.660847 [0.84] flags=0 cpu=9(XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:10.672784 credit=10500000 [w=256](XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:10.672824 load=9 (~0%)(XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:10.684802 Apr 24 04:12:10.684831 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:10.684857 (XEN) 86: (XEN) Apr 24 04:12:10.684879 [0.85] flags=0 cpu=47(XEN) *** Dumping CPU40 host state: *** Apr 24 04:12:10.696805 credit=10500000 [w=256](XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:10.696857 load=10 (~0%)(XEN) CPU: 40 Apr 24 04:12:10.712753 Apr 24 04:12:10.712753 (XEN) PC: 00000a0000276fe8(XEN) 87: arch/arm/domain.c#idle_loop+0x12c/0x194[0.86] flags=0 cpu=31 Apr 24 04:12:10.712753 credit=10500000 [w=256](XEN) LR: 00000a0000276fcc Apr 24 04:12:10.724725 load=12 (~0%)(XEN) SP: 0000800ffb4c7e60 Apr 24 04:12:10.724725 Apr 24 04:12:10.724725 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:10.724725 (XEN) 88: (XEN) X0: 0000000000000000 X1: 0000760ffb194000 X2: 0000800ffb4d4078 Apr 24 04:12:10.736750 [0.87] flags=0 cpu=63(XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:10.748748 credit=10500000 [w=256](XEN) X6: 00000a00003825c8 X7: 0000800ffb4d6410 X8: 0000000000000012 Apr 24 04:12:10.748748 load=8 (~0%)(XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:10.760807 Apr 24 04:12:10.760839 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:10.776830 (XEN) 89: (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:10.776869 [0.88] flags=0 cpu=95(XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000028 Apr 24 04:12:10.788774 credit=10500000 [w=256](XEN) X21: 00000a0000346880 X22: 0000000000000100 X23: 0000000000000028 Apr 24 04:12:10.788813 load=11 (~0%)(XEN) X24: 0000000000000028 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:10.800738 Apr 24 04:12:10.800738 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb4c7e60 Apr 24 04:12:10.813383 (XEN) 90: (XEN) Apr 24 04:12:10.813383 [0.89] flags=0 cpu=64(XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:10.813383 credit=10500000 [w=256](XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:10.824771 load=9 (~0%)(XEN) Apr 24 04:12:10.824771 Apr 24 04:12:10.824771 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:10.824771 (XEN) 91: (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:10.824771 [0.90] flags=0 cpu=12(XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:10.836739 credit=10500000 [w=256](XEN) Apr 24 04:12:10.836739 load=9 (~0%)(XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:10.836739 Apr 24 04:12:10.836739 (XEN) HPFAR_EL2: 0000008010805900 Apr 24 04:12:10.844840 (XEN) 92: (XEN) FAR_EL2: ffff80000ad90100 Apr 24 04:12:10.844847 [0.91] flags=0 cpu=16(XEN) Apr 24 04:12:10.856865 credit=10500000 [w=256](XEN) Xen stack trace from sp=0000800ffb4c7e60: Apr 24 04:12:10.856865 (XEN) load=8 (~0%) 0000800ffb4c7e70 Apr 24 04:12:10.856865 00000a0000283a58(XEN) 93: 00000a0000341420[0.92] flags=0 cpu=32 00000a00003785a8 credit=10500000 [w=256] Apr 24 04:12:10.868918 (XEN) load=11 (~0%) 0000000000000028 Apr 24 04:12:10.868926 Apr 24 04:12:10.876944 0000000000000000(XEN) 94: 0000000000000000[0.93] flags=0 cpu=48 0000000000000208 credit=10500000 [w=256] Apr 24 04:12:10.880882 (XEN) Apr 24 04:12:10.883146 load=8 (~0%) 0000000000000000 Apr 24 04:12:10.892935 0000000000000000(XEN) 95: 0000000000000000[0.94] flags=0 cpu=66 0000000000000000 credit=10500000 [w=256] Apr 24 04:12:10.904812 (XEN) load=7 (~0%) 0000000000000000 Apr 24 04:12:10.904845 0000000000000000(XEN) 96: 0000000000000000[0.95] flags=0 cpu=80 0000000000000000 credit=10500000 [w=256] Apr 24 04:12:10.916848 (XEN) load=8 (~0%) 0000000000000000 Apr 24 04:12:10.916880 0000000000000000(XEN) Runqueue 0: Apr 24 04:12:10.916904 0000000000000000(XEN) CPU[00] runq=0, sibling={0}, core={0} Apr 24 04:12:10.928861 0000000000000000(XEN) CPU[01] runq=0, sibling={1}, core={1} Apr 24 04:12:10.928895 Apr 24 04:12:10.928917 (XEN) (XEN) CPU[02] runq=0, sibling={2}, core={2} Apr 24 04:12:10.928942 0000000000000000(XEN) CPU[03] runq=0, sibling={3}, core={3} Apr 24 04:12:10.940861 0000000000000000(XEN) CPU[04] runq=0, sibling={4}, core={4} Apr 24 04:12:10.940895 0000000000000000(XEN) CPU[05] runq=0, sibling={5}, core={5} Apr 24 04:12:10.952859 0000000000000000(XEN) CPU[06] runq=0, sibling={6}, core={6} Apr 24 04:12:10.952919 Apr 24 04:12:10.952943 (XEN) (XEN) CPU[07] runq=0, sibling={7}, core={7} Apr 24 04:12:10.964830 0000000000000000(XEN) CPU[08] runq=0, sibling={8}, core={8} Apr 24 04:12:10.964865 0000000000000000(XEN) CPU[09] runq=0, sibling={9}, core={9} Apr 24 04:12:10.976853 0000000000000000(XEN) CPU[10] runq=0, sibling={10}, core={10} Apr 24 04:12:10.976888 0000000000000000(XEN) CPU[11] runq=0, sibling={11}, core={11} Apr 24 04:12:10.976915 Apr 24 04:12:10.976936 (XEN) (XEN) CPU[12] runq=0, sibling={12}, core={12} Apr 24 04:12:10.988871 0000000000000000(XEN) CPU[13] runq=0, sibling={13}, core={13} Apr 24 04:12:10.988905 0000000000000000(XEN) CPU[14] runq=0, sibling={14}, core={14} Apr 24 04:12:11.000941 0000000000000000(XEN) CPU[15] runq=0, sibling={15}, core={15} Apr 24 04:12:11.000941 0000000000000000(XEN) RUNQ: Apr 24 04:12:11.012873 Apr 24 04:12:11.012896 (XEN) (XEN) Runqueue 1: Apr 24 04:12:11.012896 0000000000000000(XEN) CPU[16] runq=1, sibling={16}, core={16} Apr 24 04:12:11.012896 0000000000000000(XEN) CPU[17] runq=1, sibling={17}, core={17} Apr 24 04:12:11.024879 0000000000000000(XEN) CPU[18] runq=1, sibling={18}, core={18} Apr 24 04:12:11.024879 0000000000000000(XEN) CPU[19] runq=1, sibling={19}, core={19} Apr 24 04:12:11.036887 Apr 24 04:12:11.036887 (XEN) (XEN) CPU[20] runq=1, sibling={20}, core={20} Apr 24 04:12:11.036887 0000000000000000(XEN) CPU[21] runq=1, sibling={21}, core={21} Apr 24 04:12:11.048881 0000000000000000(XEN) CPU[22] runq=1, sibling={22}, core={22} Apr 24 04:12:11.048923 0000000000000000(XEN) CPU[23] runq=1, sibling={23}, core={23} Apr 24 04:12:11.048950 0000000000000000(XEN) CPU[24] runq=1, sibling={24}, core={24} Apr 24 04:12:11.060857 Apr 24 04:12:11.060885 (XEN) (XEN) CPU[25] runq=1, sibling={25}, core={25} Apr 24 04:12:11.060911 0000000000000000(XEN) CPU[26] runq=1, sibling={26}, core={26} Apr 24 04:12:11.072866 0000000000000000(XEN) CPU[27] runq=1, sibling={27}, core={27} Apr 24 04:12:11.072900 0000000000000000(XEN) CPU[28] runq=1, sibling={28}, core={28} Apr 24 04:12:11.084866 0000000000000000(XEN) CPU[29] runq=1, sibling={29}, core={29} Apr 24 04:12:11.084900 Apr 24 04:12:11.084922 (XEN) (XEN) CPU[30] runq=1, sibling={30}, core={30} Apr 24 04:12:11.096860 0000000000000000(XEN) CPU[31] runq=1, sibling={31}, core={31} Apr 24 04:12:11.096895 0000000000000000(XEN) RUNQ: Apr 24 04:12:11.096919 0000000000000000(XEN) Runqueue 2: Apr 24 04:12:11.108858 0000000000000000(XEN) CPU[32] runq=2, sibling={32}, core={32} Apr 24 04:12:11.108893 Apr 24 04:12:11.108914 (XEN) (XEN) CPU[33] runq=2, sibling={33}, core={33} Apr 24 04:12:11.108940 0000000000000000(XEN) CPU[34] runq=2, sibling={34}, core={34} Apr 24 04:12:11.120866 0000000000000000(XEN) CPU[35] runq=2, sibling={35}, core={35} Apr 24 04:12:11.120899 0000000000000000(XEN) CPU[36] runq=2, sibling={36}, core={36} Apr 24 04:12:11.132849 0000000000000000(XEN) CPU[37] runq=2, sibling={37}, core={37} Apr 24 04:12:11.132883 Apr 24 04:12:11.132905 (XEN) CPU[38] runq=2, sibling={38}, core={38} Apr 24 04:12:11.144862 (XEN) Xen call trace: Apr 24 04:12:11.144893 (XEN) CPU[39] runq=2, sibling={39}, core={39} Apr 24 04:12:11.144918 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:11.156870 (XEN) CPU[40] runq=2, sibling={40}, core={40} Apr 24 04:12:11.156904 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:11.168864 (XEN) CPU[41] runq=2, sibling={41}, core={41} Apr 24 04:12:11.168898 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:11.180823 (XEN) CPU[42] runq=2, sibling={42}, core={42} Apr 24 04:12:11.180857 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:11.180883 (XEN) CPU[43] runq=2, sibling={43}, core={43} Apr 24 04:12:11.192862 (XEN) Apr 24 04:12:11.192892 (XEN) CPU[44] runq=2, sibling={44}, core={44} Apr 24 04:12:11.192918 (XEN) *** Dumping CPU41 host state: *** Apr 24 04:12:11.192943 (XEN) CPU[45] runq=2, sibling={45}, core={45} Apr 24 04:12:11.204892 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:11.204927 (XEN) CPU[46] runq=2, sibling={46}, core={46} Apr 24 04:12:11.204953 (XEN) CPU: 41 Apr 24 04:12:11.216858 (XEN) CPU[47] runq=2, sibling={47}, core={47} Apr 24 04:12:11.216891 (XEN) PC: 00000a0000276fe8(XEN) RUNQ: Apr 24 04:12:11.216917 arch/arm/domain.c#idle_loop+0x12c/0x194(XEN) Runqueue 3: Apr 24 04:12:11.228831 Apr 24 04:12:11.228859 (XEN) CPU[48] runq=3, sibling={48}, core={48} Apr 24 04:12:11.228886 (XEN) LR: 00000a0000276fcc Apr 24 04:12:11.228909 (XEN) CPU[49] runq=3, sibling={49}, core={49} Apr 24 04:12:11.240864 (XEN) SP: 0000800ffb35fe60 Apr 24 04:12:11.240895 (XEN) CPU[50] runq=3, sibling={50}, core={50} Apr 24 04:12:11.240922 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:11.252859 (XEN) CPU[51] runq=3, sibling={51}, core={51} Apr 24 04:12:11.252892 (XEN) X0: 0000000000000000 X1: 0000760ffb190000 X2: 0000800ffb4d0078 Apr 24 04:12:11.264857 (XEN) CPU[52] runq=3, sibling={52}, core={52} Apr 24 04:12:11.264892 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:11.264919 (XEN) CPU[53] runq=3, sibling={53}, core={53} Apr 24 04:12:11.276862 (XEN) X6: 00000a00003825c8 X7: 0000800ffb4d68d0 X8: 0000000000000012 Apr 24 04:12:11.276897 (XEN) CPU[54] runq=3, sibling={54}, core={54} Apr 24 04:12:11.288864 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:11.288899 (XEN) CPU[55] runq=3, sibling={55}, core={55} Apr 24 04:12:11.300863 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:11.300897 (XEN) CPU[56] runq=3, sibling={56}, core={56} Apr 24 04:12:11.300923 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:11.312864 (XEN) CPU[57] runq=3, sibling={57}, core={57} Apr 24 04:12:11.312897 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000029 Apr 24 04:12:11.324862 (XEN) CPU[58] runq=3, sibling={58}, core={58} Apr 24 04:12:11.324896 (XEN) X21: 00000a0000346900 X22: 0000000000000200 X23: 0000000000000029 Apr 24 04:12:11.336866 (XEN) CPU[59] runq=3, sibling={59}, core={59} Apr 24 04:12:11.336899 (XEN) X24: 0000000000000029 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:11.348861 (XEN) CPU[60] runq=3, sibling={60}, core={60} Apr 24 04:12:11.348895 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb35fe60 Apr 24 04:12:11.360857 (XEN) CPU[61] runq=3, sibling={61}, core={61} Apr 24 04:12:11.360891 (XEN) Apr 24 04:12:11.360913 (XEN) CPU[62] runq=3, sibling={62}, core={62} Apr 24 04:12:11.360937 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:11.372850 (XEN) CPU[63] runq=3, sibling={63}, core={63} Apr 24 04:12:11.372850 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:11.372850 (XEN) RUNQ: Apr 24 04:12:11.372850 (XEN) Apr 24 04:12:11.372850 (XEN) Runqueue 4: Apr 24 04:12:11.372850 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:11.384881 (XEN) CPU[64] runq=4, sibling={64}, core={64} Apr 24 04:12:11.384881 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:11.384881 (XEN) CPU[65] runq=4, sibling={65}, core={65} Apr 24 04:12:11.396876 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:11.396938 (XEN) CPU[66] runq=4, sibling={66}, core={66} Apr 24 04:12:11.396980 (XEN) Apr 24 04:12:11.396980 (XEN) CPU[67] runq=4, sibling={67}, core={67} Apr 24 04:12:11.408892 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:11.408892 (XEN) CPU[68] runq=4, sibling={68}, core={68} Apr 24 04:12:11.408892 (XEN) HPFAR_EL2: 0000009010800500 Apr 24 04:12:11.420885 (XEN) CPU[69] runq=4, sibling={69}, core={69} Apr 24 04:12:11.420909 (XEN) FAR_EL2: ffff80000b050100 Apr 24 04:12:11.420909 (XEN) CPU[70] runq=4, sibling={70}, core={70} Apr 24 04:12:11.432927 (XEN) Apr 24 04:12:11.432927 (XEN) CPU[71] runq=4, sibling={71}, core={71} Apr 24 04:12:11.432927 (XEN) Xen stack trace from sp=0000800ffb35fe60: Apr 24 04:12:11.432927 (XEN) (XEN) CPU[72] runq=4, sibling={72}, core={72} Apr 24 04:12:11.444887 0000800ffb35fe70(XEN) CPU[73] runq=4, sibling={73}, core={73} Apr 24 04:12:11.444929 00000a0000283a58(XEN) CPU[74] runq=4, sibling={74}, core={74} Apr 24 04:12:11.456863 00000a0000341420(XEN) CPU[75] runq=4, sibling={75}, core={75} Apr 24 04:12:11.456897 00000a00003785a8(XEN) CPU[76] runq=4, sibling={76}, core={76} Apr 24 04:12:11.468858 Apr 24 04:12:11.468886 (XEN) (XEN) CPU[77] runq=4, sibling={77}, core={77} Apr 24 04:12:11.468914 0000000000000029(XEN) CPU[78] runq=4, sibling={78}, core={78} Apr 24 04:12:11.480867 0000000000000000(XEN) CPU[79] runq=4, sibling={79}, core={79} Apr 24 04:12:11.480902 0000000000000000(XEN) RUNQ: Apr 24 04:12:11.480926 0000000000000209(XEN) Runqueue 5: Apr 24 04:12:11.480949 Apr 24 04:12:11.480969 (XEN) (XEN) CPU[80] runq=5, sibling={80}, core={80} Apr 24 04:12:11.492864 0000000000000000(XEN) CPU[81] runq=5, sibling={81}, core={81} Apr 24 04:12:11.492898 0000000000000000(XEN) CPU[82] runq=5, sibling={82}, core={82} Apr 24 04:12:11.504858 0000000000000000(XEN) CPU[83] runq=5, sibling={83}, core={83} Apr 24 04:12:11.504892 0000000000000000(XEN) CPU[84] runq=5, sibling={84}, core={84} Apr 24 04:12:11.516854 Apr 24 04:12:11.516883 (XEN) (XEN) CPU[85] runq=5, sibling={85}, core={85} Apr 24 04:12:11.516910 0000000000000000(XEN) CPU[86] runq=5, sibling={86}, core={86} Apr 24 04:12:11.528861 0000000000000000(XEN) CPU[87] runq=5, sibling={87}, core={87} Apr 24 04:12:11.528896 0000000000000000(XEN) CPU[88] runq=5, sibling={88}, core={88} Apr 24 04:12:11.540862 0000000000000000(XEN) CPU[89] runq=5, sibling={89}, core={89} Apr 24 04:12:11.540896 Apr 24 04:12:11.540918 (XEN) (XEN) CPU[90] runq=5, sibling={90}, core={90} Apr 24 04:12:11.552863 0000000000000000(XEN) CPU[91] runq=5, sibling={91}, core={91} Apr 24 04:12:11.552898 0000000000000000(XEN) CPU[92] runq=5, sibling={92}, core={92} Apr 24 04:12:11.552924 0000000000000000(XEN) CPU[93] runq=5, sibling={93}, core={93} Apr 24 04:12:11.564865 0000000000000000(XEN) CPU[94] runq=5, sibling={94}, core={94} Apr 24 04:12:11.564899 Apr 24 04:12:11.564920 (XEN) (XEN) CPU[95] runq=5, sibling={95}, core={95} Apr 24 04:12:11.576865 0000000000000000(XEN) RUNQ: Apr 24 04:12:11.576896 0000000000000000(XEN) CPUs info: Apr 24 04:12:11.576920 0000000000000000(XEN) CPU[00] current=d[IDLE]v0, curr=d[IDLE]v0, prev=NULL Apr 24 04:12:11.588864 0000000000000000(XEN) CPU[01] current=d[IDLE]v1, curr=d[IDLE]v1, prev=NULL Apr 24 04:12:11.588899 Apr 24 04:12:11.588921 (XEN) (XEN) CPU[02] current=d[IDLE]v2, curr=d[IDLE]v2, prev=NULL Apr 24 04:12:11.600862 0000000000000000(XEN) CPU[03] current=d[IDLE]v3, curr=d[IDLE]v3, prev=NULL Apr 24 04:12:11.600897 0000000000000000(XEN) CPU[04] current=d[IDLE]v4, curr=d[IDLE]v4, prev=NULL Apr 24 04:12:11.612865 0000000000000000(XEN) CPU[05] current=d[IDLE]v5, curr=d[IDLE]v5, prev=NULL Apr 24 04:12:11.624860 0000000000000000(XEN) CPU[06] current=d[IDLE]v6, curr=d[IDLE]v6, prev=NULL Apr 24 04:12:11.624896 Apr 24 04:12:11.624917 (XEN) (XEN) CPU[07] current=d[IDLE]v7, curr=d[IDLE]v7, prev=NULL Apr 24 04:12:11.636855 0000000000000000(XEN) CPU[08] current=d0v6, curr=d0v6, prev=NULL Apr 24 04:12:11.636890 0000000000000000(XEN) CPU[09] current=d[IDLE]v9, curr=d[IDLE]v9, prev=NULL Apr 24 04:12:11.648857 0000000000000000(XEN) CPU[10] current=d[IDLE]v10, curr=d[IDLE]v10, prev=NULL Apr 24 04:12:11.648892 0000000000000000(XEN) CPU[11] current=d[IDLE]v11, curr=d[IDLE]v11, prev=NULL Apr 24 04:12:11.660871 Apr 24 04:12:11.660900 (XEN) (XEN) CPU[12] current=d[IDLE]v12, curr=d[IDLE]v12, prev=NULL Apr 24 04:12:11.660927 0000000000000000(XEN) CPU[13] current=d[IDLE]v13, curr=d[IDLE]v13, prev=NULL Apr 24 04:12:11.672866 0000000000000000(XEN) CPU[14] current=d[IDLE]v14, curr=d[IDLE]v14, prev=NULL Apr 24 04:12:11.684864 0000000000000000(XEN) CPU[15] current=d[IDLE]v15, curr=d[IDLE]v15, prev=NULL Apr 24 04:12:11.684900 0000000000000000(XEN) CPU[16] current=d[IDLE]v16, curr=d[IDLE]v16, prev=NULL Apr 24 04:12:11.696888 Apr 24 04:12:11.696918 (XEN) (XEN) CPU[17] current=d[IDLE]v17, curr=d[IDLE]v17, prev=NULL Apr 24 04:12:11.696946 0000000000000000(XEN) CPU[18] current=d[IDLE]v18, curr=d[IDLE]v18, prev=NULL Apr 24 04:12:11.708872 0000000000000000(XEN) CPU[19] current=d[IDLE]v19, curr=d[IDLE]v19, prev=NULL Apr 24 04:12:11.708907 0000000000000000(XEN) CPU[20] current=d[IDLE]v20, curr=d[IDLE]v20, prev=NULL Apr 24 04:12:11.720867 0000000000000000(XEN) CPU[21] current=d[IDLE]v21, curr=d[IDLE]v21, prev=NULL Apr 24 04:12:11.720902 Apr 24 04:12:11.732860 (XEN) (XEN) CPU[22] current=d[IDLE]v22, curr=d[IDLE]v22, prev=NULL Apr 24 04:12:11.732896 0000000000000000(XEN) CPU[23] current=d[IDLE]v23, curr=d[IDLE]v23, prev=NULL Apr 24 04:12:11.744859 0000000000000000(XEN) CPU[24] current=d[IDLE]v24, curr=d[IDLE]v24, prev=NULL Apr 24 04:12:11.744894 0000000000000000(XEN) CPU[25] current=d[IDLE]v25, curr=d[IDLE]v25, prev=NULL Apr 24 04:12:11.756861 0000000000000000(XEN) CPU[26] current=d[IDLE]v26, curr=d[IDLE]v26, prev=NULL Apr 24 04:12:11.756896 Apr 24 04:12:11.756917 (XEN) (XEN) CPU[27] current=d[IDLE]v27, curr=d[IDLE]v27, prev=NULL Apr 24 04:12:11.768860 0000000000000000(XEN) CPU[28] current=d[IDLE]v28, curr=d[IDLE]v28, prev=NULL Apr 24 04:12:11.780855 0000000000000000(XEN) CPU[29] current=d[IDLE]v29, curr=d[IDLE]v29, prev=NULL Apr 24 04:12:11.780891 0000000000000000(XEN) CPU[30] current=d[IDLE]v30, curr=d[IDLE]v30, prev=NULL Apr 24 04:12:11.792863 0000000000000000(XEN) CPU[31] current=d[IDLE]v31, curr=d[IDLE]v31, prev=NULL Apr 24 04:12:11.792898 Apr 24 04:12:11.792920 (XEN) (XEN) CPU[32] current=d[IDLE]v32, curr=d[IDLE]v32, prev=NULL Apr 24 04:12:11.804864 0000000000000000(XEN) CPU[33] current=d[IDLE]v33, curr=d[IDLE]v33, prev=NULL Apr 24 04:12:11.804899 0000000000000000(XEN) CPU[34] current=d[IDLE]v34, curr=d[IDLE]v34, prev=NULL Apr 24 04:12:11.816867 0000000000000000(XEN) CPU[35] current=d[IDLE]v35, curr=d[IDLE]v35, prev=NULL Apr 24 04:12:11.816902 0000000000000000(XEN) CPU[36] current=d[IDLE]v36, curr=d[IDLE]v36, prev=NULL Apr 24 04:12:11.828862 Apr 24 04:12:11.828891 (XEN) CPU[37] current=d[IDLE]v37, curr=d[IDLE]v37, prev=NULL Apr 24 04:12:11.840860 (XEN) Xen call trace: Apr 24 04:12:11.840891 (XEN) CPU[38] current=d[IDLE]v38, curr=d[IDLE]v38, prev=NULL Apr 24 04:12:11.840919 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:11.852857 (XEN) CPU[39] current=d[IDLE]v39, curr=d[IDLE]v39, prev=NULL Apr 24 04:12:11.852892 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:11.864865 (XEN) CPU[40] current=d[IDLE]v40, curr=d[IDLE]v40, prev=NULL Apr 24 04:12:11.864900 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:11.876866 (XEN) CPU[41] current=d[IDLE]v41, curr=d[IDLE]v41, prev=NULL Apr 24 04:12:11.876901 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:11.876926 (XEN) CPU[42] current=d[IDLE]v42, curr=d[IDLE]v42, prev=NULL Apr 24 04:12:11.888869 (XEN) Apr 24 04:12:11.888898 (XEN) CPU[43] current=d[IDLE]v43, curr=d[IDLE]v43, prev=NULL Apr 24 04:12:11.888925 (XEN) *** Dumping CPU42 host state: *** Apr 24 04:12:11.900864 (XEN) CPU[44] current=d[IDLE]v44, curr=d[IDLE]v44, prev=NULL Apr 24 04:12:11.900899 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:11.912867 (XEN) CPU[45] current=d[IDLE]v45, curr=d[IDLE]v45, prev=NULL Apr 24 04:12:11.912902 (XEN) CPU: 42 Apr 24 04:12:11.912925 (XEN) CPU[46] current=d[IDLE]v46, curr=d[IDLE]v46, prev=NULL Apr 24 04:12:11.924862 (XEN) PC: 00000a0000276fe8(XEN) CPU[47] current=d[IDLE]v47, curr=d[IDLE]v47, prev=NULL Apr 24 04:12:11.924902 arch/arm/domain.c#idle_loop+0x12c/0x194(XEN) CPU[48] current=d[IDLE]v48, curr=d[IDLE]v48, prev=NULL Apr 24 04:12:11.936879 Apr 24 04:12:11.936907 (XEN) CPU[49] current=d[IDLE]v49, curr=d[IDLE]v49, prev=NULL Apr 24 04:12:11.936933 (XEN) LR: 00000a0000276fcc Apr 24 04:12:11.948865 (XEN) CPU[50] current=d[IDLE]v50, curr=d[IDLE]v50, prev=NULL Apr 24 04:12:11.948932 (XEN) SP: 0000800ffb34fe60 Apr 24 04:12:11.948958 (XEN) CPU[51] current=d[IDLE]v51, curr=d[IDLE]v51, prev=NULL Apr 24 04:12:11.960862 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:11.960898 (XEN) CPU[52] current=d[IDLE]v52, curr=d[IDLE]v52, prev=NULL Apr 24 04:12:11.972865 (XEN) X0: 0000000000000000 X1: 0000760ffb016000 X2: 0000800ffb356078 Apr 24 04:12:11.972900 (XEN) CPU[53] current=d[IDLE]v53, curr=d[IDLE]v53, prev=NULL Apr 24 04:12:11.984871 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:11.984906 (XEN) CPU[54] current=d[IDLE]v54, curr=d[IDLE]v54, prev=NULL Apr 24 04:12:11.996868 (XEN) X6: 00000a00003825c8 X7: 0000800ffb4d6d90 X8: 0000000000000012 Apr 24 04:12:11.996903 (XEN) CPU[55] current=d[IDLE]v55, curr=d[IDLE]v55, prev=NULL Apr 24 04:12:12.008828 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:12.008863 (XEN) CPU[56] current=d[IDLE]v56, curr=d[IDLE]v56, prev=NULL Apr 24 04:12:12.020867 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:12.020901 (XEN) CPU[57] current=d[IDLE]v57, curr=d[IDLE]v57, prev=NULL Apr 24 04:12:12.032862 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:12.032896 (XEN) CPU[58] current=d[IDLE]v58, curr=d[IDLE]v58, prev=NULL Apr 24 04:12:12.044857 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000002a Apr 24 04:12:12.044892 (XEN) CPU[59] current=d[IDLE]v59, curr=d[IDLE]v59, prev=NULL Apr 24 04:12:12.056862 (XEN) X21: 00000a0000346980 X22: 0000000000000400 X23: 000000000000002a Apr 24 04:12:12.056897 (XEN) CPU[60] current=d[IDLE]v60, curr=d[IDLE]v60, prev=NULL Apr 24 04:12:12.068860 (XEN) X24: 000000000000002a X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:12.068895 (XEN) CPU[61] current=d[IDLE]v61, curr=d[IDLE]v61, prev=NULL Apr 24 04:12:12.080883 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb34fe60 Apr 24 04:12:12.080918 (XEN) CPU[62] current=d[IDLE]v62, curr=d[IDLE]v62, prev=NULL Apr 24 04:12:12.092863 (XEN) Apr 24 04:12:12.092893 (XEN) CPU[63] current=d[IDLE]v63, curr=d[IDLE]v63, prev=NULL Apr 24 04:12:12.092919 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:12.104847 (XEN) CPU[64] current=d[IDLE]v64, curr=d[IDLE]v64, prev=NULL Apr 24 04:12:12.104882 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:12.104906 (XEN) CPU[65] current=d[IDLE]v65, curr=d[IDLE]v65, prev=NULL Apr 24 04:12:12.116866 (XEN) Apr 24 04:12:12.116895 (XEN) CPU[66] current=d[IDLE]v66, curr=d[IDLE]v66, prev=NULL Apr 24 04:12:12.116922 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:12.116946 (XEN) CPU[67] current=d[IDLE]v67, curr=d[IDLE]v67, prev=NULL Apr 24 04:12:12.128865 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:12.128897 (XEN) CPU[68] current=d[IDLE]v68, curr=d[IDLE]v68, prev=NULL Apr 24 04:12:12.140863 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:12.140895 (XEN) CPU[69] current=d[IDLE]v69, curr=d[IDLE]v69, prev=NULL Apr 24 04:12:12.140923 (XEN) Apr 24 04:12:12.140944 (XEN) CPU[70] current=d[IDLE]v70, curr=d[IDLE]v70, prev=NULL Apr 24 04:12:12.152855 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:12.152887 (XEN) CPU[71] current=d[IDLE]v71, curr=d[IDLE]v71, prev=NULL Apr 24 04:12:12.164864 (XEN) HPFAR_EL2: 0000009010801100 Apr 24 04:12:12.164896 (XEN) CPU[72] current=d[IDLE]v72, curr=d[IDLE]v72, prev=NULL Apr 24 04:12:12.164923 (XEN) FAR_EL2: ffff80000b110100 Apr 24 04:12:12.176866 (XEN) CPU[73] current=d[IDLE]v73, curr=d[IDLE]v73, prev=NULL Apr 24 04:12:12.176901 (XEN) Apr 24 04:12:12.176923 (XEN) CPU[74] current=d[IDLE]v74, curr=d[IDLE]v74, prev=NULL Apr 24 04:12:12.188866 (XEN) Xen stack trace from sp=0000800ffb34fe60: Apr 24 04:12:12.188899 (XEN) (XEN) CPU[75] current=d[IDLE]v75, curr=d[IDLE]v75, prev=NULL Apr 24 04:12:12.200859 0000800ffb34fe70(XEN) CPU[76] current=d[IDLE]v76, curr=d[IDLE]v76, prev=NULL Apr 24 04:12:12.200895 00000a0000283a58(XEN) CPU[77] current=d[IDLE]v77, curr=d[IDLE]v77, prev=NULL Apr 24 04:12:12.212893 00000a0000341420(XEN) CPU[78] current=d[IDLE]v78, curr=d[IDLE]v78, prev=NULL Apr 24 04:12:12.212929 00000a00003785a8(XEN) CPU[79] current=d[IDLE]v79, curr=d[IDLE]v79, prev=NULL Apr 24 04:12:12.224879 Apr 24 04:12:12.224924 (XEN) (XEN) CPU[80] current=d[IDLE]v80, curr=d[IDLE]v80, prev=NULL Apr 24 04:12:12.224953 000000000000002a(XEN) CPU[81] current=d[IDLE]v81, curr=d[IDLE]v81, prev=NULL Apr 24 04:12:12.236871 0000000000000000(XEN) CPU[82] current=d[IDLE]v82, curr=d[IDLE]v82, prev=NULL Apr 24 04:12:12.236906 0000000000000000(XEN) CPU[83] current=d[IDLE]v83, curr=d[IDLE]v83, prev=NULL Apr 24 04:12:12.248868 000000000000020a(XEN) CPU[84] current=d[IDLE]v84, curr=d[IDLE]v84, prev=NULL Apr 24 04:12:12.260871 Apr 24 04:12:12.260911 (XEN) (XEN) CPU[85] current=d[IDLE]v85, curr=d[IDLE]v85, prev=NULL Apr 24 04:12:12.260946 0000000000000000(XEN) CPU[86] current=d[IDLE]v86, curr=d[IDLE]v86, prev=NULL Apr 24 04:12:12.272855 0000000000000000(XEN) CPU[87] current=d[IDLE]v87, curr=d[IDLE]v87, prev=NULL Apr 24 04:12:12.272890 0000000000000000(XEN) CPU[88] current=d[IDLE]v88, curr=d[IDLE]v88, prev=NULL Apr 24 04:12:12.284864 0000000000000000(XEN) CPU[89] current=d[IDLE]v89, curr=d[IDLE]v89, prev=NULL Apr 24 04:12:12.296866 Apr 24 04:12:12.296894 (XEN) (XEN) CPU[90] current=d[IDLE]v90, curr=d[IDLE]v90, prev=NULL Apr 24 04:12:12.296922 0000000000000000(XEN) CPU[91] current=d[IDLE]v91, curr=d[IDLE]v91, prev=NULL Apr 24 04:12:12.308863 0000000000000000(XEN) CPU[92] current=d[IDLE]v92, curr=d[IDLE]v92, prev=NULL Apr 24 04:12:12.308899 0000000000000000(XEN) CPU[93] current=d[IDLE]v93, curr=d[IDLE]v93, prev=NULL Apr 24 04:12:12.320866 0000000000000000(XEN) CPU[94] current=d[IDLE]v94, curr=d[IDLE]v94, prev=NULL Apr 24 04:12:12.320901 Apr 24 04:12:12.320922 (XEN) (XEN) CPU[95] current=d[IDLE]v95, curr=d[IDLE]v95, prev=NULL Apr 24 04:12:12.332860 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.332894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.344862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.356855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.356889 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.368863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.368897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.380859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.380893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.392872 (XEN) Xen call trace: Apr 24 04:12:12.392904 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:12.404857 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:12.404893 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:12.416831 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:12.416864 (XEN) Apr 24 04:12:12.416887 (XEN) *** Dumping CPU43 host state: *** Apr 24 04:12:12.416911 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:12.428876 (XEN) CPU: 43 Apr 24 04:12:12.428906 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:12.428935 (XEN) LR: 00000a0000276fcc Apr 24 04:12:12.440868 (XEN) SP: 0000800ffb347e60 Apr 24 04:12:12.440900 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:12.440928 (XEN) X0: 0000000000000000 X1: 0000760ffb012000 X2: 0000800ffb352078 Apr 24 04:12:12.452857 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:12.464859 (XEN) X6: 00000a00003825c8 X7: 0000800ffb354280 X8: 0000000000000012 Apr 24 04:12:12.464925 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:12.476843 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:12.476878 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:12.488872 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000002b Apr 24 04:12:12.488907 (XEN) X21: 00000a0000346a00 X22: 0000000000000800 X23: 000000000000002b Apr 24 04:12:12.500867 (XEN) X24: 000000000000002b X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:12.500901 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb347e60 Apr 24 04:12:12.512859 (XEN) Apr 24 04:12:12.512888 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:12.512913 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:12.524860 (XEN) Apr 24 04:12:12.524889 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:12.524914 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:12.524938 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:12.524961 (XEN) Apr 24 04:12:12.524981 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:12.536865 (XEN) HPFAR_EL2: 0000009010801d00 Apr 24 04:12:12.536897 (XEN) FAR_EL2: ffff80000b1d0100 Apr 24 04:12:12.536922 (XEN) Apr 24 04:12:12.536943 (XEN) Xen stack trace from sp=0000800ffb347e60: Apr 24 04:12:12.548860 (XEN) 0000800ffb347e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:12.548896 (XEN) 000000000000002b 0000000000000000 0000000000000000 000000000000020b Apr 24 04:12:12.560860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.560894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.572865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.572900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.584864 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.596866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.596900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.608866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.608900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.620863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.620898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.632864 (XEN) Xen call trace: Apr 24 04:12:12.632895 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:12.644868 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:12.644904 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:12.656856 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:12.656889 (XEN) Apr 24 04:12:12.656911 (XEN) *** Dumping CPU44 host state: *** Apr 24 04:12:12.656936 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:12.672804 (XEN) CPU: 44 Apr 24 04:12:12.672836 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:12.672864 (XEN) LR: 00000a0000276fcc Apr 24 04:12:12.672888 (XEN) SP: 0000800f1e2f7e60 Apr 24 04:12:12.684842 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:12.684877 (XEN) X0: 0000000000000000 X1: 0000760f1dfbe000 X2: 0000800f1e2fe078 Apr 24 04:12:12.696779 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:12.696814 (XEN) X6: 00000a00003825c8 X7: 0000800ffb354740 X8: 0000000000000012 Apr 24 04:12:12.708807 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:12.708842 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:12.716855 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:12.728862 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000002c Apr 24 04:12:12.728897 (XEN) X21: 00000a0000346a80 X22: 0000000000001000 X23: 000000000000002c Apr 24 04:12:12.740867 (XEN) X24: 000000000000002c X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:12.740902 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e2f7e60 Apr 24 04:12:12.752861 (XEN) Apr 24 04:12:12.752890 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:12.752915 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:12.764776 (XEN) Apr 24 04:12:12.764806 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:12.764831 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:12.764855 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:12.764878 (XEN) Apr 24 04:12:12.780877 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:12.780910 (XEN) HPFAR_EL2: 0000009010802900 Apr 24 04:12:12.780934 (XEN) FAR_EL2: ffff80000b290100 Apr 24 04:12:12.780958 (XEN) Apr 24 04:12:12.780979 (XEN) Xen stack trace from sp=0000800f1e2f7e60: Apr 24 04:12:12.781003 (XEN) 0000800f1e2f7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:12.792780 (XEN) 000000000000002c 0000000000000000 0000000000000000 000000000000020c Apr 24 04:12:12.804755 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.804790 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.816686 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.816686 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.828865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.828906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.840845 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.840880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.852865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.864793 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.864827 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:12.876754 (XEN) Xen call trace: Apr 24 04:12:12.876787 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:12.876817 (XEN) Apr 24 04:12:12.884849 [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:12.888784 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:12.888815 (XEN) [<0 Apr 24 04:12:12.891267 0000a00003785a8>] 00000a00003785a8 Apr 24 04:12:12.900782 (XEN) Apr 24 04:12:12.900808 (XEN) *** Dumping CPU45 host state: *** Apr 24 04:12:12.900833 (XEN) Synced stime skew: max=2560ns avg=2560ns samples=1 current=2560ns Apr 24 04:12:12.912850 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:12.912885 (XEN) Synced cycles skew: max=1447 avg=1447 samples=1 current=1447 Apr 24 04:12:12.924852 (XEN) CPU: 45 Apr 24 04:12:12.924883 (XEN) PC: 00000a000021dc00 common/keyhandler.c#read_clocks_slave+0xf0/0x120 Apr 24 04:12:12.924912 (XEN) LR: 00000a000021dbfc Apr 24 04:12:12.936859 (XEN) SP: 0000800f1e2efc80 Apr 24 04:12:12.936891 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:12.936919 (XEN) X0: 0000000000002000 X1: 00000a000034262c X2: 0000000000000000 Apr 24 04:12:12.948880 (XEN) X3: 000000000000dfff X4: 00000000731a00de X5: 00000a00003825c0 Apr 24 04:12:12.948914 (XEN) X6: 00000a00003825c8 X7: 0000800ffb354c00 X8: 0000000000000012 Apr 24 04:12:12.960949 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:12.972858 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:12.972858 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:12.984746 (XEN) X18: 0000000000000000 X19: 000000000000002d X20: 00000a0000340038 Apr 24 04:12:12.984746 (XEN) X21: 00000a0000378190 X22: 000000000000002d X23: 0000760f1dfbc000 Apr 24 04:12:12.996746 (XEN) X24: 0000800f1e2fc500 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:12.996746 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e2efc80 Apr 24 04:12:13.008740 (XEN) Apr 24 04:12:13.008740 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:13.008740 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:13.008740 (XEN) Apr 24 04:12:13.020754 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:13.020754 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:13.020754 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:13.020754 (XEN) Apr 24 04:12:13.020754 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:13.032748 (XEN) HPFAR_EL2: 0000009010803500 Apr 24 04:12:13.032748 (XEN) FAR_EL2: ffff80000b350100 Apr 24 04:12:13.032748 (XEN) Apr 24 04:12:13.032748 (XEN) Xen stack trace from sp=0000800f1e2efc80: Apr 24 04:12:13.044751 (XEN) 0000800f1e2efcc0 00000a000022e0e0 000000000000002d 00000a000021db10 Apr 24 04:12:13.044751 (XEN) 0000000000000000 0000000000000000 0000000000001fff 0000800ffb64f630 Apr 24 04:12:13.056751 (XEN) 0000800f1e2efcf0 00000a0000278e1c 0000000000000002 00000a0000358000 Apr 24 04:12:13.056751 (XEN) 0000800f1e2efd40 0000800ffb658ae8 0000800f1e2efd30 00000a0000286cc8 Apr 24 04:12:13.068752 (XEN) 00000a00003825cc 000000000000002d 0000800f1e2efe48 0000000080000249 Apr 24 04:12:13.068752 (XEN) 0000000007e00000 000000000000002d 0000800f1e2efe60 00000a000020432c Apr 24 04:12:13.080748 (XEN) 0000000000000000 0000760f1dfbc000 0000800f1e2fc078 ffffffffffffff9e Apr 24 04:12:13.080748 (XEN) 0000000000000000 00000a00003825c0 00000a00003825c8 0000800ffb354c00 Apr 24 04:12:13.092748 (XEN) 0000000000000012 0000000000000080 7f7f7f7f7f7f7f7f 0101010101010101 Apr 24 04:12:13.104749 (XEN) 0000000000000008 0000000000000020 0000000000000000 0000000000000001 Apr 24 04:12:13.104749 (XEN) 0000000000000000 0000000000000000 0000000000000000 00000a00003825cc Apr 24 04:12:13.116752 (XEN) 000000000000002d 00000a0000346b00 0000000000002000 000000000000002d Apr 24 04:12:13.116752 (XEN) 000000000000002d 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.128750 (XEN) 0000000000000000 0000800f1e2efe60 00000a0000276fcc 0000800f1e2efe60 Apr 24 04:12:13.128750 (XEN) 00000a0000276fe8 0000000080000249 0000000007e00000 00000a0000276fcc Apr 24 04:12:13.140748 (XEN) 0000800f1e2efe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:13.152740 (XEN) 000000000000002d 0000000000000000 0000000000000000 000000000000020d Apr 24 04:12:13.152740 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.164748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.164748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.176748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.176748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.188750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.200749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.200749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.212750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.212750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.224740 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.224740 (XEN) Xen call trace: Apr 24 04:12:13.224740 (XEN) [<00000a000021dc00>] common/keyhandler.c#read_clocks_slave+0xf0/0x120 (PC) Apr 24 04:12:13.236747 (XEN) [<00000a000021dbfc>] common/keyhandler.c#read_clocks_slave+0xec/0x120 (LR) Apr 24 04:12:13.248746 (XEN) [<00000a000022e0e0>] smp_call_function_interrupt+0x14c/0x154 Apr 24 04:12:13.248746 (XEN) [<00000a0000278e1c>] gic_interrupt+0x10c/0x110 Apr 24 04:12:13.260748 (XEN) [<00000a0000286cc8>] do_trap_irq+0x10/0x18 Apr 24 04:12:13.260748 (XEN) [<00000a000020432c>] entry.o#hyp_irq+0x80/0x84 Apr 24 04:12:13.260748 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:13.272749 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:13.272749 (XEN) Apr 24 04:12:13.272749 (XEN) *** Dumping CPU46 host state: *** Apr 24 04:12:13.284750 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:13.284750 (XEN) CPU: 46 Apr 24 04:12:13.284750 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:13.296749 (XEN) LR: 00000a0000276fcc Apr 24 04:12:13.296749 (XEN) SP: 0000800f1e27fe60 Apr 24 04:12:13.296749 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:13.308752 (XEN) X0: 0000000000000000 X1: 0000760f1dfb8000 X2: 0000800f1e2f8078 Apr 24 04:12:13.308752 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:13.320751 (XEN) X6: 00000a00003825c8 X7: 0000800f1e2e7150 X8: 0000000000000012 Apr 24 04:12:13.320751 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:13.332747 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:13.332747 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:13.344746 (XEN) X18: ffff0000264f01a0 X19: 00000a00003825cc X20: 000000000000002e Apr 24 04:12:13.356750 (XEN) X21: 00000a0000346b80 X22: 0000000000004000 X23: 000000000000002e Apr 24 04:12:13.356750 (XEN) X24: 000000000000002e X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:13.368746 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e27fe60 Apr 24 04:12:13.368746 (XEN) Apr 24 04:12:13.368746 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:13.380748 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:13.380748 (XEN) Apr 24 04:12:13.380748 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:13.380748 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:13.380748 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:13.392750 (XEN) Apr 24 04:12:13.392750 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:13.392750 (XEN) HPFAR_EL2: 0000009010804100 Apr 24 04:12:13.392750 (XEN) FAR_EL2: ffff80000b410100 Apr 24 04:12:13.404743 (XEN) Apr 24 04:12:13.404743 (XEN) Xen stack trace from sp=0000800f1e27fe60: Apr 24 04:12:13.404743 (XEN) 0000800f1e27fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:13.404743 (XEN) 000000000000002e 0000000000000000 0000000000000000 000000000000020e Apr 24 04:12:13.416748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.428752 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.428752 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.440750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.440750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.452751 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.452751 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.464748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.476740 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.476740 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.488749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.488749 (XEN) Xen call trace: Apr 24 04:12:13.488749 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:13.500750 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:13.512744 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:13.512744 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:13.512744 (XEN) Apr 24 04:12:13.512744 (XEN) *** Dumping CPU47 host state: *** Apr 24 04:12:13.524757 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:13.524757 (XEN) CPU: 47 Apr 24 04:12:13.524757 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:13.536749 (XEN) LR: 00000a0000276fcc Apr 24 04:12:13.536749 (XEN) SP: 0000800f1e277e60 Apr 24 04:12:13.536749 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:13.548751 (XEN) X0: 0000000000000000 X1: 0000760f1dfa4000 X2: 0000800f1e2e4078 Apr 24 04:12:13.548751 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:13.560749 (XEN) X6: 00000a00003825c8 X7: 0000800f1e2e7590 X8: 0000000000000012 Apr 24 04:12:13.560749 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:13.572748 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:13.584751 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:13.584751 (XEN) X18: ffff0000264f01a0 X19: 00000a00003825cc X20: 000000000000002f Apr 24 04:12:13.596750 (XEN) X21: 00000a0000346c00 X22: 0000000000008000 X23: 000000000000002f Apr 24 04:12:13.596750 (XEN) X24: 000000000000002f X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:13.608751 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e277e60 Apr 24 04:12:13.608751 (XEN) Apr 24 04:12:13.608751 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:13.620749 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:13.620749 (XEN) Apr 24 04:12:13.620749 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:13.620749 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:13.620749 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:13.632751 (XEN) Apr 24 04:12:13.632751 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:13.632751 (XEN) HPFAR_EL2: 0000009010804b00 Apr 24 04:12:13.632751 (XEN) FAR_EL2: ffff80000b4b0100 Apr 24 04:12:13.644746 (XEN) Apr 24 04:12:13.644746 (XEN) Xen stack trace from sp=0000800f1e277e60: Apr 24 04:12:13.644746 (XEN) 0000800f1e277e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:13.656741 (XEN) 000000000000002f 0000000000000000 0000000000000000 000000000000020f Apr 24 04:12:13.656741 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.668749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.668749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.680745 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.680745 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.692749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.704747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.704747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.716747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.716747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.728765 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.728765 (XEN) Xen call trace: Apr 24 04:12:13.728765 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:13.740751 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:13.752746 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:13.752746 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:13.752746 (XEN) Apr 24 04:12:13.752746 (XEN) *** Dumping CPU48 host state: *** Apr 24 04:12:13.764749 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:13.764749 (XEN) CPU: 48 Apr 24 04:12:13.764749 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:13.776751 (XEN) LR: 00000a0000276fcc Apr 24 04:12:13.776751 (XEN) SP: 0000800f1e26fe60 Apr 24 04:12:13.776751 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:13.788748 (XEN) X0: 0000000000000000 X1: 0000760f1dfa2000 X2: 0000800f1e2e2078 Apr 24 04:12:13.788748 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:13.800750 (XEN) X6: 00000a00003825c8 X7: 0000800f1e2e7a50 X8: 0000000000000012 Apr 24 04:12:13.800750 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:13.812747 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:13.824750 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:13.824750 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000030 Apr 24 04:12:13.836749 (XEN) X21: 00000a0000346c80 X22: 0000000000010000 X23: 0000000000000030 Apr 24 04:12:13.836749 (XEN) X24: 0000000000000030 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:13.848767 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e26fe60 Apr 24 04:12:13.848767 (XEN) Apr 24 04:12:13.848767 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:13.860748 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:13.860748 (XEN) Apr 24 04:12:13.860748 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:13.860748 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:13.872747 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:13.872747 (XEN) Apr 24 04:12:13.872747 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:13.872747 (XEN) HPFAR_EL2: 0000009010805b00 Apr 24 04:12:13.872747 (XEN) FAR_EL2: ffff80000b5b0100 Apr 24 04:12:13.884742 (XEN) Apr 24 04:12:13.884742 (XEN) Xen stack trace from sp=0000800f1e26fe60: Apr 24 04:12:13.884742 (XEN) 0000800f1e26fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:13.896746 (XEN) 0000000000000030 0000000000000000 0000000000000000 0000000000010000 Apr 24 04:12:13.896746 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.908790 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.908790 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.920749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.920749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.932746 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.944755 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.944755 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.956769 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.956769 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.968747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:13.968747 (XEN) Xen call trace: Apr 24 04:12:13.980744 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:13.980744 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:13.992749 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:13.992749 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:13.992749 (XEN) Apr 24 04:12:13.992749 (XEN) *** Dumping CPU49 host state: *** Apr 24 04:12:14.004742 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:14.004742 (XEN) CPU: 49 Apr 24 04:12:14.004742 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:14.016750 (XEN) LR: 00000a0000276fcc Apr 24 04:12:14.016750 (XEN) SP: 0000800fffdffe60 Apr 24 04:12:14.016750 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:14.028748 (XEN) X0: 0000000000000000 X1: 0000760f1df26000 X2: 0000800f1e266078 Apr 24 04:12:14.028748 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:14.040754 (XEN) X6: 00000a00003825c8 X7: 0000800f1e265010 X8: 0000000000000012 Apr 24 04:12:14.052722 (XEN) X9: 0000000000000080 X10: 0000000000000000 X11: 000000000000006c Apr 24 04:12:14.052722 (XEN) X12: 0000000000000000 X13: 00000000000003de X14: 000000000000020c Apr 24 04:12:14.064736 (XEN) X15: 0000000000000001 X16: 0000000000000218 X17: 0000000000000000 Apr 24 04:12:14.064736 (XEN) X18: 0000000000000218 X19: 00000a00003825cc X20: 0000000000000031 Apr 24 04:12:14.076735 (XEN) X21: 00000a0000346d00 X22: 0000000000020000 X23: 0000000000000031 Apr 24 04:12:14.076735 (XEN) X24: 0000000000000031 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:14.088750 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffdffe60 Apr 24 04:12:14.088750 (XEN) Apr 24 04:12:14.100752 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:14.100752 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:14.100752 (XEN) Apr 24 04:12:14.100752 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:14.100752 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:14.112746 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:14.112746 (XEN) Apr 24 04:12:14.112746 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:14.112746 (XEN) HPFAR_EL2: 0000008010000000 Apr 24 04:12:14.112746 (XEN) FAR_EL2: ffff80000a320104 Apr 24 04:12:14.124751 (XEN) Apr 24 04:12:14.124751 (XEN) Xen stack trace from sp=0000800fffdffe60: Apr 24 04:12:14.124751 (XEN) 0000800fffdffe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:14.136749 (XEN) 0000000000000031 0000000000000000 0000000000000000 0000000000010001 Apr 24 04:12:14.136749 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.148747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.148747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.160747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.172747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.172747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.184746 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.184746 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.196750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.196750 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.208748 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.208748 (XEN) Xen call trace: Apr 24 04:12:14.220964 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:14.221038 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:14.232979 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:14.233003 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:14.244976 (XEN) Apr 24 04:12:14.244976 (XEN) *** Dumping CPU50 host state: *** Apr 24 04:12:14.244976 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:14.244976 (XEN) CPU: 50 Apr 24 04:12:14.244976 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:14.256943 (XEN) LR: 00000a0000276fcc Apr 24 04:12:14.256943 (XEN) SP: 0000800fffdf7e60 Apr 24 04:12:14.256943 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:14.268878 (XEN) X0: 0000000000000000 X1: 0000760f1df22000 X2: 0000800f1e262078 Apr 24 04:12:14.280846 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:14.280877 (XEN) X6: 00000a00003825c8 X7: 0000800f1e265410 X8: 0000000000000012 Apr 24 04:12:14.292813 (XEN) X9: 0000000000000080 X10: 00000000000003fa X11: 000000000000001e Apr 24 04:12:14.292856 (XEN) X12: 00000000000010f7 X13: 0000000000000072 X14: 0000000000000097 Apr 24 04:12:14.304796 (XEN) X15: 0000ffffdf5f8598 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:14.304827 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000032 Apr 24 04:12:14.316850 (XEN) X21: 00000a0000346d80 X22: 0000000000040000 X23: 0000000000000032 Apr 24 04:12:14.316850 (XEN) X24: 0000000000000032 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:14.328834 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffdf7e60 Apr 24 04:12:14.340813 (XEN) Apr 24 04:12:14.340843 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:14.340867 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:14.340891 (XEN) Apr 24 04:12:14.340913 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:14.340936 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:14.352811 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:14.352843 (XEN) Apr 24 04:12:14.352866 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:14.352889 (XEN) HPFAR_EL2: 0000008010801300 Apr 24 04:12:14.364826 (XEN) FAR_EL2: ffff80000a930100 Apr 24 04:12:14.364858 (XEN) Apr 24 04:12:14.364880 (XEN) Xen stack trace from sp=0000800fffdf7e60: Apr 24 04:12:14.364906 (XEN) 0000800fffdf7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:14.376821 (XEN) 0000000000000032 0000000000000000 0000000000000000 0000000000010002 Apr 24 04:12:14.376852 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.388868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.388902 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.400868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.412866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.412900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.424862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.424896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.436864 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.436899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.448881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.460861 (XEN) Xen call trace: Apr 24 04:12:14.460892 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:14.460921 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:14.472862 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:14.472896 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:14.484862 (XEN) Apr 24 04:12:14.484891 (XEN) *** Dumping CPU51 host state: *** Apr 24 04:12:14.484916 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:14.484973 (XEN) CPU: 51 Apr 24 04:12:14.496856 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:14.496891 (XEN) LR: 00000a0000276fcc Apr 24 04:12:14.496916 (XEN) SP: 0000800fffde7e60 Apr 24 04:12:14.508861 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:14.508896 (XEN) X0: 0000000000000000 X1: 0000760f1df20000 X2: 0000800f1e260078 Apr 24 04:12:14.520823 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:14.520859 (XEN) X6: 00000a00003825c8 X7: 0000800f1e2658d0 X8: 0000000000000012 Apr 24 04:12:14.532815 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:14.532850 (XEN) X12: 0000000000000001 X13: 0000000000000254 X14: 0000000000000254 Apr 24 04:12:14.544802 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:14.544833 (XEN) X18: ffff80000daa3c58 X19: 00000a00003825cc X20: 0000000000000033 Apr 24 04:12:14.556889 (XEN) X21: 00000a0000346e00 X22: 0000000000080000 X23: 0000000000000033 Apr 24 04:12:14.556889 (XEN) X24: 0000000000000033 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:14.568824 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffde7e60 Apr 24 04:12:14.580829 (XEN) Apr 24 04:12:14.580859 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:14.580885 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:14.580912 (XEN) Apr 24 04:12:14.580934 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:14.592805 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:14.592838 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:14.592863 (XEN) Apr 24 04:12:14.592884 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:14.592909 (XEN) HPFAR_EL2: 0000008010801f00 Apr 24 04:12:14.604805 (XEN) FAR_EL2: ffff80000a9f0100 Apr 24 04:12:14.604837 (XEN) Apr 24 04:12:14.604859 (XEN) Xen stack trace from sp=0000800fffde7e60: Apr 24 04:12:14.604884 (XEN) 0000800fffde7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:14.616817 (XEN) 0000000000000033 0000000000000000 0000000000000000 0000000000010003 Apr 24 04:12:14.616851 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.628813 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.640808 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.640842 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.652825 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.652859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.664686 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.664686 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.676658 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.676658 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.688843 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.700763 (XEN) Xen call trace: Apr 24 04:12:14.700763 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:14.700763 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:14.712741 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:14.712741 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:14.724745 (XEN) Apr 24 04:12:14.724745 (XEN) *** Dumping CPU52 host state: *** Apr 24 04:12:14.724745 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:14.724745 (XEN) CPU: 52 Apr 24 04:12:14.736746 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:14.736746 (XEN) LR: 00000a0000276fcc Apr 24 04:12:14.736746 (XEN) SP: 0000800fffd7fe60 Apr 24 04:12:14.748701 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:14.748701 (XEN) X0: 0000000000000000 X1: 0000760fffaac000 X2: 0000800fffdec078 Apr 24 04:12:14.760832 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:14.760877 (XEN) X6: 00000a00003825c8 X7: 0000800f1e265d90 X8: 0000000000000012 Apr 24 04:12:14.772834 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:14.772883 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:14.784791 (XEN) X15: 0000000000000001 X16: 00000000000001f3 X17: 0000000000000000 Apr 24 04:12:14.784830 (XEN) X18: 00000000000001f3 X19: 00000a00003825cc X20: 0000000000000034 Apr 24 04:12:14.796779 (XEN) X21: 00000a0000346e80 X22: 0000000000100000 X23: 0000000000000034 Apr 24 04:12:14.808804 (XEN) X24: 0000000000000034 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:14.808839 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd7fe60 Apr 24 04:12:14.820801 (XEN) Apr 24 04:12:14.820831 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:14.820856 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:14.820880 (XEN) Apr 24 04:12:14.820901 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:14.832852 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:14.832885 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:14.832909 (XEN) Apr 24 04:12:14.832930 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:14.832954 (XEN) HPFAR_EL2: 0000008010802b00 Apr 24 04:12:14.844697 (XEN) FAR_EL2: ffff80000aab0100 Apr 24 04:12:14.844697 (XEN) Apr 24 04:12:14.844697 (XEN) Xen stack trace from sp=0000800fffd7fe60: Apr 24 04:12:14.844697 (XEN) 0000800fffd7fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:14.856758 (XEN) 0000000000000034 0000000000000000 0000000000000000 0000000000010004 Apr 24 04:12:14.856758 (XE Apr 24 04:12:14.865875 N) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.872826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.872862 (XEN) 0000000000000000 00000 Apr 24 04:12:14.875959 00000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.884843 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.884876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.896811 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.908872 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.908907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.916808 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.928879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.928913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:14.940859 (XEN) Xen call trace: Apr 24 04:12:14.940890 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:14.940919 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:14.952884 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:14.952917 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:14.964839 (XEN) Apr 24 04:12:14.964869 (XEN) *** Dumping CPU53 host state: *** Apr 24 04:12:14.964894 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:14.976854 (XEN) CPU: 53 Apr 24 04:12:14.976884 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:14.976912 (XEN) LR: 00000a0000276fcc Apr 24 04:12:14.976936 (XEN) SP: 0000800fffd77e60 Apr 24 04:12:14.988875 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:14.988911 (XEN) X0: 0000000000000000 X1: 0000760fffaa8000 X2: 0000800fffde8078 Apr 24 04:12:15.000868 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:15.000903 (XEN) X6: 00000a00003825c8 X7: 0000800fffdeb280 X8: 0000000000000012 Apr 24 04:12:15.012875 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:15.012909 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:15.024867 (XEN) X15: fffffc0000d86a80 X16: 00000000deadbeef X17: 00312d78742f7365 Apr 24 04:12:15.036842 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000035 Apr 24 04:12:15.036877 (XEN) X21: 00000a0000346f00 X22: 0000000000200000 X23: 0000000000000035 Apr 24 04:12:15.048854 (XEN) X24: 0000000000000035 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:15.048889 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd77e60 Apr 24 04:12:15.060854 (XEN) Apr 24 04:12:15.060883 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:15.060908 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:15.060932 (XEN) Apr 24 04:12:15.060953 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:15.072864 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:15.072897 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:15.072921 (XEN) Apr 24 04:12:15.072943 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:15.072968 (XEN) HPFAR_EL2: 0000008010803700 Apr 24 04:12:15.084860 (XEN) FAR_EL2: ffff80000ab70100 Apr 24 04:12:15.084892 (XEN) Apr 24 04:12:15.084914 (XEN) Xen stack trace from sp=0000800fffd77e60: Apr 24 04:12:15.084939 (XEN) 0000800fffd77e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:15.096870 (XEN) 0000000000000035 0000000000000000 0000000000000000 0000000000010005 Apr 24 04:12:15.108999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.109020 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.120878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.120918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.132861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.132896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.144861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.144895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.156866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.168841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.168875 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.180821 (XEN) Xen call trace: Apr 24 04:12:15.180853 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:15.180882 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:15.192864 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:15.192898 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:15.204864 (XEN) Apr 24 04:12:15.204893 (XEN) *** Dumping CPU54 host state: *** Apr 24 04:12:15.204918 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:15.216842 (XEN) CPU: 54 Apr 24 04:12:15.216872 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:15.216900 (XEN) LR: 00000a0000276fcc Apr 24 04:12:15.228774 (XEN) SP: 0000800fffd67e60 Apr 24 04:12:15.228806 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:15.228834 (XEN) X0: 0000000000000000 X1: 0000760fffa2e000 X2: 0000800fffd6e078 Apr 24 04:12:15.240797 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:15.240829 (XEN) X6: 00000a00003825c8 X7: 0000800fffdeb740 X8: 0000000000000012 Apr 24 04:12:15.252762 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 04:12:15.252793 (XEN) X12: 0000000000000001 X13: 0000000000000009 X14: 0000000000000009 Apr 24 04:12:15.264824 (XEN) X15: ffff00002caaca0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:15.276808 (XEN) X18: ffff80000c6dbc58 X19: 00000a00003825cc X20: 0000000000000036 Apr 24 04:12:15.276843 (XEN) X21: 00000a0000346f80 X22: 0000000000400000 X23: 0000000000000036 Apr 24 04:12:15.288872 (XEN) X24: 0000000000000036 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:15.288907 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd67e60 Apr 24 04:12:15.300859 (XEN) Apr 24 04:12:15.300888 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:15.300912 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:15.300936 (XEN) Apr 24 04:12:15.300957 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:15.312826 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:15.312858 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:15.312882 (XEN) Apr 24 04:12:15.312904 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:15.324842 (XEN) HPFAR_EL2: 0000008010804300 Apr 24 04:12:15.324874 (XEN) FAR_EL2: ffff80000ac30100 Apr 24 04:12:15.324898 (XEN) Apr 24 04:12:15.324920 (XEN) Xen stack trace from sp=0000800fffd67e60: Apr 24 04:12:15.324945 (XEN) 0000800fffd67e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:15.336824 (XEN) 0000000000000036 0000000000000000 0000000000000000 0000000000010006 Apr 24 04:12:15.348809 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.348838 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.360815 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.360845 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.372839 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.372873 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.384842 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.396841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.396875 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.408857 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.408891 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.420870 (XEN) Xen call trace: Apr 24 04:12:15.420901 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:15.432856 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:15.432892 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:15.444855 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:15.444888 (XEN) Apr 24 04:12:15.444910 (XEN) *** Dumping CPU55 host state: *** Apr 24 04:12:15.444935 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:15.456863 (XEN) CPU: 55 Apr 24 04:12:15.456893 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:15.456922 (XEN) LR: 00000a0000276fcc Apr 24 04:12:15.468857 (XEN) SP: 0000800fffcffe60 Apr 24 04:12:15.468889 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:15.468917 (XEN) X0: 0000000000000000 X1: 0000760fffa2a000 X2: 0000800fffd6a078 Apr 24 04:12:15.480903 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:15.480960 (XEN) X6: 00000a00003825c8 X7: 0000800fffdebc00 X8: 0000000000000012 Apr 24 04:12:15.492897 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:15.504860 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:15.504895 (XEN) X15: ffff00002675d30c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:15.516831 (XEN) X18: ffff80000cd23c58 X19: 00000a00003825cc X20: 0000000000000037 Apr 24 04:12:15.516867 (XEN) X21: 00000a0000347000 X22: 0000000000800000 X23: 0000000000000037 Apr 24 04:12:15.528860 (XEN) X24: 0000000000000037 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:15.528895 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffcffe60 Apr 24 04:12:15.540857 (XEN) Apr 24 04:12:15.540887 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:15.540912 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:15.540935 (XEN) Apr 24 04:12:15.552847 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:15.552879 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:15.552904 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:15.552927 (XEN) Apr 24 04:12:15.552948 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:15.564860 (XEN) HPFAR_EL2: 0000008010804f00 Apr 24 04:12:15.564891 (XEN) FAR_EL2: ffff80000acf0100 Apr 24 04:12:15.564916 (XEN) Apr 24 04:12:15.564937 (XEN) Xen stack trace from sp=0000800fffcffe60: Apr 24 04:12:15.576877 (XEN) 0000800fffcffe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:15.576912 (XEN) 0000000000000037 0000000000000000 0000000000000000 0000000000010007 Apr 24 04:12:15.588862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.588896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.600863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.600897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.612863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.624858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.624893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.636866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.636900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.648858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.648893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.660869 (XEN) Xen call trace: Apr 24 04:12:15.660900 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:15.672871 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:15.672907 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:15.684838 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:15.684871 (XEN) Apr 24 04:12:15.684893 (XEN) *** Dumping CPU56 host state: *** Apr 24 04:12:15.684918 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:15.696866 (XEN) CPU: 56 Apr 24 04:12:15.696896 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:15.696924 (XEN) LR: 00000a0000276fcc Apr 24 04:12:15.708866 (XEN) SP: 0000800fffcefe60 Apr 24 04:12:15.708898 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:15.708926 (XEN) X0: 0000000000000000 X1: 0000760fffa28000 X2: 0000800fffd68078 Apr 24 04:12:15.720862 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:15.732854 (XEN) X6: 00000a00003825c8 X7: 0000800fffcf6150 X8: 0000000000000012 Apr 24 04:12:15.732890 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:15.744858 (XEN) X12: 0000000000000001 X13: 00000000000001b8 X14: 00000000000001b8 Apr 24 04:12:15.744924 (XEN) X15: 0000fffff2a92868 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:15.756869 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000038 Apr 24 04:12:15.756904 (XEN) X21: 00000a0000347080 X22: 0000000001000000 X23: 0000000000000038 Apr 24 04:12:15.768832 (XEN) X24: 0000000000000038 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:15.768866 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffcefe60 Apr 24 04:12:15.780809 (XEN) Apr 24 04:12:15.780839 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:15.780864 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:15.792868 (XEN) Apr 24 04:12:15.792897 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:15.792922 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:15.792945 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:15.792968 (XEN) Apr 24 04:12:15.792989 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:15.804857 (XEN) HPFAR_EL2: 0000008010805b00 Apr 24 04:12:15.804889 (XEN) FAR_EL2: ffff80000adb0100 Apr 24 04:12:15.804914 (XEN) Apr 24 04:12:15.804935 (XEN) Xen stack trace from sp=0000800fffcefe60: Apr 24 04:12:15.816865 (XEN) 0000800fffcefe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:15.816901 (XEN) 0000000000000038 0000000000000000 0000000000000000 0000000000010008 Apr 24 04:12:15.828857 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.828892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.840863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.840898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.852841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.864855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.864890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.876866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.876900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.888850 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.888885 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:15.900863 (XEN) Xen call trace: Apr 24 04:12:15.900895 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:15.912862 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:15.912898 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:15.924862 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:15.924894 (XEN) Apr 24 04:12:15.924917 (XEN) *** Dumping CPU57 host state: *** Apr 24 04:12:15.924942 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:15.936887 (XEN) CPU: 57 Apr 24 04:12:15.936918 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:15.936946 (XEN) LR: 00000a0000276fcc Apr 24 04:12:15.948813 (XEN) SP: 0000800fffce7e60 Apr 24 04:12:15.948844 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:15.948872 (XEN) X0: 0000000000000000 X1: 0000760fff9b4000 X2: 0000800fffcf4078 Apr 24 04:12:15.960806 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:15.972863 (XEN) X6: 00000a00003825c8 X7: 0000800fffcf6590 X8: 0000000000000012 Apr 24 04:12:15.972898 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:15.984858 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:15.984892 (XEN) X15: ffff000028e2ef0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:15.996868 (XEN) X18: ffff80000df53c58 X19: 00000a00003825cc X20: 0000000000000039 Apr 24 04:12:15.996933 (XEN) X21: 00000a0000347100 X22: 0000000002000000 X23: 0000000000000039 Apr 24 04:12:16.008874 (XEN) X24: 0000000000000039 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:16.008908 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffce7e60 Apr 24 04:12:16.020874 (XEN) Apr 24 04:12:16.020903 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:16.020928 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:16.032858 (XEN) Apr 24 04:12:16.032887 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:16.032912 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:16.032936 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:16.032959 (XEN) Apr 24 04:12:16.044870 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:16.044902 (XEN) HPFAR_EL2: 0000009010800700 Apr 24 04:12:16.044927 (XEN) FAR_EL2: ffff80000b070100 Apr 24 04:12:16.044951 (XEN) Apr 24 04:12:16.044972 (XEN) Xen stack trace from sp=0000800fffce7e60: Apr 24 04:12:16.056862 (XEN) 0000800fffce7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:16.056897 (XEN) 0000000000000039 0000000000000000 0000000000000000 0000000000010009 Apr 24 04:12:16.068869 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.068904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.080875 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.092863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.092897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.104861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.104895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.116866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.116901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.128871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.128905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.140874 (XEN) Xen call trace: Apr 24 04:12:16.140905 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:16.152858 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:16.152894 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:16.164865 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:16.164898 (XEN) Apr 24 04:12:16.164919 (XEN) *** Dumping CPU58 host state: *** Apr 24 04:12:16.164944 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:16.176874 (XEN) CPU: 58 Apr 24 04:12:16.176905 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:16.188862 (XEN) LR: 00000a0000276fcc Apr 24 04:12:16.188894 (XEN) SP: 0000800fffc7fe60 Apr 24 04:12:16.188919 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:16.200863 (XEN) X0: 0000000000000000 X1: 0000760fff9b0000 X2: 0000800fffcf0078 Apr 24 04:12:16.200898 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:16.212816 (XEN) X6: 00000a00003825c8 X7: 0000800fffcf6a50 X8: 0000000000000012 Apr 24 04:12:16.212851 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:16.224827 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:16.224862 (XEN) X15: ffff00002722df0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:16.236813 (XEN) X18: ffff80000d81bc58 X19: 00000a00003825cc X20: 000000000000003a Apr 24 04:12:16.236843 (XEN) X21: 00000a0000347180 X22: 0000000004000000 X23: 000000000000003a Apr 24 04:12:16.248802 (XEN) X24: 000000000000003a X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:16.260826 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc7fe60 Apr 24 04:12:16.260857 (XEN) Apr 24 04:12:16.260879 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:16.260902 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:16.272808 (XEN) Apr 24 04:12:16.272833 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:16.272857 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:16.272880 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:16.284792 (XEN) Apr 24 04:12:16.284817 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:16.284840 (XEN) HPFAR_EL2: 0000009010801300 Apr 24 04:12:16.284864 (XEN) FAR_EL2: ffff80000b130100 Apr 24 04:12:16.284887 (XEN) Apr 24 04:12:16.284907 (XEN) Xen stack trace from sp=0000800fffc7fe60: Apr 24 04:12:16.296824 (XEN) 0000800fffc7fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:16.296855 (XEN) 000000000000003a 0000000000000000 0000000000000000 000000000001000a Apr 24 04:12:16.308811 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.308841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.320871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.332785 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.332821 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.344866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.344901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.356866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.356901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.368863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.380873 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.380907 (XEN) Xen call trace: Apr 24 04:12:16.380931 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:16.392865 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:16.392901 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:16.404864 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:16.404897 (XEN) Apr 24 04:12:16.404919 (XEN) *** Dumping CPU59 host state: *** Apr 24 04:12:16.416871 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:16.416907 (XEN) CPU: 59 Apr 24 04:12:16.416930 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:16.428862 (XEN) LR: 00000a0000276fcc Apr 24 04:12:16.428894 (XEN) SP: 0000800fffc6fe60 Apr 24 04:12:16.428918 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:16.440855 (XEN) X0: 0000000000000000 X1: 0000760fff936000 X2: 0000800fffc76078 Apr 24 04:12:16.440855 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:16.452823 (XEN) X6: 00000a00003825c8 X7: 0000800fffc74010 X8: 0000000000000012 Apr 24 04:12:16.452866 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:16.464833 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:16.464868 (XEN) X15: ffff00002caad50c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:16.476778 (XEN) X18: ffff80000d2e3c58 X19: 00000a00003825cc X20: 000000000000003b Apr 24 04:12:16.488775 (XEN) X21: 00000a0000347200 X22: 0000000008000000 X23: 000000000000003b Apr 24 04:12:16.488806 (XEN) X24: 000000000000003b X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:16.500828 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc6fe60 Apr 24 04:12:16.500863 (XEN) Apr 24 04:12:16.500885 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:16.500939 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:16.512855 (XEN) Apr 24 04:12:16.512885 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:16.512910 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:16.512933 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:16.524867 (XEN) Apr 24 04:12:16.524895 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:16.524920 (XEN) HPFAR_EL2: 0000009010801f00 Apr 24 04:12:16.524943 (XEN) FAR_EL2: ffff80000b1f0100 Apr 24 04:12:16.524966 (XEN) Apr 24 04:12:16.524987 (XEN) Xen stack trace from sp=0000800fffc6fe60: Apr 24 04:12:16.536866 (XEN) 0000800fffc6fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:16.536901 (XEN) 000000000000003b 0000000000000000 0000000000000000 000000000001000b Apr 24 04:12:16.548863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.560858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.560892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.572859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.572893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.584876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.584910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.596873 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.596907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.608868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.620859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.620893 (XEN) Xen call trace: Apr 24 04:12:16.620917 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:16.632864 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:16.632899 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:16.644863 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:16.644896 (XEN) Apr 24 04:12:16.644919 (XEN) *** Dumping CPU60 host state: *** Apr 24 04:12:16.656867 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:16.656902 (XEN) CPU: 60 Apr 24 04:12:16.656925 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:16.668894 (XEN) LR: 00000a0000276fcc Apr 24 04:12:16.668926 (XEN) SP: 0000800fffc67e60 Apr 24 04:12:16.668951 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:16.684936 (XEN) X0: 0000000000000000 X1: 0000760fff932000 X2: 0000800fffc72078 Apr 24 04:12:16.684970 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:16.684998 (XEN) X6: 00000a00003825c8 X7: 0000800fffc74410 X8: 0000000000000012 Apr 24 04:12:16.696778 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:16.708800 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:16.708834 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:16.720838 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000003c Apr 24 04:12:16.720871 (XEN) X21: 00000a0000347280 X22: 0000000010000000 X23: 000000000000003c Apr 24 04:12:16.732859 (XEN) X24: 000000000000003c X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:16.732893 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc67e60 Apr 24 04:12:16.744856 (XEN) Apr 24 04:12:16.744885 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:16.744910 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:16.744934 (XEN) Apr 24 04:12:16.756876 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:16.756938 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:16.756965 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:16.756989 (XEN) Apr 24 04:12:16.757009 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:16.773001 (XEN) HPFAR_EL2: 0000009010802b00 Apr 24 04:12:16.773157 (XEN) FAR_EL2: ffff80000b2b0100 Apr 24 04:12:16.773240 (XEN) Apr 24 04:12:16.773311 (XEN) Xen stack trace from sp=0000800fffc67e60: Apr 24 04:12:16.773390 (XEN) 0000800fffc67e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:16.784813 (XEN) 000000000000003c 0000000000000000 0000000000000000 000000000001000c Apr 24 04:12:16.784848 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.796794 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.808826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.808878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.820784 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.820784 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.832747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.832747 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.840930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.852895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.852938 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:16.864850 (XEN) Xen call trace: Apr 24 04:12:16.864895 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:16.876833 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:16.876879 (XEN) [<00000a0000283a58>] start_second Apr 24 04:12:16.877560 ary+0x218/0x21c Apr 24 04:12:16.888878 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:16.888878 (XEN) Apr 24 04:12:16.888878 (XEN) *** Dumping CPU61 host state: *** Apr 24 04:12:16.888878 (XEN) ----[ Xen-4.19-uns Apr 24 04:12:16.890172 table arm64 debug=y Not tainted ]---- Apr 24 04:12:16.900776 (XEN) CPU: 61 Apr 24 04:12:16.900776 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:16.900776 (XEN) LR: 00000a0000276fcc Apr 24 04:12:16.912783 (XEN) SP: 0000800fffc17e60 Apr 24 04:12:16.912783 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:16.912783 (XEN) X0: 0000000000000000 X1: 0000760fff8de000 X2: 0000800fffc1e078 Apr 24 04:12:16.924864 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:16.936803 (XEN) X6: 00000a00003825c8 X7: 0000800fffc748d0 X8: 0000000000000012 Apr 24 04:12:16.936835 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:16.948820 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:16.948820 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:16.960929 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000003d Apr 24 04:12:16.960938 (XEN) X21: 00000a0000347300 X22: 0000000020000000 X23: 000000000000003d Apr 24 04:12:16.972918 (XEN) X24: 000000000000003d X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:16.972918 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc17e60 Apr 24 04:12:16.984879 (XEN) Apr 24 04:12:16.984915 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:16.984940 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:16.996922 (XEN) Apr 24 04:12:16.996922 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:16.996922 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:16.996922 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:16.996922 (XEN) Apr 24 04:12:16.996922 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:17.008865 (XEN) HPFAR_EL2: 0000009010803700 Apr 24 04:12:17.008903 (XEN) FAR_EL2: ffff80000b370100 Apr 24 04:12:17.008927 (XEN) Apr 24 04:12:17.008949 (XEN) Xen stack trace from sp=0000800fffc17e60: Apr 24 04:12:17.020851 (XEN) 0000800fffc17e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:17.020886 (XEN) 000000000000003d 0000000000000000 0000000000000000 000000000001000d Apr 24 04:12:17.032833 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.032868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.044830 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.044873 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.056847 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.068824 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.068855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.080824 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.080855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.092831 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.092867 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.104827 (XEN) Xen call trace: Apr 24 04:12:17.104858 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:17.116835 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:17.116870 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:17.128826 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:17.128858 (XEN) Apr 24 04:12:17.128880 (XEN) *** Dumping CPU62 host state: *** Apr 24 04:12:17.128905 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:17.140830 (XEN) CPU: 62 Apr 24 04:12:17.140860 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:17.152820 (XEN) LR: 00000a0000276fcc Apr 24 04:12:17.152852 (XEN) SP: 0000800fffc0fe60 Apr 24 04:12:17.152877 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:17.152904 (XEN) X0: 0000000000000000 X1: 0000760fff8dc000 X2: 0000800fffc1c078 Apr 24 04:12:17.164838 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:17.176779 (XEN) X6: 00000a00003825c8 X7: 0000800fffc74d90 X8: 0000000000000012 Apr 24 04:12:17.176810 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:17.188781 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:17.188812 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:17.200832 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000003e Apr 24 04:12:17.200867 (XEN) X21: 00000a0000347380 X22: 0000000040000000 X23: 000000000000003e Apr 24 04:12:17.212834 (XEN) X24: 000000000000003e X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:17.224833 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc0fe60 Apr 24 04:12:17.252558 (XEN) Apr 24 04:12:17.252615 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:17.252667 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:17.252729 (XEN) Apr 24 04:12:17.252751 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:17.252775 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:17.252799 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:17.252822 (XEN) Apr 24 04:12:17.252843 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:17.252866 (XEN) HPFAR_EL2: 0000009010804300 Apr 24 04:12:17.252914 (XEN) FAR_EL2: ffff80000b430100 Apr 24 04:12:17.252940 (XEN) Apr 24 04:12:17.252961 (XEN) Xen stack trace from sp=0000800fffc0fe60: Apr 24 04:12:17.260869 (XEN) 0000800fffc0fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:17.260919 (XEN) 000000000000003e 0000000000000000 0000000000000000 000000000001000e Apr 24 04:12:17.272841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.272875 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.284826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.296836 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.296871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.308827 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.308861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.320834 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.320868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.332839 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.344827 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.344862 (XEN) Xen call trace: Apr 24 04:12:17.344886 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:17.356835 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:17.356871 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:17.368830 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:17.368863 (XEN) Apr 24 04:12:17.368885 (XEN) *** Dumping CPU63 host state: *** Apr 24 04:12:17.368910 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:17.380839 (XEN) CPU: 63 Apr 24 04:12:17.380870 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:17.392828 (XEN) LR: 00000a0000276fcc Apr 24 04:12:17.392860 (XEN) SP: 0000800ffdf9fe60 Apr 24 04:12:17.392884 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:17.404830 (XEN) X0: 0000000000000000 X1: 0000760fff8d8000 X2: 0000800fffc18078 Apr 24 04:12:17.404865 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:17.416823 (XEN) X6: 00000a00003825c8 X7: 0000800fffc1a280 X8: 0000000000000012 Apr 24 04:12:17.416871 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:17.428814 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:17.428859 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:17.440827 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000003f Apr 24 04:12:17.440871 (XEN) X21: 00000a0000347400 X22: 0000000080000000 X23: 000000000000003f Apr 24 04:12:17.452816 (XEN) X24: 000000000000003f X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:17.464815 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf9fe60 Apr 24 04:12:17.464863 (XEN) Apr 24 04:12:17.464893 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:17.464926 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:17.476816 (XEN) Apr 24 04:12:17.476855 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:17.476889 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:17.476921 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:17.488816 (XEN) Apr 24 04:12:17.488854 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:17.488891 (XEN) HPFAR_EL2: 0000009010804f00 Apr 24 04:12:17.488926 (XEN) FAR_EL2: ffff80000b4f0100 Apr 24 04:12:17.488962 (XEN) Apr 24 04:12:17.488992 (XEN) Xen stack trace from sp=0000800ffdf9fe60: Apr 24 04:12:17.500826 (XEN) 0000800ffdf9fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:17.500906 (XEN) 000000000000003f 0000000000000000 0000000000000000 000000000001000f Apr 24 04:12:17.512822 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.512868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.524818 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.536808 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.536854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.548813 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.548859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.560810 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.560853 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.572815 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.584810 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.584853 (XEN) Xen call trace: Apr 24 04:12:17.584885 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:17.596914 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:17.596964 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:17.608817 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:17.608861 (XEN) Apr 24 04:12:17.608895 (XEN) *** Dumping CPU64 host state: *** Apr 24 04:12:17.620806 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:17.620850 (XEN) CPU: 64 Apr 24 04:12:17.620882 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:17.632959 (XEN) LR: 00000a0000276fcc Apr 24 04:12:17.632997 (XEN) SP: 0000800ffdf97e60 Apr 24 04:12:17.633031 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:17.644825 (XEN) X0: 0000000000000000 X1: 0000760fff8c4000 X2: 0000800fffc04078 Apr 24 04:12:17.644875 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:17.656815 (XEN) X6: 00000a00003825c8 X7: 0000800fffc1a740 X8: 0000000000000012 Apr 24 04:12:17.656863 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:17.668822 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:17.668869 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:17.680806 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000040 Apr 24 04:12:17.692806 (XEN) X21: 00000a0000347480 X22: 0000000000000001 X23: 0000000000000040 Apr 24 04:12:17.692849 (XEN) X24: 0000000000000040 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:17.704813 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf97e60 Apr 24 04:12:17.704860 (XEN) Apr 24 04:12:17.704892 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:17.716801 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:17.716834 (XEN) Apr 24 04:12:17.716856 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:17.716880 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:17.716904 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:17.728780 (XEN) Apr 24 04:12:17.728805 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:17.728830 (XEN) HPFAR_EL2: 0000009010805d00 Apr 24 04:12:17.728853 (XEN) FAR_EL2: ffff80000b5d0100 Apr 24 04:12:17.728877 (XEN) Apr 24 04:12:17.740778 (XEN) Xen stack trace from sp=0000800ffdf97e60: Apr 24 04:12:17.740809 (XEN) 0000800ffdf97e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:17.740836 (XEN) 0000000000000040 0000000000000000 0000000000000000 0000000000010100 Apr 24 04:12:17.752823 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.764778 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.764809 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.776776 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.776807 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.788777 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.788808 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.800788 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.812773 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.812804 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.824864 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:17.824909 (XEN) Xen call trace: Apr 24 04:12:17.824938 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:17.836787 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:17.836819 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:17.848800 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:17.848832 (XEN) Apr 24 04:12:17.848854 (XEN) *** Dumping CPU65 host state: *** Apr 24 04:12:17.860795 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:17.860837 (XEN) CPU: 65 Apr 24 04:12:17.860872 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:17.872796 (XEN) LR: 00000a0000276fcc Apr 24 04:12:17.872824 (XEN) SP: 0000800ffdf8fe60 Apr 24 04:12:17.872849 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:17.884830 (XEN) X0: 0000000000000000 X1: 0000760fff8c2000 X2: 0000800fffc02078 Apr 24 04:12:17.884830 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:17.896808 (XEN) X6: 00000a00003825c8 X7: 0000800fffc1ac00 X8: 0000800ffb659178 Apr 24 04:12:17.896846 (XEN) X9: 0000000000000000 X10: 00000116b1b76c54 X11: 0000000000008f0c Apr 24 04:12:17.908804 (XEN) X12: 00ae1062c408586c X13: 00002b81ee5ccc6c X14: 00000000000000cc Apr 24 04:12:17.908836 (XEN) X15: 0000ffffe186b998 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:17.920860 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000041 Apr 24 04:12:17.932854 (XEN) X21: 00000a0000347500 X22: 0000000000000002 X23: 0000000000000041 Apr 24 04:12:17.932899 (XEN) X24: 0000000000000041 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:17.944872 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf8fe60 Apr 24 04:12:17.944919 (XEN) Apr 24 04:12:17.944941 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:17.956854 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:17.956896 (XEN) Apr 24 04:12:17.956918 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:17.956941 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:17.956964 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:17.968849 (XEN) Apr 24 04:12:17.968891 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:17.968914 (XEN) HPFAR_EL2: 0000008010800900 Apr 24 04:12:17.968938 (XEN) FAR_EL2: ffff80000a890100 Apr 24 04:12:17.980857 (XEN) Apr 24 04:12:17.980899 (XEN) Xen stack trace from sp=0000800ffdf8fe60: Apr 24 04:12:17.980924 (XEN) 0000800ffdf8fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:17.992780 (XEN) 0000000000000041 0000000000000000 0000000000000000 0000000000010101 Apr 24 04:12:17.992812 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.004783 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.004842 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.016827 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.016862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.028839 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.028874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.040831 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.052836 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.052870 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.064829 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.064864 (XEN) Xen call trace: Apr 24 04:12:18.064888 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:18.076831 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:18.088825 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:18.088860 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:18.088885 (XEN) Apr 24 04:12:18.088907 (XEN) *** Dumping CPU66 host state: *** Apr 24 04:12:18.100826 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:18.100861 (XEN) CPU: 66 Apr 24 04:12:18.100884 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:18.112828 (XEN) LR: 00000a0000276fcc Apr 24 04:12:18.112860 (XEN) SP: 0000800ffdf1fe60 Apr 24 04:12:18.112884 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:18.124809 (XEN) X0: 0000000000000000 X1: 0000760ffdc46000 X2: 0000800ffdf86078 Apr 24 04:12:18.124839 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:18.136813 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf85150 X8: 0000000000000012 Apr 24 04:12:18.136844 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:18.148809 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:18.160803 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:18.160833 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000042 Apr 24 04:12:18.172810 (XEN) X21: 00000a0000347580 X22: 0000000000000004 X23: 0000000000000042 Apr 24 04:12:18.172840 (XEN) X24: 0000000000000042 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:18.184829 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf1fe60 Apr 24 04:12:18.184860 (XEN) Apr 24 04:12:18.184882 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:18.196807 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:18.196840 (XEN) Apr 24 04:12:18.196862 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:18.196886 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:18.208794 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:18.208826 (XEN) Apr 24 04:12:18.208848 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:18.208871 (XEN) HPFAR_EL2: 0000008010801500 Apr 24 04:12:18.208895 (XEN) FAR_EL2: ffff80000a950100 Apr 24 04:12:18.220779 (XEN) Apr 24 04:12:18.220804 (XEN) Xen stack trace from sp=0000800ffdf1fe60: Apr 24 04:12:18.220829 (XEN) 0000800ffdf1fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:18.232779 (XEN) 0000000000000042 0000000000000000 0000000000000000 0000000000010102 Apr 24 04:12:18.232809 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.244781 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.244813 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.256786 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.256848 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.268786 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.280832 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.280868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.292833 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.292868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.304831 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.304865 (XEN) Xen call trace: Apr 24 04:12:18.316820 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:18.316856 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:18.328825 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:18.328860 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:18.328885 (XEN) Apr 24 04:12:18.328907 (XEN) *** Dumping CPU67 host state: *** Apr 24 04:12:18.340830 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:18.340865 (XEN) CPU: 67 Apr 24 04:12:18.340888 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:18.352829 (XEN) LR: 00000a0000276fcc Apr 24 04:12:18.352861 (XEN) SP: 0000800ffdf17e60 Apr 24 04:12:18.352885 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:18.364832 (XEN) X0: 0000000000000000 X1: 0000760ffdc42000 X2: 0000800ffdf82078 Apr 24 04:12:18.364868 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:18.376842 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf85590 X8: 0000000000000012 Apr 24 04:12:18.388831 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:18.388866 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:18.400826 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:18.400861 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000043 Apr 24 04:12:18.412823 (XEN) X21: 00000a0000347600 X22: 0000000000000008 X23: 0000000000000043 Apr 24 04:12:18.412858 (XEN) X24: 0000000000000043 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:18.424832 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf17e60 Apr 24 04:12:18.424867 (XEN) Apr 24 04:12:18.424888 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:18.436844 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:18.436877 (XEN) Apr 24 04:12:18.436899 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:18.436923 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:18.448828 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:18.448860 (XEN) Apr 24 04:12:18.448882 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:18.448905 (XEN) HPFAR_EL2: 0000008010802100 Apr 24 04:12:18.448929 (XEN) FAR_EL2: ffff80000aa10100 Apr 24 04:12:18.460826 (XEN) Apr 24 04:12:18.460856 (XEN) Xen stack trace from sp=0000800ffdf17e60: Apr 24 04:12:18.460883 (XEN) 0000800ffdf17e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:18.472788 (XEN) 0000000000000043 0000000000000000 0000000000000000 0000000000010103 Apr 24 04:12:18.472820 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.484785 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.484820 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.496871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.496906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.508837 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.520870 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.520905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.532834 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.532869 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.544833 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.544867 (XEN) Xen call trace: Apr 24 04:12:18.556870 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:18.556906 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:18.568826 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:18.568860 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:18.568885 (XEN) Apr 24 04:12:18.580825 (XEN) *** Dumping CPU68 host state: *** Apr 24 04:12:18.580858 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:18.580885 (XEN) CPU: 68 Apr 24 04:12:18.580908 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:18.592832 (XEN) LR: 00000a0000276fcc Apr 24 04:12:18.592883 (XEN) SP: 0000800ffdf07e60 Apr 24 04:12:18.592927 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:18.604832 (XEN) X0: 0000000000000000 X1: 0000760ffdc40000 X2: 0000800ffdf80078 Apr 24 04:12:18.604880 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:18.616823 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf85a50 X8: 0000000000000012 Apr 24 04:12:18.628886 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000002 Apr 24 04:12:18.628950 (XEN) X12: 0000000000000001 X13: 00000000000000bb X14: 00000000000000bb Apr 24 04:12:18.640897 (XEN) X15: 0000aaaaf2edeca0 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:18.640960 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000044 Apr 24 04:12:18.652889 (XEN) X21: 00000a0000347680 X22: 0000000000000010 X23: 0000000000000044 Apr 24 04:12:18.652952 (XEN) X24: 0000000000000044 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:18.664898 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf07e60 Apr 24 04:12:18.664961 (XEN) Apr 24 04:12:18.676767 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:18.676800 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:18.676825 (XEN) Apr 24 04:12:18.676846 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:18.676870 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:18.692728 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:18.692728 (XEN) Apr 24 04:12:18.692728 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:18.692728 (XEN) HPFAR_EL2: 0000008010000200 Apr 24 04:12:18.692728 (XEN) FAR_EL2: ffff80000a380090 Apr 24 04:12:18.692728 (XEN) Apr 24 04:12:18.692728 (XEN) Xen stack trace from sp=0000800ffdf07e60: Apr 24 04:12:18.704681 (XEN) 0000800ffdf07e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:18.704681 (XEN) 0000000000000044 0000000000000000 0000000000000000 0000000000010104 Apr 24 04:12:18.716922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.728886 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.728949 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.740886 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.740948 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.752907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.752970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.768880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.768938 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.780710 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.780710 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.792746 (XEN) Xen call trace: Apr 24 04:12:18.792746 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:18.804700 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:18.804700 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:18.816819 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:18.816819 (XEN) Apr 24 04:12:18.816819 (XEN) *** Dumping CPU69 host state: *** Apr 24 04:12:18.816819 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:18.828764 (XEN) CPU: 69 Apr 24 04:12:18.828764 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:18.828764 (XEN) LR: 00000a0000276fcc Apr 24 04:12:18.836798 (XEN) SP: 0000800ffde9fe60 Apr 24 04:12:18.836798 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:18.848969 (XEN) X0: 0000000000000000 X1: 0000760ffdbcc000 X2: 0000800ffdf0c078 Apr 24 04:12:18.849051 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:18.860681 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0b010 X8: 0000000000000012 Apr 24 04:12:18.860681 (XEN) X9: 0000000 Apr 24 04:12:18.865537 000000000 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 04:12:18.872807 (XEN) X12: 0000000000000000 X13: 0000000000000000 X14: 0000000000000264 Apr 24 04:12:18.872849 (XEN) Apr 24 04:12:18.874189 X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 04:12:18.884778 (XEN) X18: 0000000000000006 X19: 00000a00003825d0 X20: 0000000000000045 Apr 24 04:12:18.896878 (XEN) X21: 00000a0000347700 X22: 0000000000000020 X23: 0000000000000045 Apr 24 04:12:18.896943 (XEN) X24: 0000000000000045 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:18.908873 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde9fe60 Apr 24 04:12:18.908937 (XEN) Apr 24 04:12:18.908978 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:18.924914 (XEN) VTTBR_EL2: 00020107fc6d1000 Apr 24 04:12:18.924975 (XEN) Apr 24 04:12:18.925015 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:18.925058 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:18.925100 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:18.925142 (XEN) Apr 24 04:12:18.925180 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 04:12:18.932855 (XEN) HPFAR_EL2: 0000008010803900 Apr 24 04:12:18.932915 (XEN) FAR_EL2: ffff80000ab90100 Apr 24 04:12:18.932960 (XEN) Apr 24 04:12:18.944886 (XEN) Xen stack trace from sp=0000800ffde9fe60: Apr 24 04:12:18.944947 (XEN) 0000800ffde9fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:18.944998 (XEN) 0000000000000045 0000000000000000 0000000000000000 0000000000010105 Apr 24 04:12:18.956899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.968885 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.968948 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.980892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.980955 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.992892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:18.992955 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.004889 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.016949 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.017051 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.028887 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.028950 (XEN) Xen call trace: Apr 24 04:12:19.028993 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:19.040889 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:19.040954 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:19.052905 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:19.052965 (XEN) Apr 24 04:12:19.053004 (XEN) *** Dumping CPU70 host state: *** Apr 24 04:12:19.064881 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:19.064945 (XEN) CPU: 70 Apr 24 04:12:19.064987 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:19.076898 (XEN) LR: 00000a0000276fcc Apr 24 04:12:19.076956 (XEN) SP: 0000800ffde97e60 Apr 24 04:12:19.077000 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:19.088894 (XEN) X0: 0000000000000000 X1: 0000760ffdbc8000 X2: 0000800ffdf08078 Apr 24 04:12:19.088959 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:19.100903 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0b410 X8: 0000000000000012 Apr 24 04:12:19.100969 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:19.112851 (XEN) X12: 0000000000000001 X13: 00000000000002bb X14: 00000000000002bb Apr 24 04:12:19.124851 (XEN) X15: fffffc0000a23d80 X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:19.124916 (XEN) X18: ffff80000cccbc58 X19: 00000a00003825d0 X20: 0000000000000046 Apr 24 04:12:19.136862 (XEN) X21: 00000a0000347780 X22: 0000000000000040 X23: 0000000000000046 Apr 24 04:12:19.136925 (XEN) X24: 0000000000000046 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:19.148861 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde97e60 Apr 24 04:12:19.148926 (XEN) Apr 24 04:12:19.148966 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:19.160897 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:19.160956 (XEN) Apr 24 04:12:19.160996 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:19.161039 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:19.161082 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:19.172899 (XEN) Apr 24 04:12:19.172953 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:19.172998 (XEN) HPFAR_EL2: 0000008010804500 Apr 24 04:12:19.173041 (XEN) FAR_EL2: ffff80000ac50100 Apr 24 04:12:19.184901 (XEN) Apr 24 04:12:19.184960 (XEN) Xen stack trace from sp=0000800ffde97e60: Apr 24 04:12:19.185008 (XEN) 0000800ffde97e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:19.196869 (XEN) 0000000000000046 0000000000000000 0000000000000000 0000000000010106 Apr 24 04:12:19.196937 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.208910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.208985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.220859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.220923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.232934 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.233010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.244895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.256917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.256982 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.268906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.269008 (XEN) Xen call trace: Apr 24 04:12:19.269055 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:19.280902 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:19.292921 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:19.292989 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:19.293036 (XEN) Apr 24 04:12:19.293074 (XEN) *** Dumping CPU71 host state: *** Apr 24 04:12:19.304854 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:19.304917 (XEN) CPU: 71 Apr 24 04:12:19.304959 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:19.316866 (XEN) LR: 00000a0000276fcc Apr 24 04:12:19.316924 (XEN) SP: 0000800ffde87e60 Apr 24 04:12:19.316967 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:19.328867 (XEN) X0: 0000000000000000 X1: 0000760ffdb4e000 X2: 0000800ffde8e078 Apr 24 04:12:19.328932 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:19.340863 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0b8d0 X8: 0000000000000012 Apr 24 04:12:19.340927 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:19.352860 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:19.364852 (XEN) X15: ffff00002caad20c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:19.364915 (XEN) X18: ffff80000d243c58 X19: 00000a00003825d0 X20: 0000000000000047 Apr 24 04:12:19.376854 (XEN) X21: 00000a0000347800 X22: 0000000000000080 X23: 0000000000000047 Apr 24 04:12:19.376918 (XEN) X24: 0000000000000047 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:19.388855 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde87e60 Apr 24 04:12:19.388919 (XEN) Apr 24 04:12:19.388959 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:19.400856 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:19.400915 (XEN) Apr 24 04:12:19.400955 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:19.400999 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:19.412869 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:19.412928 (XEN) Apr 24 04:12:19.412969 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:19.413011 (XEN) HPFAR_EL2: 0000008010805100 Apr 24 04:12:19.413054 (XEN) FAR_EL2: ffff80000ad10100 Apr 24 04:12:19.424863 (XEN) Apr 24 04:12:19.424917 (XEN) Xen stack trace from sp=0000800ffde87e60: Apr 24 04:12:19.424964 (XEN) 0000800ffde87e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:19.436858 (XEN) 0000000000000047 0000000000000000 0000000000000000 0000000000010107 Apr 24 04:12:19.436921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.448881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.448944 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.460887 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.460950 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.472892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.484883 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.484945 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.496897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.496959 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.508898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.508962 (XEN) Xen call trace: Apr 24 04:12:19.520891 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:19.520998 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:19.532882 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:19.532945 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:19.532991 (XEN) Apr 24 04:12:19.533030 (XEN) *** Dumping CPU72 host state: *** Apr 24 04:12:19.544879 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:19.544942 (XEN) CPU: 72 Apr 24 04:12:19.544983 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:19.556905 (XEN) LR: 00000a0000276fcc Apr 24 04:12:19.556962 (XEN) SP: 0000800ffde1fe60 Apr 24 04:12:19.557006 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:19.568896 (XEN) X0: 0000000000000000 X1: 0000760ffdb4a000 X2: 0000800ffde8a078 Apr 24 04:12:19.568961 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:19.580890 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0bd90 X8: 0000000000000012 Apr 24 04:12:19.592878 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:19.592942 (XEN) X12: 0000000000000001 X13: 00000000000003f7 X14: 00000000000003f7 Apr 24 04:12:19.604862 (XEN) X15: 00003d0900000000 X16: 00000000000001eb X17: 0000000000000000 Apr 24 04:12:19.604926 (XEN) X18: 00000000000001eb X19: 00000a00003825d0 X20: 0000000000000048 Apr 24 04:12:19.616863 (XEN) X21: 00000a0000347880 X22: 0000000000000100 X23: 0000000000000048 Apr 24 04:12:19.616925 (XEN) X24: 0000000000000048 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:19.628869 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde1fe60 Apr 24 04:12:19.628932 (XEN) Apr 24 04:12:19.640873 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:19.640933 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:19.640978 (XEN) Apr 24 04:12:19.641016 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:19.641059 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:19.652930 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:19.652988 (XEN) Apr 24 04:12:19.653029 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:19.653072 (XEN) HPFAR_EL2: 0000008010805d00 Apr 24 04:12:19.653115 (XEN) FAR_EL2: ffff80000add0100 Apr 24 04:12:19.664927 (XEN) Apr 24 04:12:19.664980 (XEN) Xen stack trace from sp=0000800ffde1fe60: Apr 24 04:12:19.665026 (XEN) 0000800ffde1fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:19.676925 (XEN) 0000000000000048 0000000000000000 0000000000000000 0000000000010108 Apr 24 04:12:19.676989 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.688920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.688984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.700923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.700985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.712914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.724920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.724982 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.736930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.736993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.748923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.748986 (XEN) Xen call trace: Apr 24 04:12:19.760924 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:19.760990 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:19.772936 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:19.773039 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:19.773088 (XEN) Apr 24 04:12:19.784920 (XEN) *** Dumping CPU73 host state: *** Apr 24 04:12:19.784980 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:19.785031 (XEN) CPU: 73 Apr 24 04:12:19.785071 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:19.796903 (XEN) LR: 00000a0000276fcc Apr 24 04:12:19.796961 (XEN) SP: 0000800ffde0fe60 Apr 24 04:12:19.797005 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:19.808867 (XEN) X0: 0000000000000000 X1: 0000760ffdad6000 X2: 0000800ffde16078 Apr 24 04:12:19.820839 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:19.820905 (XEN) X6: 00000a00003825c8 X7: 0000800ffde89280 X8: 0000000000000012 Apr 24 04:12:19.832806 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:19.832806 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:19.844892 (XEN) X15: 0000000000000001 X16: 0000000000000002 X17: 0000000000000000 Apr 24 04:12:19.844960 (XEN) X18: 0000000000000002 X19: 00000a00003825d0 X20: 0000000000000049 Apr 24 04:12:19.856935 (XEN) X21: 00000a0000347900 X22: 0000000000000200 X23: 0000000000000049 Apr 24 04:12:19.856999 (XEN) X24: 0000000000000049 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:19.868927 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde0fe60 Apr 24 04:12:19.880899 (XEN) Apr 24 04:12:19.880953 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:19.880998 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:19.881041 (XEN) Apr 24 04:12:19.881079 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:19.881122 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:19.892870 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:19.892928 (XEN) Apr 24 04:12:19.892968 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:19.893010 (XEN) HPFAR_EL2: 0000009010800900 Apr 24 04:12:19.904852 (XEN) FAR_EL2: ffff80000b090100 Apr 24 04:12:19.904911 (XEN) Apr 24 04:12:19.904951 (XEN) Xen stack trace from sp=0000800ffde0fe60: Apr 24 04:12:19.904997 (XEN) 0000800ffde0fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:19.916855 (XEN) 0000000000000049 0000000000000000 0000000000000000 0000000000010109 Apr 24 04:12:19.916918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.928881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.928943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.940934 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.952936 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.953022 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.964822 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.964878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.976887 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.976950 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.988885 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:19.988947 (XEN) Xen call trace: Apr 24 04:12:20.000877 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:20.000944 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:20.012882 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:20.012945 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:20.012991 (XEN) Apr 24 04:12:20.013030 (XEN) *** Dumping CPU74 host state: *** Apr 24 04:12:20.024935 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:20.025001 (XEN) CPU: 74 Apr 24 04:12:20.025043 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:20.036931 (XEN) LR: 00000a0000276fcc Apr 24 04:12:20.036991 (XEN) SP: 0000800ffde07e60 Apr 24 04:12:20.037035 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:20.048858 (XEN) X0: 0000000000000000 X1: 0000760ffdad4000 X2: 0000800ffde14078 Apr 24 04:12:20.048922 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:20.060923 (XEN) X6: 00000a00003825c8 X7: 0000800ffde89740 X8: 0000000000000012 Apr 24 04:12:20.072910 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:20.072974 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:20.084910 (XEN) X15: ffff000030a1280c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:20.084975 (XEN) X18: ffff80000df2bc58 X19: 00000a00003825d0 X20: 000000000000004a Apr 24 04:12:20.096915 (XEN) X21: 00000a0000347980 X22: 0000000000000400 X23: 000000000000004a Apr 24 04:12:20.096979 (XEN) X24: 000000000000004a X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:20.108917 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde07e60 Apr 24 04:12:20.108980 (XEN) Apr 24 04:12:20.109021 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:20.120936 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:20.121007 (XEN) Apr 24 04:12:20.121070 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:20.121130 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:20.132867 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:20.132918 (XEN) Apr 24 04:12:20.132958 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:20.133000 (XEN) HPFAR_EL2: 0000009010801500 Apr 24 04:12:20.133042 (XEN) FAR_EL2: ffff80000b150100 Apr 24 04:12:20.144829 (XEN) Apr 24 04:12:20.144875 (XEN) Xen stack trace from sp=0000800ffde07e60: Apr 24 04:12:20.144922 (XEN) 0000800ffde07e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:20.156854 (XEN) 000000000000004a 0000000000000000 0000000000000000 000000000001010a Apr 24 04:12:20.156917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.168865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.168928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.180858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.180921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.192859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.204849 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.204911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.216924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.216988 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.228857 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.228916 (XEN) Xen call trace: Apr 24 04:12:20.240893 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:20.240973 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:20.252853 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:20.252909 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:20.252954 (XEN) Apr 24 04:12:20.264838 (XEN) *** Dumping CPU75 host state: *** Apr 24 04:12:20.264892 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:20.264941 (XEN) CPU: 75 Apr 24 04:12:20.264981 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:20.276919 (XEN) LR: 00000a0000276fcc Apr 24 04:12:20.276978 (XEN) SP: 0000800ffd99fe60 Apr 24 04:12:20.277022 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:20.288864 (XEN) X0: 0000000000000000 X1: 0000760ffdad0000 X2: 0000800ffde10078 Apr 24 04:12:20.288928 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:20.300860 (XEN) X6: 00000a00003825c8 X7: 0000800ffde89c00 X8: 0000000000000012 Apr 24 04:12:20.312850 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:20.312913 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:20.324851 (XEN) X15: ffff00003126070c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:20.324915 (XEN) X18: ffff800010053c58 X19: 00000a00003825d0 X20: 000000000000004b Apr 24 04:12:20.336857 (XEN) X21: 00000a0000347a00 X22: 0000000000000800 X23: 000000000000004b Apr 24 04:12:20.336922 (XEN) X24: 000000000000004b X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:20.348934 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd99fe60 Apr 24 04:12:20.349030 (XEN) Apr 24 04:12:20.360874 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:20.360933 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:20.360978 (XEN) Apr 24 04:12:20.361018 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:20.361060 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:20.372856 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:20.372915 (XEN) Apr 24 04:12:20.372954 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:20.372997 (XEN) HPFAR_EL2: 0000009010802100 Apr 24 04:12:20.373040 (XEN) FAR_EL2: ffff80000b210100 Apr 24 04:12:20.384862 (XEN) Apr 24 04:12:20.384915 (XEN) Xen stack trace from sp=0000800ffd99fe60: Apr 24 04:12:20.384963 (XEN) 0000800ffd99fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:20.396857 (XEN) 000000000000004b 0000000000000000 0000000000000000 000000000001010b Apr 24 04:12:20.396921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.408856 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.408918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.420859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.432898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.432993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.444839 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.444896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.456800 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.456853 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.468795 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.468849 (XEN) Xen call trace: Apr 24 04:12:20.480853 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:20.480919 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:20.492857 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:20.492921 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:20.504904 (XEN) Apr 24 04:12:20.504958 (XEN) *** Dumping CPU76 host state: *** Apr 24 04:12:20.505004 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:20.505053 (XEN) CPU: 76 Apr 24 04:12:20.505094 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:20.516889 (XEN) LR: 00000a0000276fcc Apr 24 04:12:20.516928 (XEN) SP: 0000800ffd98fe60 Apr 24 04:12:20.516960 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:20.528908 (XEN) X0: 0000000000000000 X1: 0000760ffd656000 X2: 0000800ffd996078 Apr 24 04:12:20.540863 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:20.540919 (XEN) X6: 00000a00003825c8 X7: 0000800ffd994150 X8: 0000000000000012 Apr 24 04:12:20.552861 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:20.552915 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:20.564908 (XEN) X15: ffff0000305fb10c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:20.564972 (XEN) X18: ffff80000d3dbc58 X19: 00000a00003825d0 X20: 000000000000004c Apr 24 04:12:20.576918 (XEN) X21: 00000a0000347a80 X22: 0000000000001000 X23: 000000000000004c Apr 24 04:12:20.576981 (XEN) X24: 000000000000004c X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:20.588925 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd98fe60 Apr 24 04:12:20.600900 (XEN) Apr 24 04:12:20.600954 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:20.601011 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:20.601071 (XEN) Apr 24 04:12:20.601119 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:20.601187 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:20.612870 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:20.612952 (XEN) Apr 24 04:12:20.613010 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:20.613056 (XEN) HPFAR_EL2: 0000009010802d00 Apr 24 04:12:20.624840 (XEN) FAR_EL2: ffff80000b2d0100 Apr 24 04:12:20.624892 (XEN) Apr 24 04:12:20.624931 (XEN) Xen stack trace from sp=0000800ffd98fe60: Apr 24 04:12:20.624977 (XEN) 0000800ffd98fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:20.636817 (XEN) 000000000000004c 0000000000000000 0000000000000000 000000000001010c Apr 24 04:12:20.636879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.648818 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.648874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.660929 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.672920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.672983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.684913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.684976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.696888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.696951 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.708874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.720831 (XEN) Xen call trace: Apr 24 04:12:20.720882 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:20.720935 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:20.732859 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:20.732920 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:20.744856 (XEN) Apr 24 04:12:20.744909 (XEN) *** Dumping CPU77 host state: *** Apr 24 04:12:20.744956 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:20.745004 (XEN) CPU: 77 Apr 24 04:12:20.756851 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:20.756923 (XEN) LR: 00000a0000276fcc Apr 24 04:12:20.756967 (XEN) SP: 0000800ffd987e60 Apr 24 04:12:20.768909 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:20.768974 (XEN) X0: 0000000000000000 X1: 0000760ffd652000 X2: 0000800ffd992078 Apr 24 04:12:20.780913 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:20.781019 (XEN) X6: 00000a00003825c8 X7: 0000800ffd994590 X8: 0000000000000012 Apr 24 04:12:20.792934 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:20.793009 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:20.804859 (XEN) X15: ffff00002728ea0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:20.804941 (XEN) X18: ffff80000cf13c58 X19: 00000a00003825d0 X20: 000000000000004d Apr 24 04:12:20.816836 (XEN) X21: 00000a0000347b00 X22: 0000000000002000 X23: 000000000000004d Apr 24 04:12:20.828851 (XEN) X24: 000000000000004d X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:20.828916 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd987e60 Apr 24 04:12:20.840857 (XEN) Apr 24 04:12:20.840913 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:20.840958 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:20.841001 (XEN) Apr 24 04:12:20.841039 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:20.852850 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:20.852908 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:20.852953 (XEN) Apr 24 04:12:20.852992 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:20.853034 (XEN) HPFAR_EL2: 0000009010803900 Apr 24 04:12:20.864856 (XEN) FAR_EL2: ffff80000b390100 Apr 24 04:12:20.864914 (XEN) Apr 24 04:12:20.864954 (XEN) Xen stack trace from sp=0000800ffd987e60: Apr 24 04:12:20.865001 (XEN) 0000800ffd987e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:20.876860 (XEN) 000000000000004d 0000000000000000 0000000000000000 000000000001010d Apr 24 04:12:20.876929 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.888896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.900849 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.900912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.912849 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.912912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.924858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.924921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.936854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.936924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.948925 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:20.960916 (XEN) Xen call trace: Apr 24 04:12:20.960973 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:20.961025 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:20.972877 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:20.972940 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:20.984803 (XEN) Apr 24 04:12:20.984848 (XEN) *** Dumping CPU78 host state: *** Apr 24 04:12:20.984893 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:20.984942 (XEN) CPU: 78 Apr 24 04:12:20.996803 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:20.996858 (XEN) LR: 00000a0000276fcc Apr 24 04:12:20.996906 (XEN) SP: 0000800ffd937e60 Apr 24 04:12:21.008849 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:21.008914 (XEN) X0: 0000000000000000 X1: 0000760ffd5fe000 X2: 0000800ffd93e078 Apr 24 04:12:21.020859 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:21.020922 (XEN) X6: 00000a00003825c8 X7: 0000800ffd994a50 X8: 0000000000000012 Apr 24 04:12:21.032855 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:21.032959 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:21.044941 (XEN) X15: 0000000000000002 X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:21.045025 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000004e Apr 24 04:12:21.056871 (XEN) X21: 00000a0000347b80 X22: 0000000000004000 X23: 000000000000004e Apr 24 04:12:21.068885 (XEN) X24: 000000000000004e X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:21.068955 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd937e60 Apr 24 04:12:21.080839 (XEN) Apr 24 04:12:21.080912 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:21.080987 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:21.081051 (XEN) Apr 24 04:12:21.081105 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:21.092747 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:21.092776 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:21.092800 (XEN) Apr 24 04:12:21.092822 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:21.092845 (XEN) HPFAR_EL2: 0000009010804500 Apr 24 04:12:21.104833 (XEN) FAR_EL2: ffff80000b450100 Apr 24 04:12:21.104884 (XEN) Apr 24 04:12:21.104923 (XEN) Xen stack trace from sp=0000800ffd937e60: Apr 24 04:12:21.104969 (XEN) 0000800ffd937e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:21.116855 (XEN) 000000000000004e 0000000000000000 0000000000000000 000000000001010e Apr 24 04:12:21.116917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.128859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.140841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.140896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.152878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.152933 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.164932 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.164994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.176927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.188886 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.188949 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.200854 (XEN) Xen call trace: Apr 24 04:12:21.200911 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:21.200964 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:21.212909 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:21.212972 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:21.224852 (XEN) Apr 24 04:12:21.224908 (XEN) *** Dumping CPU79 host state: *** Apr 24 04:12:21.224954 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:21.236891 (XEN) CPU: 79 Apr 24 04:12:21.236953 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:21.237005 (XEN) LR: 00000a0000276fcc Apr 24 04:12:21.237048 (XEN) SP: 0000800ffd92fe60 Apr 24 04:12:21.248886 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:21.248952 (XEN) X0: 0000000000000000 X1: 0000760ffd5fc000 X2: 0000800ffd93c078 Apr 24 04:12:21.260910 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:21.260974 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93a010 X8: 0000000000000012 Apr 24 04:12:21.272875 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:21.272938 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:21.284916 (XEN) X15: 0000000056450bc5 X16: 0000000025d3e0bd X17: ffff800009f15538 Apr 24 04:12:21.296953 (XEN) X18: ffff80001df23c38 X19: 00000a00003825d0 X20: 000000000000004f Apr 24 04:12:21.297018 (XEN) X21: 00000a0000347c00 X22: 0000000000008000 X23: 000000000000004f Apr 24 04:12:21.308907 (XEN) X24: 000000000000004f X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:21.308970 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd92fe60 Apr 24 04:12:21.320887 (XEN) Apr 24 04:12:21.320941 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:21.320986 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:21.321035 (XEN) Apr 24 04:12:21.321074 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:21.332867 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:21.332925 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:21.332970 (XEN) Apr 24 04:12:21.333009 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:21.344819 (XEN) HPFAR_EL2: 0000009010805300 Apr 24 04:12:21.344869 (XEN) FAR_EL2: ffff80000b530100 Apr 24 04:12:21.344913 (XEN) Apr 24 04:12:21.344951 (XEN) Xen stack trace from sp=0000800ffd92fe60: Apr 24 04:12:21.344997 (XEN) 0000800ffd92fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:21.356824 (XEN) 000000000000004f 0000000000000000 0000000000000000 000000000001010f Apr 24 04:12:21.368852 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.368911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.380876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.380931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.392828 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.392882 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.404841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.416735 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.416764 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.428832 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.428887 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.440875 (XEN) Xen call trace: Apr 24 04:12:21.440932 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:21.440985 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:21.452915 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:21.452977 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:21.464914 (XEN) Apr 24 04:12:21.464967 (XEN) *** Dumping CPU80 host state: *** Apr 24 04:12:21.465013 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:21.476915 (XEN) CPU: 80 Apr 24 04:12:21.476971 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:21.477023 (XEN) LR: 00000a0000276fcc Apr 24 04:12:21.488909 (XEN) SP: 0000800ffd8bfe60 Apr 24 04:12:21.488967 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:21.489018 (XEN) X0: 0000000000000000 X1: 0000760ffd5f8000 X2: 0000800ffd938078 Apr 24 04:12:21.500917 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:21.500980 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93a410 X8: 0000000000000012 Apr 24 04:12:21.512913 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:21.512976 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:21.524877 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:21.536888 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000050 Apr 24 04:12:21.536959 (XEN) X21: 00000a0000347c80 X22: 0000000000010000 X23: 0000000000000050 Apr 24 04:12:21.548914 (XEN) X24: 0000000000000050 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:21.548978 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8bfe60 Apr 24 04:12:21.560860 (XEN) Apr 24 04:12:21.560913 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:21.560958 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:21.561001 (XEN) Apr 24 04:12:21.561039 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:21.572852 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:21.572910 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:21.572955 (XEN) Apr 24 04:12:21.572994 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:21.584850 (XEN) HPFAR_EL2: 0000009010805f00 Apr 24 04:12:21.584908 (XEN) FAR_EL2: ffff80000b5f0100 Apr 24 04:12:21.584953 (XEN) Apr 24 04:12:21.584992 (XEN) Xen stack trace from sp=0000800ffd8bfe60: Apr 24 04:12:21.596909 (XEN) 0000800ffd8bfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:21.596981 (XEN) 0000000000000050 0000000000000000 0000000000000000 0000000000010200 Apr 24 04:12:21.608908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.608971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.620878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.620941 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.632873 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.632935 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.644825 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.656904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.656973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.668911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.668973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.680902 (XEN) Xen call trace: Apr 24 04:12:21.680959 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:21.692907 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:21.692973 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:21.704921 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:21.704980 (XEN) Apr 24 04:12:21.705021 (XEN) *** Dumping CPU81 host state: *** Apr 24 04:12:21.705066 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:21.716918 (XEN) CPU: 81 Apr 24 04:12:21.716980 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:21.717031 (XEN) LR: 00000a0000276fcc Apr 24 04:12:21.728848 (XEN) SP: 0000800ffd8b7e60 Apr 24 04:12:21.728900 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:21.728957 (XEN) X0: 0000000000000000 X1: 0000760ffd5e4000 X2: 0000800ffd924078 Apr 24 04:12:21.740855 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:21.740910 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93a8d0 X8: 0000000000000012 Apr 24 04:12:21.752866 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:21.764854 (XEN) X12: 0000000000000001 X13: 000000000000004d X14: 000000000000004d Apr 24 04:12:21.764908 (XEN) X15: 00003d0900000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:21.776866 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000051 Apr 24 04:12:21.776922 (XEN) X21: 00000a0000347d00 X22: 0000000000020000 X23: 0000000000000051 Apr 24 04:12:21.788907 (XEN) X24: 0000000000000051 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:21.788970 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8b7e60 Apr 24 04:12:21.800953 (XEN) Apr 24 04:12:21.801007 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:21.801052 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:21.801094 (XEN) Apr 24 04:12:21.812906 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:21.812965 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:21.813010 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:21.813053 (XEN) Apr 24 04:12:21.813092 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:21.824917 (XEN) HPFAR_EL2: 0000008010800b00 Apr 24 04:12:21.824977 (XEN) FAR_EL2: ffff80000a8b0100 Apr 24 04:12:21.825022 (XEN) Apr 24 04:12:21.825060 (XEN) Xen stack trace from sp=0000800ffd8b7e60: Apr 24 04:12:21.836906 (XEN) 0000800ffd8b7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:21.836978 (XEN) 0000000000000051 0000000000000000 0000000000000000 0000000000010201 Apr 24 04:12:21.848897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.848959 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.860915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.860977 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.872917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.884910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.884973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.896919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.896988 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.908924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.908987 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:21.920914 (XEN) Xen call trace: Apr 24 04:12:21.920971 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:21.932911 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:21.932977 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:21.944906 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:21.944966 (XEN) Apr 24 04:12:21.945006 (XEN) *** Dumping CPU82 host state: *** Apr 24 04:12:21.945051 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:21.956911 (XEN) CPU: 82 Apr 24 04:12:21.956973 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:21.957025 (XEN) LR: 00000a0000276fcc Apr 24 04:12:21.968908 (XEN) SP: 0000800ffd8afe60 Apr 24 04:12:21.968966 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:21.969018 (XEN) X0: 0000000000000000 X1: 0000760ffd5e2000 X2: 0000800ffd922078 Apr 24 04:12:21.980918 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:21.992914 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93ad90 X8: 0000000000000012 Apr 24 04:12:21.992979 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:22.004854 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:22.004917 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 656e3d4d45545359 Apr 24 04:12:22.016901 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000052 Apr 24 04:12:22.016971 (XEN) X21: 00000a0000347d80 X22: 0000000000040000 X23: 0000000000000052 Apr 24 04:12:22.028926 (XEN) X24: 0000000000000052 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:22.028989 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8afe60 Apr 24 04:12:22.040918 (XEN) Apr 24 04:12:22.040972 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:22.041016 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:22.052950 (XEN) Apr 24 04:12:22.053005 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:22.053050 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:22.053093 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:22.053136 (XEN) Apr 24 04:12:22.053174 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:22.064919 (XEN) HPFAR_EL2: 0000008010801700 Apr 24 04:12:22.064978 (XEN) FAR_EL2: ffff80000a970100 Apr 24 04:12:22.065022 (XEN) Apr 24 04:12:22.065062 (XEN) Xen stack trace from sp=0000800ffd8afe60: Apr 24 04:12:22.076907 (XEN) 0000800ffd8afe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:22.076978 (XEN) 0000000000000052 0000000000000000 0000000000000000 0000000000010202 Apr 24 04:12:22.088907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.088969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.100880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.100943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.112928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.124907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.124970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.136911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.136979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.148924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.148991 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.160913 (XEN) Xen call trace: Apr 24 04:12:22.160970 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:22.172850 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:22.172886 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:22.184925 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:22.184964 (XEN) Apr 24 04:12:22.184996 (XEN) *** Dumping CPU83 host state: *** Apr 24 04:12:22.185032 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:22.196915 (XEN) CPU: 83 Apr 24 04:12:22.196978 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:22.208905 (XEN) LR: 00000a0000276fcc Apr 24 04:12:22.208964 (XEN) SP: 0000800ffd83fe60 Apr 24 04:12:22.209009 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:22.209058 (XEN) X0: 0000000000000000 X1: 0000760ffd566000 X2: 0000800ffd8a6078 Apr 24 04:12:22.220920 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:22.232926 (XEN) X6: 00000a00003825c8 X7: 0000800ffd920280 X8: 0000000000000012 Apr 24 04:12:22.267130 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:22.267282 (XEN) X12: 0000000000000001 X13: 00000000000003ed X14: 00000000000003ed Apr 24 04:12:22.267336 (XEN) X15: ffff00002f75b30c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:22.267386 (XEN) X18: ffff80000cc7bc58 X19: 00000a00003825d0 X20: 0000000000000053 Apr 24 04:12:22.267435 (XEN) X21: 00000a0000347e00 X22: 0000000000080000 X23: 0000000000000053 Apr 24 04:12:22.268902 (XEN) X24: 0000000000000053 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:22.268965 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd83fe60 Apr 24 04:12:22.280928 (XEN) Apr 24 04:12:22.280981 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:22.281025 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:22.292914 (XEN) Apr 24 04:12:22.292967 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:22.293013 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:22.293056 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:22.293127 (XEN) Apr 24 04:12:22.304946 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:22.305007 (XEN) HPFAR_EL2: 0000008010000200 Apr 24 04:12:22.305051 (XEN) FAR_EL2: ffff80000a380090 Apr 24 04:12:22.305094 (XEN) Apr 24 04:12:22.305132 (XEN) Xen stack trace from sp=0000800ffd83fe60: Apr 24 04:12:22.316911 (XEN) 0000800ffd83fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:22.316982 (XEN) 0000000000000053 0000000000000000 0000000000000000 0000000000010203 Apr 24 04:12:22.328915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.328978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.340918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.352906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.352969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.364904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.364967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.376924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.376995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.388911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.388974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.400911 (XEN) Xen call trace: Apr 24 04:12:22.400968 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:22.412884 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:22.412942 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:22.424865 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:22.424917 (XEN) Apr 24 04:12:22.424957 (XEN) *** Dumping CPU84 host state: *** Apr 24 04:12:22.425001 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:22.436866 (XEN) CPU: 84 Apr 24 04:12:22.436913 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:22.448844 (XEN) LR: 00000a0000276fcc Apr 24 04:12:22.448891 (XEN) SP: 0000800ffd837e60 Apr 24 04:12:22.448934 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:22.460837 (XEN) X0: 0000000000000000 X1: 0000760ffd562000 X2: 0000800ffd8a2078 Apr 24 04:12:22.460893 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:22.472843 (XEN) X6: 00000a00003825c8 X7: 0000800ffd920740 X8: 0000000000000012 Apr 24 04:12:22.472898 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 04:12:22.484846 (XEN) X12: 0000000000000001 X13: 000000000000010c X14: 000000000000010c Apr 24 04:12:22.484900 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 656e3d4d45545359 Apr 24 04:12:22.496905 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000054 Apr 24 04:12:22.496973 (XEN) X21: 00000a0000347e80 X22: 0000000000100000 X23: 0000000000000054 Apr 24 04:12:22.508891 (XEN) X24: 0000000000000054 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:22.520946 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd837e60 Apr 24 04:12:22.521049 (XEN) Apr 24 04:12:22.521109 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:22.521174 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:22.532907 (XEN) Apr 24 04:12:22.532961 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:22.533005 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:22.533048 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:22.544879 (XEN) Apr 24 04:12:22.544932 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:22.544978 (XEN) HPFAR_EL2: 0000008010000200 Apr 24 04:12:22.545021 (XEN) FAR_EL2: ffff80000a380090 Apr 24 04:12:22.545119 (XEN) Apr 24 04:12:22.545162 (XEN) Xen stack trace from sp=0000800ffd837e60: Apr 24 04:12:22.556893 (XEN) 0000800ffd837e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:22.556958 (XEN) 0000000000000054 0000000000000000 0000000000000000 0000000000010204 Apr 24 04:12:22.568910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.568973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.580896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.592895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.592958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.604889 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.604952 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.616899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.616961 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.628905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.640896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.640959 (XEN) Xen call trace: Apr 24 04:12:22.641003 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:22.652835 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:22.652871 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:22.664901 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:22.664960 (XEN) Apr 24 04:12:22.665000 (XEN) *** Dumping CPU85 host state: *** Apr 24 04:12:22.676889 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:22.676953 (XEN) CPU: 85 Apr 24 04:12:22.677002 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:22.688888 (XEN) LR: 00000a0000276fcc Apr 24 04:12:22.688946 (XEN) SP: 0000800ffd827e60 Apr 24 04:12:22.688991 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:22.700891 (XEN) X0: 0000000000000000 X1: 0000760ffd560000 X2: 0000800ffd8a0078 Apr 24 04:12:22.700951 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:22.712912 (XEN) X6: 00000a00003825c8 X7: 0000800ffd920c00 X8: 0000000000000012 Apr 24 04:12:22.712976 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:22.724899 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:22.724962 (XEN) X15: ffff000027b8650c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:22.736887 (XEN) X18: ffff80000de8bc58 X19: 00000a00003825d0 X20: 0000000000000055 Apr 24 04:12:22.748876 (XEN) X21: 00000a0000347f00 X22: 0000000000200000 X23: 0000000000000055 Apr 24 04:12:22.748941 (XEN) X24: 0000000000000055 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:22.760832 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd827e60 Apr 24 04:12:22.760887 (XEN) Apr 24 04:12:22.760927 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:22.772847 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:22.772898 (XEN) Apr 24 04:12:22.772937 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:22.772980 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:22.773023 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:22.784835 (XEN) Apr 24 04:12:22.784880 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:22.784923 (XEN) HPFAR_EL2: 0000008010803b00 Apr 24 04:12:22.784966 (XEN) FAR_EL2: ffff80000abb0100 Apr 24 04:12:22.785008 (XEN) Apr 24 04:12:22.796834 (XEN) Xen stack trace from sp=0000800ffd827e60: Apr 24 04:12:22.796885 (XEN) 0000800ffd827e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:22.796975 (XEN) 0000000000000055 0000000000000000 0000000000000000 0000000000010205 Apr 24 04:12:22.808848 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.820843 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.820898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.832900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.832962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.844935 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.844998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.856887 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.868880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.868944 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.880898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:22.880961 (XEN) Xen call trace: Apr 24 04:12:22.881004 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:22.892909 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:22.892973 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:22.904893 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:22.904953 (XEN) Apr 24 04:12:22.904993 (XEN) *** Dumping CPU86 host state: *** Apr 24 04:12:22.916881 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:22.916945 (XEN) CPU: 86 Apr 24 04:12:22.916992 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:22.928896 (XEN) LR: 00000a0000276fcc Apr 24 04:12:22.928954 (XEN) SP: 0000800ffb7bfe60 Apr 24 04:12:22.928998 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:22.940892 (XEN) X0: 0000000000000000 X1: 0000760ffd4ec000 X2: 0000800ffd82c078 Apr 24 04:12:22.940957 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:22.952902 (XEN) X6: 00000a00003825c8 X7: 0000800ffd82b150 X8: 0000000000000012 Apr 24 04:12:22.952966 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:22.964897 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:22.964960 (XEN) X15: ffff000033cfc70c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:22.976902 (XEN) X18: ffff80000c743c58 X19: 00000a00003825d0 X20: 0000000000000056 Apr 24 04:12:22.988864 (XEN) X21: 00000a0000347f80 X22: 0000000000400000 X23: 0000000000000056 Apr 24 04:12:22.988898 (XEN) X24: 0000000000000056 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:23.000851 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb7bfe60 Apr 24 04:12:23.000908 (XEN) Apr 24 04:12:23.000949 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:23.012854 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:23.012905 (XEN) Apr 24 04:12:23.012944 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:23.012987 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:23.013029 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:23.024869 (XEN) Apr 24 04:12:23.024917 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:23.024960 (XEN) HPFAR_EL2: 0000008010804700 Apr 24 04:12:23.025003 (XEN) FAR_EL2: ffff80000ac70100 Apr 24 04:12:23.036886 (XEN) Apr 24 04:12:23.036940 (XEN) Xen stack trace from sp=0000800ffb7bfe60: Apr 24 04:12:23.036988 (XEN) 0000800ffb7bfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:23.048884 (XEN) 0000000000000056 0000000000000000 0000000000000000 0000000000010206 Apr 24 04:12:23.048949 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.060921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.060985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.072805 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.072857 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.084792 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.084826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.096797 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.108778 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.108809 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.120793 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.120828 (XEN) Xen call trace: Apr 24 04:12:23.120852 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:23.132802 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:23.144791 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:23.144826 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:23.144851 (XEN) Apr 24 04:12:23.144872 (XEN) *** Dumping CPU87 host state: *** Apr 24 04:12:23.156794 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:23.156830 (XEN) CPU: 87 Apr 24 04:12:23.156853 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:23.168800 (XEN) LR: 00000a0000276fcc Apr 24 04:12:23.168832 (XEN) SP: 0000800ffb7b7e60 Apr 24 04:12:23.168856 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:23.180797 (XEN) X0: 0000000000000000 X1: 0000760ffd4e8000 X2: 0000800ffd828078 Apr 24 04:12:23.180832 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:23.192779 (XEN) X6: 00000a00003825c8 X7: 0000800ffd82b590 X8: 0000000000000012 Apr 24 04:12:23.192810 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:23.204778 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:23.216770 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:23.216801 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000057 Apr 24 04:12:23.228775 (XEN) X21: 00000a0000348000 X22: 0000000000800000 X23: 0000000000000057 Apr 24 04:12:23.228805 (XEN) X24: 0000000000000057 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:23.240800 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb7b7e60 Apr 24 04:12:23.240836 (XEN) Apr 24 04:12:23.240859 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:23.252793 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:23.252826 (XEN) Apr 24 04:12:23.252848 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:23.252872 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:23.252896 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:23.264800 (XEN) Apr 24 04:12:23.264831 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:23.264855 (XEN) HPFAR_EL2: 0000008010805300 Apr 24 04:12:23.264879 (XEN) FAR_EL2: ffff80000ad30100 Apr 24 04:12:23.276797 (XEN) Apr 24 04:12:23.276828 (XEN) Xen stack trace from sp=0000800ffb7b7e60: Apr 24 04:12:23.276854 (XEN) 0000800ffb7b7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:23.288800 (XEN) 0000000000000057 0000000000000000 0000000000000000 0000000000010207 Apr 24 04:12:23.288837 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.300907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.300973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.315260 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.315317 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.324825 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.336840 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.336874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.348841 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.348876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.360877 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.372823 (XEN) Xen call trace: Apr 24 04:12:23.372853 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:23.372881 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:23.384853 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:23.384889 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:23.396821 (XEN) Apr 24 04:12:23.396853 (XEN) *** Dumping CPU88 host state: *** Apr 24 04:12:23.396878 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:23.396905 (XEN) CPU: 88 Apr 24 04:12:23.408836 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:23.408873 (XEN) LR: 00000a0000276fcc Apr 24 04:12:23.408897 (XEN) SP: 0000800ffb7a7e60 Apr 24 04:12:23.420834 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:23.420870 (XEN) X0: 0000000000000000 X1: 0000760ffb46e000 X2: 0000800ffb7ae078 Apr 24 04:12:23.432839 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:23.432875 (XEN) X6: 00000a00003825c8 X7: 0000800ffd82ba50 X8: 0000000000000012 Apr 24 04:12:23.444838 (XEN) X9: 0000000000000080 X10: 0000000000000000 X11: 00000000000000b7 Apr 24 04:12:23.444873 (XEN) X12: 0000000000000000 X13: 0000000000000305 X14: 00000000000003e1 Apr 24 04:12:23.456835 (XEN) X15: 0000fffffbf0f370 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:23.456870 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000058 Apr 24 04:12:23.468821 (XEN) X21: 00000a0000348080 X22: 0000000001000000 X23: 0000000000000058 Apr 24 04:12:23.468856 (XEN) X24: 0000000000000058 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:23.480845 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb7a7e60 Apr 24 04:12:23.492837 (XEN) Apr 24 04:12:23.492867 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:23.492892 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:23.492916 (XEN) Apr 24 04:12:23.492936 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:23.492960 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:23.504843 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:23.504875 (XEN) Apr 24 04:12:23.504897 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:23.504921 (XEN) HPFAR_EL2: 0000008010805f00 Apr 24 04:12:23.516836 (XEN) FAR_EL2: ffff80000adf0100 Apr 24 04:12:23.516869 (XEN) Apr 24 04:12:23.516891 (XEN) Xen stack trace from sp=0000800ffb7a7e60: Apr 24 04:12:23.516916 (XEN) 0000800ffb7a7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:23.528848 (XEN) 0000000000000058 0000000000000000 0000000000000000 0000000000010208 Apr 24 04:12:23.528882 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.540810 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.552803 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.552838 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.564804 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.564868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.576802 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.576836 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.588816 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.588847 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.600843 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.612840 (XEN) Xen call trace: Apr 24 04:12:23.612871 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:23.612900 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:23.624844 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:23.624879 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:23.636835 (XEN) Apr 24 04:12:23.636864 (XEN) *** Dumping CPU89 host state: *** Apr 24 04:12:23.636890 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:23.636917 (XEN) CPU: 89 Apr 24 04:12:23.648807 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:23.648842 (XEN) LR: 00000a0000276fcc Apr 24 04:12:23.648866 (XEN) SP: 0000800ffb73fe60 Apr 24 04:12:23.660812 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:23.660848 (XEN) X0: 0000000000000000 X1: 0000760ffb46a000 X2: 0000800ffb7aa078 Apr 24 04:12:23.672799 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:23.672834 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a9010 X8: 0000000000000012 Apr 24 04:12:23.684789 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:23.684824 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:23.696790 (XEN) X15: ffff000028e2fe0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:23.696825 (XEN) X18: ffff80000df5bc58 X19: 00000a00003825d0 X20: 0000000000000059 Apr 24 04:12:23.708868 (XEN) X21: 00000a0000348100 X22: 0000000002000000 X23: 0000000000000059 Apr 24 04:12:23.720854 (XEN) X24: 0000000000000059 X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:23.720918 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb73fe60 Apr 24 04:12:23.732857 (XEN) Apr 24 04:12:23.732910 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:23.732954 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:23.732997 (XEN) Apr 24 04:12:23.733034 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:23.744873 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:23.744905 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:23.744952 (XEN) Apr 24 04:12:23.744990 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:23.745032 (XEN) HPFAR_EL2: 0000009010800b00 Apr 24 04:12:23.756920 (XEN) FAR_EL2: ffff80000b0b0100 Apr 24 04:12:23.756978 (XEN) Apr 24 04:12:23.757018 (XEN) Xen stack trace from sp=0000800ffb73fe60: Apr 24 04:12:23.757071 (XEN) 0000800ffb73fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:23.768924 (XEN) 0000000000000059 0000000000000000 0000000000000000 0000000000010209 Apr 24 04:12:23.768987 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.780942 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.792916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.792979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.804874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.804908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.816925 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.817028 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.828903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.840891 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.840954 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:23.852884 (XEN) Xen call trace: Apr 24 04:12:23.852940 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:23.852993 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:23.864814 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:23.864848 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:23.876846 (XEN) Apr 24 04:12:23.876900 (XEN) *** Dumping CPU90 host state: *** Apr 24 04:12:23.876945 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:23.888866 (XEN) CPU: 90 Apr 24 04:12:23.888921 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:23.888973 (XEN) LR: 00000a0000276fcc Apr 24 04:12:23.889016 (XEN) SP: 0000800ffb72fe60 Apr 24 04:12:23.900886 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:23.900951 (XEN) X0: 0000000000000000 X1: 0000760ffb3f6000 X2: 0000800ffb736078 Apr 24 04:12:23.912890 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:23.912953 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a9410 X8: 0000000000000012 Apr 24 04:12:23.924813 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:23.924847 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:23.936930 (XEN) X15: ffff000028e2fa0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 04:12:23.948924 (XEN) X18: ffff80000d8d3c58 X19: 00000a00003825d0 X20: 000000000000005a Apr 24 04:12:23.948989 (XEN) X21: 00000a0000348180 X22: 0000000004000000 X23: 000000000000005a Apr 24 04:12:23.960916 (XEN) X24: 000000000000005a X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:23.960979 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb72fe60 Apr 24 04:12:23.972925 (XEN) Apr 24 04:12:23.972979 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:23.973024 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:23.973066 (XEN) Apr 24 04:12:23.973104 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:23.984870 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:23.984902 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:23.984927 (XEN) Apr 24 04:12:23.984948 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:23.984972 (XEN) HPFAR_EL2: 0000009010801700 Apr 24 04:12:23.996925 (XEN) FAR_EL2: ffff80000b170100 Apr 24 04:12:23.996983 (XEN) Apr 24 04:12:23.997023 (XEN) Xen stack trace from sp=0000800ffb72fe60: Apr 24 04:12:23.997074 (XEN) 0000800ffb72fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:24.008924 (XEN) 000000000000005a 0000000000000000 0000000000000000 000000000001020a Apr 24 04:12:24.020881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.020943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.032914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.032976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.044879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.044914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.056920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.056983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.068966 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.080926 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.080989 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.092929 (XEN) Xen call trace: Apr 24 04:12:24.092986 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:24.093039 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:24.104897 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:24.104933 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:24.116928 (XEN) Apr 24 04:12:24.116983 (XEN) *** Dumping CPU91 host state: *** Apr 24 04:12:24.117028 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:24.128928 (XEN) CPU: 91 Apr 24 04:12:24.128984 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:24.129035 (XEN) LR: 00000a0000276fcc Apr 24 04:12:24.129078 (XEN) SP: 0000800ffb727e60 Apr 24 04:12:24.140928 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:24.140993 (XEN) X0: 0000000000000000 X1: 0000760ffb3f4000 X2: 0000800ffb734078 Apr 24 04:12:24.152932 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:24.152995 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a98d0 X8: 0000000000000012 Apr 24 04:12:24.164865 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:24.164865 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:24.176966 (XEN) X15: 0000000000000003 X16: 000000000000021e X17: 0000000000000000 Apr 24 04:12:24.188920 (XEN) X18: 000000000000021e X19: 00000a00003825d0 X20: 000000000000005b Apr 24 04:12:24.188984 (XEN) X21: 00000a0000348200 X22: 0000000008000000 X23: 000000000000005b Apr 24 04:12:24.200930 (XEN) X24: 000000000000005b X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:24.200994 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb727e60 Apr 24 04:12:24.212924 (XEN) Apr 24 04:12:24.212977 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:24.213022 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:24.213065 (XEN) Apr 24 04:12:24.213103 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:24.224936 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:24.224968 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:24.224993 (XEN) Apr 24 04:12:24.225014 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:24.236960 (XEN) HPFAR_EL2: 0000009010802300 Apr 24 04:12:24.237018 (XEN) FAR_EL2: ffff80000b230100 Apr 24 04:12:24.237069 (XEN) Apr 24 04:12:24.237109 (XEN) Xen stack trace from sp=0000800ffb727e60: Apr 24 04:12:24.237154 (XEN) 0000800ffb727e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:24.248948 (XEN) 000000000000005b 0000000000000000 0000000000000000 000000000001020b Apr 24 04:12:24.260923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.260985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.272920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.272983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.284870 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.284936 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.296910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.308854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.308910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.320862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.320958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.332854 (XEN) Xen call trace: Apr 24 04:12:24.332903 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:24.344853 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:24.344920 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:24.356890 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:24.356952 (XEN) Apr 24 04:12:24.356992 (XEN) *** Dumping CPU92 host state: *** Apr 24 04:12:24.357037 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:24.368925 (XEN) CPU: 92 Apr 24 04:12:24.368980 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:24.369032 (XEN) LR: 00000a0000276fcc Apr 24 04:12:24.380933 (XEN) SP: 0000800ffb6bfe60 Apr 24 04:12:24.380990 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:24.381042 (XEN) X0: 0000000000000000 X1: 0000760ffb3f0000 X2: 0000800ffb730078 Apr 24 04:12:24.392931 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:24.392994 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a9d90 X8: 0000000000000012 Apr 24 04:12:24.404941 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:24.416925 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:24.416988 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:24.428919 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005c Apr 24 04:12:24.428983 (XEN) X21: 00000a0000348280 X22: 0000000010000000 X23: 000000000000005c Apr 24 04:12:24.440928 (XEN) X24: 000000000000005c X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:24.440992 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb6bfe60 Apr 24 04:12:24.452928 (XEN) Apr 24 04:12:24.452981 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:24.453027 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:24.453070 (XEN) Apr 24 04:12:24.464915 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:24.464975 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:24.465000 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:24.465023 (XEN) Apr 24 04:12:24.465044 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:24.476924 (XEN) HPFAR_EL2: 0000009010802f00 Apr 24 04:12:24.476982 (XEN) FAR_EL2: ffff80000b2f0100 Apr 24 04:12:24.477027 (XEN) Apr 24 04:12:24.477065 (XEN) Xen stack trace from sp=0000800ffb6bfe60: Apr 24 04:12:24.488927 (XEN) 0000800ffb6bfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:24.488992 (XEN) 000000000000005c 0000000000000000 0000000000000000 000000000001020c Apr 24 04:12:24.500893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.500956 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.512916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.512978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.524931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.536913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.536977 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.548921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.548983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.560921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.560984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.572926 (XEN) Xen call trace: Apr 24 04:12:24.572983 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:24.584956 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:24.585028 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:24.596921 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:24.596981 (XEN) Apr 24 04:12:24.597021 (XEN) *** Dumping CPU93 host state: *** Apr 24 04:12:24.597066 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:24.608933 (XEN) CPU: 93 Apr 24 04:12:24.608988 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:24.609038 (XEN) LR: 00000a0000276fcc Apr 24 04:12:24.620855 (XEN) SP: 0000800ffb6afe60 Apr 24 04:12:24.620912 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:24.620964 (XEN) X0: 0000000000000000 X1: 0000760ffb374000 X2: 0000800ffb6b4078 Apr 24 04:12:24.632929 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:24.644918 (XEN) X6: 00000a00003825c8 X7: 0000800ffb6b7280 X8: 0000000000000012 Apr 24 04:12:24.644984 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:24.656920 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:24.656983 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:24.668937 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005d Apr 24 04:12:24.669000 (XEN) X21: 00000a0000348300 X22: 0000000020000000 X23: 000000000000005d Apr 24 04:12:24.680921 (XEN) X24: 000000000000005d X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:24.680984 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb6afe60 Apr 24 04:12:24.692925 (XEN) Apr 24 04:12:24.692979 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:24.693024 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:24.704921 (XEN) Apr 24 04:12:24.704974 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:24.705019 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:24.705065 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:24.705089 (XEN) Apr 24 04:12:24.705110 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:24.716915 (XEN) HPFAR_EL2: 0000009010803b00 Apr 24 04:12:24.716973 (XEN) FAR_EL2: ffff80000b3b0100 Apr 24 04:12:24.717017 (XEN) Apr 24 04:12:24.717055 (XEN) Xen stack trace from sp=0000800ffb6afe60: Apr 24 04:12:24.728860 (XEN) 0000800ffb6afe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:24.728917 (XEN) 000000000000005d 0000000000000000 0000000000000000 000000000001020d Apr 24 04:12:24.740859 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.740913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.752861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.752916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.764891 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.776931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.776993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.788924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.788987 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.800812 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.800850 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.812915 (XEN) Xen call trace: Apr 24 04:12:24.812974 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:24.824853 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:24.824911 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:24.836938 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:24.836999 (XEN) Apr 24 04:12:24.837039 (XEN) *** Dumping CPU94 host state: *** Apr 24 04:12:24.837084 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:24.848900 (XEN) CPU: 94 Apr 24 04:12:24.848955 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:24.849006 (XEN) LR: 00000a0000276fcc Apr 24 04:12:24.860928 (XEN) SP: 0000800ffb6a7e60 Apr 24 04:12:24.860985 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:24.861036 (XEN) X0: 0000000000000000 X1: 0000760ffb372000 X2: 0000800ffb6b2078 Apr 24 04:12:24.872930 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:24.884928 (XEN) X6: 00000a00003825c8 X7: 0000800ffb6b7740 X8: 0000000000000012 Apr 24 04:12:24.884991 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:24.896905 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:24.896969 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:24.908927 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005e Apr 24 04:12:24.908990 (XEN) X21: 00000a0000348380 X22: 0000000040000000 X23: 000000000000005e Apr 24 04:12:24.920934 (XEN) X24: 000000000000005e X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:24.920997 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb6a7e60 Apr 24 04:12:24.932924 (XEN) Apr 24 04:12:24.932978 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:24.933023 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:24.944929 (XEN) Apr 24 04:12:24.944982 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:24.945027 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:24.945070 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:24.945112 (XEN) Apr 24 04:12:24.956926 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:24.956987 (XEN) HPFAR_EL2: 0000009010804700 Apr 24 04:12:24.957031 (XEN) FAR_EL2: ffff80000b470100 Apr 24 04:12:24.957075 (XEN) Apr 24 04:12:24.957119 (XEN) Xen stack trace from sp=0000800ffb6a7e60: Apr 24 04:12:24.968920 (XEN) 0000800ffb6a7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:24.968983 (XEN) 000000000000005e 0000000000000000 0000000000000000 000000000001020e Apr 24 04:12:24.980938 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.981001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:24.992932 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.004922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.004984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.016916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.016979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.028938 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.029000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.040929 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.040992 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.052928 (XEN) Xen call trace: Apr 24 04:12:25.052985 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:25.064921 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:25.064987 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:25.076928 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:25.076989 (XEN) Apr 24 04:12:25.077029 (XEN) *** Dumping CPU95 host state: *** Apr 24 04:12:25.077121 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 04:12:25.088926 (XEN) CPU: 95 Apr 24 04:12:25.088981 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 04:12:25.100799 (XEN) LR: 00000a0000276fcc Apr 24 04:12:25.100799 (XEN) SP: 0000800ffb657e60 Apr 24 04:12:25.100799 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 04:12:25.115040 (XEN) X0: 0000000000000000 X1: 0000760ffb31e000 X2: 0000800ffb65e078 Apr 24 04:12:25.115040 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 04:12:25.115040 (XEN) X6: 00000a00003825c8 X7: 0000800ffb6b7c00 X8: 0000000000000012 Apr 24 04:12:25.127028 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 04:12:25.139027 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 04:12:25.139027 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 04:12:25.151010 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005f Apr 24 04:12:25.151010 (XEN) X21: 00000a0000348400 X22: 0000000080000000 X23: 000000000000005f Apr 24 04:12:25.163004 (XEN) X24: 000000000000005f X25: 0000000000000000 X26: 0000000000000000 Apr 24 04:12:25.163004 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb657e60 Apr 24 04:12:25.175007 (XEN) Apr 24 04:12:25.175007 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 04:12:25.175007 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 04:12:25.175007 (XEN) Apr 24 04:12:25.187029 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 04:12:25.187029 (XEN) HCR_EL2: 00000000807c663f Apr 24 04:12:25.187029 (XEN) TTBR0_EL2: 000001071e466000 Apr 24 04:12:25.187029 (XEN) Apr 24 04:12:25.187029 (XEN) ESR_EL2: 0000000007e00000 Apr 24 04:12:25.198997 (XEN) HPFAR_EL2: 0000009010805100 Apr 24 04:12:25.198997 (XEN) FAR_EL2: ffff80000b510100 Apr 24 04:12:25.198997 (XEN) Apr 24 04:12:25.198997 (XEN) Xen stack trace from sp=0000800ffb657e60: Apr 24 04:12:25.211006 (XEN) 0000800ffb657e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 04:12:25.211006 (XEN) 000000000000005f 0000000000000000 0000000000000000 000000000001020f Apr 24 04:12:25.223007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.223007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.235024 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.235024 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.247005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.259004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.259004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.271002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.271002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.282995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.282995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 04:12:25.294994 (XEN) Xen call trace: Apr 24 04:12:25.294994 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 04:12:25.307005 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 04:12:25.307005 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 04:12:25.318971 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 04:12:25.318971 (XEN) Apr 24 04:12:25.318971 Apr 24 04:12:30.865977 (XEN) 'q' pressed -> dumping domain info (now = 1295522881210) Apr 24 04:12:30.891185 (XEN) General information for domain 0: Apr 24 04:12:30.891241 (XEN) refcnt=3 dying=0 pa Apr 24 04:12:30.893583 use_count=0 Apr 24 04:12:30.902979 (XEN) nr_pages=131072 xenheap_pages=2 dirty_cpus={} max_pages=131072 Apr 24 04:12:30.902979 (XEN) handle=00000000-0000-0000-0000-000000000000 vm_assist=00000020 Apr 24 04:12:30.915039 (XEN) p2m mappings for domain 0 (vmid 1): Apr 24 04:12:30.915039 (XEN) 1G mappings: 4984 (shattered 3) Apr 24 04:12:30.915039 (XEN) 2M mappings: 1444448 (shattered 102) Apr 24 04:12:30.927026 (XEN) 4K mappings: 52240 Apr 24 04:12:30.927026 (XEN) Rangesets belonging to domain 0: Apr 24 04:12:30.927026 (XEN) Interrupts { 32, 38, 48-51 } Apr 24 04:12:30.927026 (XEN) I/O Memory { 802000000-808000000, 810000000-820000000, 838000000-844000000, 846000000-848002000, 849000000-849002000, 84a000000-84a002000, 84b000000-84b002000, 868000000-880000000, 88001f000-880058000, 881010000-883000010, 902000000-908000000, 910000000-920000000, 938000000-944000000, 946000000-948002000, 949000000-949002000, 94a000000-94a002000, 94b000000-94b002000, 968000000-980000000 } Apr 24 04:12:30.963033 (XEN) NODE affinity for domain 0: [0] Apr 24 04:12:30.975040 (XEN) VCPU information and callbacks for domain 0: Apr 24 04:12:30.975040 (XEN) UNIT0 affinities: hard={0-95} soft={0-95} Apr 24 04:12:30.975040 (XEN) VCPU0: CPU17 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:30.987037 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:30.987037 (XEN) GICH_LRs (vcpu 0) mask=0 Apr 24 04:12:30.987037 (XEN) VCPU_LR[0]=0 Apr 24 04:12:30.999038 (XEN) VCPU_LR[1]=0 Apr 24 04:12:30.999038 (XEN) VCPU_LR[2]=0 Apr 24 04:12:30.999038 (XEN) VCPU_LR[3]=0 Apr 24 04:12:30.999038 (XEN) VCPU_LR[4]=0 Apr 24 04:12:30.999038 (XEN) VCPU_LR[5]=0 Apr 24 04:12:30.999038 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.011041 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.011041 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.011041 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.011041 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.011041 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.023038 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.023038 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.023038 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.023038 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.023038 (XEN) No periodic timer Apr 24 04:12:31.023038 (XEN) UNIT1 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.035039 (XEN) VCPU1: CPU53 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.035039 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.047039 (XEN) GICH_LRs (vcpu 1) mask=0 Apr 24 04:12:31.047039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.047039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.047039 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.047039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.047039 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.059042 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.059042 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.059042 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.059042 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.059042 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.059042 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.071039 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.071039 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.071039 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.071039 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.071039 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.071039 (XEN) No periodic timer Apr 24 04:12:31.083031 (XEN) UNIT2 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.083031 (XEN) VCPU2: CPU33 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.095039 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.095039 (XEN) GICH_LRs (vcpu 2) mask=0 Apr 24 04:12:31.095039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.095039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.107042 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.107042 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.107042 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.107042 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.107042 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.107042 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.119039 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.119039 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.119039 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.119039 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.119039 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.119039 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.131040 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.131040 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.131040 (XEN) No periodic timer Apr 24 04:12:31.131040 (XEN) UNIT3 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.131040 (XEN) VCPU3: CPU50 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.143039 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.143039 (XEN) GICH_LRs (vcpu 3) mask=0 Apr 24 04:12:31.143039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.155040 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.155040 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.155040 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.155040 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.155040 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.155040 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.167041 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.167041 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.167041 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.167041 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.167041 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.167041 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.179036 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.179036 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.179036 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.179036 (XEN) No periodic timer Apr 24 04:12:31.179036 (XEN) UNIT4 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.191038 (XEN) VCPU4: CPU81 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.191038 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.203045 (XEN) GICH_LRs (vcpu 4) mask=0 Apr 24 04:12:31.203045 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.203045 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.203045 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.203045 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.203045 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.215030 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.215030 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.215030 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.215030 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.215030 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.227032 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.227032 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.227032 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.227032 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.227032 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.227032 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.239045 (XEN) No periodic timer Apr 24 04:12:31.239045 (XEN) UNIT5 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.239045 (XEN) VCPU5: CPU84 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.251040 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.251040 (XEN) GICH_LRs (vcpu 5) mask=0 Apr 24 04:12:31.251040 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.251040 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.251040 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.263044 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.263044 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.263044 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.263044 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.263044 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.263044 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.275028 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.275028 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.275028 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.275028 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.275028 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.287034 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.287034 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.287034 (XEN) No periodic timer Apr 24 04:12:31.287034 (XEN) UNIT6 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.287034 (XEN) VCPU6: CPU8 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.299038 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.299038 (XEN) GICH_LRs (vcpu 6) mask=0 Apr 24 04:12:31.299038 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.311039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.311039 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.311039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.311039 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.311039 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.311039 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.323031 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.323031 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.323031 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.323031 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.323031 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.323031 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.335032 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.335032 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.335032 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.335032 (XEN) No periodic timer Apr 24 04:12:31.335032 (XEN) UNIT7 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.347036 (XEN) VCPU7: CPU20 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.347036 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.359043 (XEN) GICH_LRs (vcpu 7) mask=0 Apr 24 04:12:31.359043 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.359043 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.359043 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.359043 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.371038 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.371038 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.371038 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.371038 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.371038 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.371038 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.383040 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.383040 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.383040 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.383040 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.383040 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.383040 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.395039 (XEN) No periodic timer Apr 24 04:12:31.395039 (XEN) UNIT8 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.395039 (XEN) VCPU8: CPU34 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.407005 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.407005 (XEN) GICH_LRs (vcpu 8) mask=0 Apr 24 04:12:31.407005 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.407005 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.407005 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.419004 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.419004 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.419004 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.419004 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.419004 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.419004 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.431015 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.431015 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.431015 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.431015 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.431015 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.431015 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.443096 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.443147 (XEN) No periodic timer Apr 24 04:12:31.443197 (XEN) UNIT9 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.443217 (XEN) VCPU9: CPU51 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.454985 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.454985 (XEN) GICH_LRs (vcpu 9) mask=0 Apr 24 04:12:31.454985 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.466972 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.466972 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.466972 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.466972 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.466972 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.478979 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.478979 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.478979 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.478979 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.478979 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.478979 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.490984 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.490984 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.490984 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.490984 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.490984 (XEN) No periodic timer Apr 24 04:12:31.490984 (XEN) UNIT10 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.502986 (XEN) VCPU10: CPU19 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.502986 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.514975 (XEN) GICH_LRs (vcpu 10) mask=0 Apr 24 04:12:31.514975 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.514975 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.514975 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.514975 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.526979 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.526979 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.526979 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.526979 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.526979 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.526979 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.538974 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.538974 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.538974 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.538974 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.538974 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.538974 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.551007 (XEN) No periodic timer Apr 24 04:12:31.551007 (XEN) UNIT11 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.551007 (XEN) VCPU11: CPU84 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.563010 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.563010 (XEN) GICH_LRs (vcpu 11) mask=0 Apr 24 04:12:31.563010 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.563010 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.563010 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.575001 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.575001 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.575001 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.575001 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.575001 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.575001 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.587004 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.587004 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.587004 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.587004 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.587004 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.598995 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.598995 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.598995 (XEN) No periodic timer Apr 24 04:12:31.598995 (XEN) UNIT12 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.611011 (XEN) VCPU12: CPU8 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.611011 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.611011 (XEN) GICH_LRs (vcpu 12) mask=0 Apr 24 04:12:31.623013 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.623013 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.623013 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.623013 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.623013 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.623013 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.635049 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.635049 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.635049 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.635049 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.635049 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.635049 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.647018 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.647018 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.647018 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.647018 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.647018 (XEN) No periodic timer Apr 24 04:12:31.647018 (XEN) UNIT13 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.659041 (XEN) VCPU13: CPU20 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.659041 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.671039 (XEN) GICH_LRs (vcpu 13) mask=0 Apr 24 04:12:31.671039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.671039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.671039 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.671039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.683036 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.683036 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.683036 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.683036 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.683036 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.683036 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.695031 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.695176 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.695253 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.695255 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.695255 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.695255 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.707045 (XEN) No periodic timer Apr 24 04:12:31.707045 (XEN) UNIT14 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.707045 (XEN) VCPU14: CPU35 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.719031 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.719031 (XEN) GICH_LRs (vcpu 14) mask=0 Apr 24 04:12:31.719031 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.719031 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.731035 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.731035 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.731035 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.731035 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.731035 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.731035 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.743039 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.743039 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.743039 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.743039 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.743039 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.743039 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.755040 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.755040 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.755040 (XEN) No periodic timer Apr 24 04:12:31.755040 (XEN) UNIT15 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.767042 (XEN) VCPU15: CPU56 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.767042 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.767042 (XEN) GICH_LRs (vcpu 15) mask=0 Apr 24 04:12:31.779034 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.779034 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.779034 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.779034 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.779034 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.779034 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.791036 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.791036 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.791036 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.791036 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.791036 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.791036 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.803042 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.803042 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.803042 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.803042 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.803042 (XEN) No periodic timer Apr 24 04:12:31.803042 (XEN) UNIT16 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.815033 (XEN) VCPU16: CPU70 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.815033 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.827038 (XEN) GICH_LRs (vcpu 16) mask=0 Apr 24 04:12:31.827038 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.827038 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.827038 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.827038 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.839054 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.839054 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.839054 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.839054 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.839054 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.839054 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.851027 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.851027 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.851027 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.851027 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.851027 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.863041 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.863041 (XEN) No periodic timer Apr 24 04:12:31.863041 (XEN) UNIT17 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.863041 (XEN) VCPU17: CPU83 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.875041 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.875041 (XEN) GICH_LRs (vcpu 17) mask=0 Apr 24 04:12:31.875041 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.887042 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.887042 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.887042 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.887042 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.887042 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.887042 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.899044 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.899044 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.899044 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.899044 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.899044 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.899044 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.911043 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.911043 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.911043 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.911043 (XEN) No periodic timer Apr 24 04:12:31.911043 (XEN) UNIT18 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.923040 (XEN) VCPU18: CPU22 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.923040 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.923040 (XEN) GICH_LRs (vcpu 18) mask=0 Apr 24 04:12:31.935040 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.935040 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.935040 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.935040 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.935040 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.935040 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.947036 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.947036 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.947036 (XEN) VCPU_LR[8]=0 Apr 24 04:12:31.947036 (XEN) VCPU_LR[9]=0 Apr 24 04:12:31.947036 (XEN) VCPU_LR[10]=0 Apr 24 04:12:31.947036 (XEN) VCPU_LR[11]=0 Apr 24 04:12:31.959044 (XEN) VCPU_LR[12]=0 Apr 24 04:12:31.959044 (XEN) VCPU_LR[13]=0 Apr 24 04:12:31.959044 (XEN) VCPU_LR[14]=0 Apr 24 04:12:31.959044 (XEN) VCPU_LR[15]=0 Apr 24 04:12:31.959044 (XEN) No periodic timer Apr 24 04:12:31.971030 (XEN) UNIT19 affinities: hard={0-95} soft={0-95} Apr 24 04:12:31.971030 (XEN) VCPU19: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:31.983043 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:31.983043 (XEN) GICH_LRs (vcpu 19) mask=0 Apr 24 04:12:31.983043 (XEN) VCPU_LR[0]=0 Apr 24 04:12:31.983043 (XEN) VCPU_LR[1]=0 Apr 24 04:12:31.983043 (XEN) VCPU_LR[2]=0 Apr 24 04:12:31.995042 (XEN) VCPU_LR[3]=0 Apr 24 04:12:31.995042 (XEN) VCPU_LR[4]=0 Apr 24 04:12:31.995042 (XEN) VCPU_LR[5]=0 Apr 24 04:12:31.995042 (XEN) VCPU_LR[6]=0 Apr 24 04:12:31.995042 (XEN) VCPU_LR[7]=0 Apr 24 04:12:31.995042 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.007043 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.007043 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.007043 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.007043 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.007043 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.007043 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.019042 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.019042 (XEN) No periodic timer Apr 24 04:12:32.019042 (XEN) UNIT20 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.019042 (XEN) VCPU20: CPU36 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.031041 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.031041 (XEN) GICH_LRs (vcpu 20) mask=0 Apr 24 04:12:32.031041 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.043039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.043039 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.043039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.043039 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.043039 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.043039 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.055043 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.055043 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.055043 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.055043 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.055043 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.055043 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.067037 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.067037 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.067037 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.067037 (XEN) No periodic timer Apr 24 04:12:32.067037 (XEN) UNIT21 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.079040 (XEN) VCPU21: CPU54 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.079040 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.079040 (XEN) GICH_LRs (vcpu 21) mask=0 Apr 24 04:12:32.091032 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.091032 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.091032 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.091032 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.091032 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.103027 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.103027 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.103027 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.103027 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.103027 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.103027 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.115041 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.115041 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.115041 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.115041 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.115041 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.127038 (XEN) No periodic timer Apr 24 04:12:32.127038 (XEN) UNIT22 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.127038 (XEN) VCPU22: CPU68 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.139036 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.139036 (XEN) GICH_LRs (vcpu 22) mask=0 Apr 24 04:12:32.139036 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.139036 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.139036 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.151039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.151039 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.151039 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.151039 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.151039 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.151039 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.163043 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.163043 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.163043 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.163043 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.163043 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.163043 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.175038 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.175038 (XEN) No periodic timer Apr 24 04:12:32.175038 (XEN) UNIT23 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.175038 (XEN) VCPU23: CPU85 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.187038 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.187038 (XEN) GICH_LRs (vcpu 23) mask=0 Apr 24 04:12:32.187038 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.199039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.199039 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.199039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.199039 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.199039 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.199039 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.211040 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.211040 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.211040 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.211040 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.211040 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.211040 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.223029 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.223029 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.223029 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.223029 (XEN) No periodic timer Apr 24 04:12:32.223029 (XEN) UNIT24 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.235038 (XEN) VCPU24: CPU10 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.235038 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.247037 (XEN) GICH_LRs (vcpu 24) mask=0 Apr 24 04:12:32.247037 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.247037 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.247037 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.247037 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.259040 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.259040 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.259040 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.259040 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.259040 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.259040 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.271043 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.271043 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.271043 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.271043 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.271043 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.271043 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.283040 (XEN) No periodic timer Apr 24 04:12:32.283040 (XEN) UNIT25 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.283040 (XEN) VCPU25: CPU22 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.295039 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.295039 (XEN) GICH_LRs (vcpu 25) mask=0 Apr 24 04:12:32.295039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.295039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.295039 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.307031 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.307031 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.307031 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.307031 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.307031 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.307031 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.319040 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.319040 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.319040 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.319040 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.319040 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.331039 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.331039 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.331039 (XEN) No periodic timer Apr 24 04:12:32.331039 (XEN) UNIT26 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.331039 (XEN) VCPU26: CPU37 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.343037 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.343037 (XEN) GICH_LRs (vcpu 26) mask=0 Apr 24 04:12:32.343037 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.355028 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.355028 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.355028 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.355028 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.355028 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.367039 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.367039 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.367039 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.367039 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.367039 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.367039 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.379037 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.379037 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.379037 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.379037 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.379037 (XEN) No periodic timer Apr 24 04:12:32.379037 (XEN) UNIT27 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.391035 (XEN) VCPU27: CPU23 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.391035 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.403038 (XEN) GICH_LRs (vcpu 27) mask=0 Apr 24 04:12:32.403038 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.403038 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.403038 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.403038 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.415040 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.415040 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.415040 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.415040 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.415040 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.415040 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.427039 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.427039 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.427039 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.427039 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.427039 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.427039 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.439036 (XEN) No periodic timer Apr 24 04:12:32.439036 (XEN) UNIT28 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.439036 (XEN) VCPU28: CPU71 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.451039 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.451039 (XEN) GICH_LRs (vcpu 28) mask=0 Apr 24 04:12:32.451039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.451039 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.463043 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.463043 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.463043 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.463043 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.463043 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.463043 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.475036 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.475036 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.475036 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.475036 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.475036 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.475036 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.487034 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.487034 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.487034 (XEN) No periodic timer Apr 24 04:12:32.487034 (XEN) UNIT29 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.499011 (XEN) VCPU29: CPU86 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.499011 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.499011 (XEN) GICH_LRs (vcpu 29) mask=0 Apr 24 04:12:32.510978 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.510978 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.510978 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.510978 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.510978 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.510978 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.523001 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.523001 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.523001 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.523001 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.523001 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.523001 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.534983 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.534983 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.534983 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.534983 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.534983 (XEN) No periodic timer Apr 24 04:12:32.546985 (XEN) UNIT30 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.546985 (XEN) VCPU30: CPU14 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.546985 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.558983 (XEN) GICH_LRs (vcpu 30) mask=0 Apr 24 04:12:32.558983 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.558983 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.558983 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.558983 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.571048 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.571048 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.571048 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.571048 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.571048 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.571048 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.583042 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.583042 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.583042 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.583042 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.583042 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.583042 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.595036 (XEN) No periodic timer Apr 24 04:12:32.595036 (XEN) UNIT31 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.595036 (XEN) VCPU31: CPU49 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.607027 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.607027 (XEN) GICH_LRs (vcpu 31) mask=0 Apr 24 04:12:32.607027 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.619044 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.619044 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.619044 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.619044 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.619044 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.619044 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.631038 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.631038 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.631038 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.631038 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.631038 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.631038 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.643039 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.643039 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.643039 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.643039 (XEN) No periodic timer Apr 24 04:12:32.643039 (XEN) UNIT32 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.655040 (XEN) VCPU32: CPU33 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.655040 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.655040 (XEN) GICH_LRs (vcpu 32) mask=0 Apr 24 04:12:32.667037 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.667037 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.667037 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.667037 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.667037 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.667037 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.679037 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.679037 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.679037 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.679037 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.679037 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.679037 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.688941 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.688998 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.689041 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.689082 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.689123 (XEN) No periodic timer Apr 24 04:12:32.700917 (XEN) UNIT33 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.700980 (XEN) VCPU33: CPU24 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.701071 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.712915 (XEN) GICH_LRs (vcpu 33) mask=0 Apr 24 04:12:32.712973 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.713016 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.713057 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.713098 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.724916 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.724973 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.725016 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.725057 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.725097 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.725137 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.736899 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.736955 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.736998 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.737038 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.737079 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.748913 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.748972 (XEN) No periodic timer Apr 24 04:12:32.749016 (XEN) UNIT34 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.749064 (XEN) VCPU34: CPU73 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.760867 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.760918 (XEN) GICH_LRs (vcpu 34) mask=0 Apr 24 04:12:32.760962 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.772898 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.772954 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.772997 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.773038 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.773078 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.773119 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.784903 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.784959 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.785002 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.785043 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.785083 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.785123 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.796901 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.796958 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.797001 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.797043 (XEN) No periodic timer Apr 24 04:12:32.797085 (XEN) UNIT35 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.808907 (XEN) VCPU35: CPU87 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.808971 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.809017 (XEN) GICH_LRs (vcpu 35) mask=0 Apr 24 04:12:32.820905 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.820961 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.821004 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.821045 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.821085 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.832906 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.832962 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.833006 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.833047 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.833088 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.833128 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.844906 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.844963 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.845006 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.845048 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.845089 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.845129 (XEN) No periodic timer Apr 24 04:12:32.856895 (XEN) UNIT36 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.856957 (XEN) VCPU36: CPU12 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.868906 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.868964 (XEN) GICH_LRs (vcpu 36) mask=0 Apr 24 04:12:32.869010 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.869052 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.869092 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.880911 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.880966 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.881008 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.881049 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.881090 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.881130 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.892916 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.892971 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.893014 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.893056 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.893096 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.893137 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.904949 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.905007 (XEN) No periodic timer Apr 24 04:12:32.905051 (XEN) UNIT37 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.905097 (XEN) VCPU37: CPU25 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.916885 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.916944 (XEN) GICH_LRs (vcpu 37) mask=0 Apr 24 04:12:32.916988 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.928908 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.928965 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.929008 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.929049 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.929089 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.929129 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.940910 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.940967 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.941009 (XEN) VCPU_LR[9]=0 Apr 24 04:12:32.941050 (XEN) VCPU_LR[10]=0 Apr 24 04:12:32.941091 (XEN) VCPU_LR[11]=0 Apr 24 04:12:32.941131 (XEN) VCPU_LR[12]=0 Apr 24 04:12:32.952909 (XEN) VCPU_LR[13]=0 Apr 24 04:12:32.952966 (XEN) VCPU_LR[14]=0 Apr 24 04:12:32.953009 (XEN) VCPU_LR[15]=0 Apr 24 04:12:32.953051 (XEN) No periodic timer Apr 24 04:12:32.953092 (XEN) UNIT38 affinities: hard={0-95} soft={0-95} Apr 24 04:12:32.964906 (XEN) VCPU38: CPU39 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:32.964971 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:32.965017 (XEN) GICH_LRs (vcpu 38) mask=0 Apr 24 04:12:32.976913 (XEN) VCPU_LR[0]=0 Apr 24 04:12:32.976970 (XEN) VCPU_LR[1]=0 Apr 24 04:12:32.977013 (XEN) VCPU_LR[2]=0 Apr 24 04:12:32.977054 (XEN) VCPU_LR[3]=0 Apr 24 04:12:32.977095 (XEN) VCPU_LR[4]=0 Apr 24 04:12:32.988901 (XEN) VCPU_LR[5]=0 Apr 24 04:12:32.988958 (XEN) VCPU_LR[6]=0 Apr 24 04:12:32.989001 (XEN) VCPU_LR[7]=0 Apr 24 04:12:32.989042 (XEN) VCPU_LR[8]=0 Apr 24 04:12:32.989082 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.000909 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.000966 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.001010 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.001051 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.001091 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.001132 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.012850 (XEN) No periodic timer Apr 24 04:12:33.012907 (XEN) UNIT39 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.012956 (XEN) VCPU39: CPU55 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.024927 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.024986 (XEN) GICH_LRs (vcpu 39) mask=0 Apr 24 04:12:33.025032 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.025073 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.036897 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.036955 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.036998 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.037040 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.037080 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.037119 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.048903 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.048962 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.049005 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.049047 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.049087 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.049127 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.060906 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.060963 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.061006 (XEN) No periodic timer Apr 24 04:12:33.061048 (XEN) UNIT40 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.061095 (XEN) VCPU40: CPU75 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.072915 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.072973 (XEN) GICH_LRs (vcpu 40) mask=0 Apr 24 04:12:33.073018 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.084907 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.084963 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.085005 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.085046 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.085086 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.085126 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.096906 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.096962 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.097005 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.097046 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.097128 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.097172 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.108913 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.108969 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.109012 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.109053 (XEN) No periodic timer Apr 24 04:12:33.109094 (XEN) UNIT41 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.120906 (XEN) VCPU41: CPU88 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.120970 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.132883 (XEN) GICH_LRs (vcpu 41) mask=0 Apr 24 04:12:33.132942 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.132984 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.133025 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.133066 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.144851 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.144908 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.144950 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.144991 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.145032 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.145072 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.156849 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.156905 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.156948 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.156989 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.157029 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.157070 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.168854 (XEN) No periodic timer Apr 24 04:12:33.168911 (XEN) UNIT42 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.168959 (XEN) VCPU42: CPU15 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.180865 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.180924 (XEN) GICH_LRs (vcpu 42) mask=0 Apr 24 04:12:33.180969 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.181011 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.192847 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.192903 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.192946 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.192988 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.193028 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.193068 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.204859 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.204916 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.204959 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.205000 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.205041 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.205081 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.216850 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.216907 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.216950 (XEN) No periodic timer Apr 24 04:12:33.216993 (XEN) UNIT43 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.217040 (XEN) VCPU43: CPU4 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.228857 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.228916 (XEN) GICH_LRs (vcpu 43) mask=0 Apr 24 04:12:33.228960 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.240857 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.240913 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.240955 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.240996 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.241036 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.252909 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.252964 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.253007 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.253048 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.253088 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.253128 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.264907 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.264963 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.265005 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.265047 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.265087 (XEN) No periodic timer Apr 24 04:12:33.276901 (XEN) UNIT44 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.276964 (XEN) VCPU44: CPU40 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.277015 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.288937 (XEN) GICH_LRs (vcpu 44) mask=0 Apr 24 04:12:33.288995 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.289038 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.289079 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.289118 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.300941 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.300998 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.301081 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.301125 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.301166 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.301206 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.312943 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.312999 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.313041 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.313082 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.313122 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.313162 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.324927 (XEN) No periodic timer Apr 24 04:12:33.324984 (XEN) UNIT45 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.325032 (XEN) VCPU45: CPU59 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.336942 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.337001 (XEN) GICH_LRs (vcpu 45) mask=0 Apr 24 04:12:33.337046 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.337087 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.348924 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.348980 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.349023 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.349064 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.349105 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.349146 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.360939 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.360995 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.361038 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.361079 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.361119 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.361158 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.372921 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.372977 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.373019 (XEN) No periodic timer Apr 24 04:12:33.373060 (XEN) UNIT46 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.384931 (XEN) VCPU46: CPU72 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.384995 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.385041 (XEN) GICH_LRs (vcpu 46) mask=0 Apr 24 04:12:33.396940 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.396995 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.397038 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.397078 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.397118 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.408926 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.408982 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.409025 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.409065 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.409105 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.409145 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.420938 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.420995 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.421037 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.421078 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.421118 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.421157 (XEN) No periodic timer Apr 24 04:12:33.432931 (XEN) UNIT47 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.432993 (XEN) VCPU47: CPU67 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.433043 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.444929 (XEN) GICH_LRs (vcpu 47) mask=0 Apr 24 04:12:33.444988 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.445030 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.445070 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.445110 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.456928 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.456984 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.457026 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.457067 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.457107 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.457146 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.468932 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.468988 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.469030 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.469071 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.469111 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.480921 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.480979 (XEN) No periodic timer Apr 24 04:12:33.481023 (XEN) UNIT48 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.481070 (XEN) VCPU48: CPU3 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.492935 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.492993 (XEN) GICH_LRs (vcpu 48) mask=0 Apr 24 04:12:33.493039 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.504969 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.505026 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.505069 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.505110 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.505150 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.505189 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.516926 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.516982 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.517025 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.517066 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.517105 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.517145 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.528927 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.528983 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.529026 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.529066 (XEN) No periodic timer Apr 24 04:12:33.529108 (XEN) UNIT49 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.540891 (XEN) VCPU49: CPU26 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.540955 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.541001 (XEN) GICH_LRs (vcpu 49) mask=0 Apr 24 04:12:33.552938 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.552994 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.553037 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.553078 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.553118 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.564930 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.564986 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.565029 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.565070 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.565110 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.565150 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.576922 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.576978 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.577021 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.577061 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.577101 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.577141 (XEN) No periodic timer Apr 24 04:12:33.588942 (XEN) UNIT50 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.589003 (XEN) VCPU50: CPU41 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.589054 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.600966 (XEN) GICH_LRs (vcpu 50) mask=0 Apr 24 04:12:33.601024 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.601067 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.601108 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.612928 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.612986 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.613029 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.613070 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.613110 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.613150 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.613189 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.624920 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.624976 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.625017 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.625058 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.636922 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.636980 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.637023 (XEN) No periodic timer Apr 24 04:12:33.637065 (XEN) UNIT51 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.637111 (XEN) VCPU51: CPU57 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.648941 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.648999 (XEN) GICH_LRs (vcpu 51) mask=0 Apr 24 04:12:33.649044 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.660930 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.660986 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.661028 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.661068 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.661108 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.661148 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.672931 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.672986 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.673029 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.673069 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.673108 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.673148 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.684929 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.684985 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.685028 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.685069 (XEN) No periodic timer Apr 24 04:12:33.685110 (XEN) UNIT52 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.696923 (XEN) VCPU52: CPU74 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.697030 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.708927 (XEN) GICH_LRs (vcpu 52) mask=0 Apr 24 04:12:33.708987 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.709030 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.709071 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.709111 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.709151 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.720932 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.720988 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.721031 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.721071 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.721110 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.721150 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.732936 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.732992 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.733035 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.733075 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.733115 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.733155 (XEN) No periodic timer Apr 24 04:12:33.744927 (XEN) UNIT53 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.744989 (XEN) VCPU53: CPU89 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.756925 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.756983 (XEN) GICH_LRs (vcpu 53) mask=0 Apr 24 04:12:33.757028 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.757069 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.768928 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.768985 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.769028 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.769068 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.769107 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.769147 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.780939 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.780995 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.781038 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.781079 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.781119 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.781158 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.792939 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.792995 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.793038 (XEN) No periodic timer Apr 24 04:12:33.793080 (XEN) UNIT54 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.793126 (XEN) VCPU54: CPU1 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.804934 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.804992 (XEN) GICH_LRs (vcpu 54) mask=0 Apr 24 04:12:33.805037 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.816941 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.816997 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.817039 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.817080 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.817120 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.817159 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.828938 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.828993 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.829035 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.829076 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.829116 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.829156 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.840932 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.840988 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.841031 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.841072 (XEN) No periodic timer Apr 24 04:12:33.841113 (XEN) UNIT55 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.852910 (XEN) VCPU55: CPU27 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.852975 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.864931 (XEN) GICH_LRs (vcpu 55) mask=0 Apr 24 04:12:33.864989 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.865032 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.865074 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.865114 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.865154 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.876921 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.876976 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.877018 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.877059 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.877100 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.888916 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.888972 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.889014 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.889054 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.889094 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.889134 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.900985 (XEN) No periodic timer Apr 24 04:12:33.901042 (XEN) UNIT56 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.901091 (XEN) VCPU56: CPU42 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.912935 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.912994 (XEN) GICH_LRs (vcpu 56) mask=0 Apr 24 04:12:33.913038 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.913079 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.924929 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.924986 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.925029 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.925070 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.925111 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.925152 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.936925 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.936981 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.937024 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.937065 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.937105 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.937145 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.948928 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.948984 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.949027 (XEN) No periodic timer Apr 24 04:12:33.949069 (XEN) UNIT57 affinities: hard={0-95} soft={0-95} Apr 24 04:12:33.949115 (XEN) VCPU57: CPU58 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:33.960938 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:33.960997 (XEN) GICH_LRs (vcpu 57) mask=0 Apr 24 04:12:33.972929 (XEN) VCPU_LR[0]=0 Apr 24 04:12:33.972986 (XEN) VCPU_LR[1]=0 Apr 24 04:12:33.973028 (XEN) VCPU_LR[2]=0 Apr 24 04:12:33.973069 (XEN) VCPU_LR[3]=0 Apr 24 04:12:33.973109 (XEN) VCPU_LR[4]=0 Apr 24 04:12:33.973149 (XEN) VCPU_LR[5]=0 Apr 24 04:12:33.984937 (XEN) VCPU_LR[6]=0 Apr 24 04:12:33.984995 (XEN) VCPU_LR[7]=0 Apr 24 04:12:33.985038 (XEN) VCPU_LR[8]=0 Apr 24 04:12:33.985079 (XEN) VCPU_LR[9]=0 Apr 24 04:12:33.985119 (XEN) VCPU_LR[10]=0 Apr 24 04:12:33.985159 (XEN) VCPU_LR[11]=0 Apr 24 04:12:33.996927 (XEN) VCPU_LR[12]=0 Apr 24 04:12:33.996984 (XEN) VCPU_LR[13]=0 Apr 24 04:12:33.997027 (XEN) VCPU_LR[14]=0 Apr 24 04:12:33.997068 (XEN) VCPU_LR[15]=0 Apr 24 04:12:33.997109 (XEN) No periodic timer Apr 24 04:12:33.997150 (XEN) UNIT58 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.008923 (XEN) VCPU58: CPU5 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.008988 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.020936 (XEN) GICH_LRs (vcpu 58) mask=0 Apr 24 04:12:34.020995 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.021037 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.021078 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.021118 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.032936 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.032992 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.033034 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.033075 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.033115 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.033155 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.044937 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.044993 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.045036 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.045076 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.045116 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.045156 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.056931 (XEN) No periodic timer Apr 24 04:12:34.056987 (XEN) UNIT59 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.057037 (XEN) VCPU59: CPU90 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.068931 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.068990 (XEN) GICH_LRs (vcpu 59) mask=0 Apr 24 04:12:34.069035 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.069076 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.080939 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.080995 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.081038 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.081078 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.081118 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.081157 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.092930 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.092986 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.093028 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.093110 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.093154 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.093195 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.104925 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.104981 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.105023 (XEN) No periodic timer Apr 24 04:12:34.105065 (XEN) UNIT60 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.116913 (XEN) VCPU60: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.116978 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.117024 (XEN) GICH_LRs (vcpu 60) mask=0 Apr 24 04:12:34.128909 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.128966 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.129009 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.129049 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.129089 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.140887 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.140944 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.140988 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.141029 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.141069 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.141108 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.152928 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.152985 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.153028 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.153069 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.153109 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.153149 (XEN) No periodic timer Apr 24 04:12:34.164928 (XEN) UNIT61 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.164990 (XEN) VCPU61: CPU52 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.165041 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.176933 (XEN) GICH_LRs (vcpu 61) mask=0 Apr 24 04:12:34.176991 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.177034 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.177074 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.177114 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.188933 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.188988 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.189031 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.189071 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.189111 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.189151 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.200935 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.200991 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.201034 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.201074 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.201115 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.212924 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.212982 (XEN) No periodic timer Apr 24 04:12:34.213026 (XEN) UNIT62 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.213073 (XEN) VCPU62: CPU43 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.224933 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.224991 (XEN) GICH_LRs (vcpu 62) mask=0 Apr 24 04:12:34.225037 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.225077 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.236939 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.236995 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.237037 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.237078 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.237118 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.237157 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.248930 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.248985 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.249028 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.249069 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.249109 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.249150 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.260921 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.260977 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.261019 (XEN) No periodic timer Apr 24 04:12:34.261061 (XEN) UNIT63 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.272935 (XEN) VCPU63: CPU11 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.273000 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.273046 (XEN) GICH_LRs (vcpu 63) mask=0 Apr 24 04:12:34.284944 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.285000 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.285042 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.285082 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.285122 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.296938 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.296995 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.297075 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.297119 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.297159 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.297199 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.308889 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.308945 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.308988 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.309029 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.309070 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.309110 (XEN) No periodic timer Apr 24 04:12:34.320935 (XEN) UNIT64 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.320996 (XEN) VCPU64: CPU76 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.321048 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.332945 (XEN) GICH_LRs (vcpu 64) mask=0 Apr 24 04:12:34.333003 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.333046 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.333086 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.344925 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.344983 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.345026 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.345066 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.345106 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.345146 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.356924 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.356983 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.357027 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.357068 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.357108 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.357148 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.368933 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.368989 (XEN) No periodic timer Apr 24 04:12:34.369033 (XEN) UNIT65 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.369079 (XEN) VCPU65: CPU91 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.380927 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.380986 (XEN) GICH_LRs (vcpu 65) mask=0 Apr 24 04:12:34.381031 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.392964 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.393021 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.393064 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.393104 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.393144 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.393184 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.404930 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.404985 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.405027 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.405067 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.405107 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.405147 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.416929 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.416985 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.417027 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.417068 (XEN) No periodic timer Apr 24 04:12:34.417109 (XEN) UNIT66 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.428934 (XEN) VCPU66: CPU3 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.428998 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.429043 (XEN) GICH_LRs (vcpu 66) mask=0 Apr 24 04:12:34.440933 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.440988 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.441030 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.441070 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.441110 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.452927 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.452984 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.453026 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.453067 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.453107 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.453147 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.464930 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.464986 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.465029 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.465070 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.465110 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.465150 (XEN) No periodic timer Apr 24 04:12:34.476932 (XEN) UNIT67 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.476993 (XEN) VCPU67: CPU28 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.488942 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.489001 (XEN) GICH_LRs (vcpu 67) mask=0 Apr 24 04:12:34.489046 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.489088 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.489168 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.500932 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.500988 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.501031 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.501072 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.501112 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.501151 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.512923 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.512979 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.513022 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.513063 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.513103 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.524926 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.524983 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.525026 (XEN) No periodic timer Apr 24 04:12:34.525068 (XEN) UNIT68 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.525113 (XEN) VCPU68: CPU44 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.536868 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.536927 (XEN) GICH_LRs (vcpu 68) mask=0 Apr 24 04:12:34.536971 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.548931 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.548987 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.549030 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.549071 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.549116 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.549139 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.560910 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.560966 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.561009 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.561050 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.561101 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.561167 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.572913 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.572969 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.573012 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.573053 (XEN) No periodic timer Apr 24 04:12:34.573095 (XEN) UNIT69 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.584909 (XEN) VCPU69: CPU60 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.584974 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.596901 (XEN) GICH_LRs (vcpu 69) mask=0 Apr 24 04:12:34.596960 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.597003 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.597044 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.597085 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.597125 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.608917 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.608973 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.609015 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.609056 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.609097 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.609137 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.620913 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.620969 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.621012 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.621053 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.621094 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.621134 (XEN) No periodic timer Apr 24 04:12:34.632910 (XEN) UNIT70 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.632972 (XEN) VCPU70: CPU77 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.644898 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.644956 (XEN) GICH_LRs (vcpu 70) mask=0 Apr 24 04:12:34.645002 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.645044 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.656904 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.656961 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.657003 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.657045 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.657086 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.657126 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.668904 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.668961 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.669004 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.669046 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.669086 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.669128 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.680916 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.680973 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.681017 (XEN) No periodic timer Apr 24 04:12:34.681059 (XEN) UNIT71 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.681106 (XEN) VCPU71: CPU92 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.692954 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.693013 (XEN) GICH_LRs (vcpu 71) mask=0 Apr 24 04:12:34.704912 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.704969 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.705013 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.705054 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.705095 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.705135 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.716896 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.716954 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.716997 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.717039 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.717079 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.717119 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.728908 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.728966 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.729010 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.729051 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.729091 (XEN) No periodic timer Apr 24 04:12:34.729133 (XEN) UNIT72 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.740914 (XEN) VCPU72: CPU14 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.740978 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.752907 (XEN) GICH_LRs (vcpu 72) mask=0 Apr 24 04:12:34.752966 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.753009 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.753050 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.753091 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.753131 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.764897 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.764953 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.764995 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.765036 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.765077 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.776903 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.776959 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.777001 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.777042 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.777083 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.777123 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.788902 (XEN) No periodic timer Apr 24 04:12:34.788958 (XEN) UNIT73 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.789006 (XEN) VCPU73: CPU29 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.800910 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.800969 (XEN) GICH_LRs (vcpu 73) mask=0 Apr 24 04:12:34.801015 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.801056 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.812909 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.812965 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.813008 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.813049 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.813089 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.813129 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.824909 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.824965 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.825008 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.825049 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.825090 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.825130 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.836893 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.836949 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.836993 (XEN) No periodic timer Apr 24 04:12:34.837035 (XEN) UNIT74 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.848905 (XEN) VCPU74: CPU45 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.848970 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.849016 (XEN) GICH_LRs (vcpu 74) mask=0 Apr 24 04:12:34.860925 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.860981 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.861025 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.861066 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.861106 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.861146 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.872906 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.872963 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.873006 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.873047 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.873088 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.873129 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.884903 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.884960 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.885003 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.885045 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.885124 (XEN) No periodic timer Apr 24 04:12:34.885170 (XEN) UNIT75 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.896909 (XEN) VCPU75: CPU61 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.896974 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.908913 (XEN) GICH_LRs (vcpu 75) mask=0 Apr 24 04:12:34.908971 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.909015 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.909056 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.909097 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.920912 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.920968 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.921011 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.921052 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.921093 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.921133 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.932911 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.932967 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.933009 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.933050 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.933091 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.944897 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.944954 (XEN) No periodic timer Apr 24 04:12:34.944998 (XEN) UNIT76 affinities: hard={0-95} soft={0-95} Apr 24 04:12:34.945045 (XEN) VCPU76: CPU78 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:34.956921 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:34.956980 (XEN) GICH_LRs (vcpu 76) mask=0 Apr 24 04:12:34.957025 (XEN) VCPU_LR[0]=0 Apr 24 04:12:34.957067 (XEN) VCPU_LR[1]=0 Apr 24 04:12:34.968911 (XEN) VCPU_LR[2]=0 Apr 24 04:12:34.968967 (XEN) VCPU_LR[3]=0 Apr 24 04:12:34.969010 (XEN) VCPU_LR[4]=0 Apr 24 04:12:34.969051 (XEN) VCPU_LR[5]=0 Apr 24 04:12:34.969092 (XEN) VCPU_LR[6]=0 Apr 24 04:12:34.969132 (XEN) VCPU_LR[7]=0 Apr 24 04:12:34.980903 (XEN) VCPU_LR[8]=0 Apr 24 04:12:34.980959 (XEN) VCPU_LR[9]=0 Apr 24 04:12:34.981002 (XEN) VCPU_LR[10]=0 Apr 24 04:12:34.981042 (XEN) VCPU_LR[11]=0 Apr 24 04:12:34.981083 (XEN) VCPU_LR[12]=0 Apr 24 04:12:34.981123 (XEN) VCPU_LR[13]=0 Apr 24 04:12:34.992914 (XEN) VCPU_LR[14]=0 Apr 24 04:12:34.992970 (XEN) VCPU_LR[15]=0 Apr 24 04:12:34.993013 (XEN) No periodic timer Apr 24 04:12:34.993055 (XEN) UNIT77 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.004910 (XEN) VCPU77: CPU93 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.004975 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.005021 (XEN) GICH_LRs (vcpu 77) mask=0 Apr 24 04:12:35.016897 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.016954 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.016997 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.017038 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.017079 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.028855 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.028911 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.028953 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.028994 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.029034 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.029075 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.040900 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.040957 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.041000 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.041043 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.041083 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.041124 (XEN) No periodic timer Apr 24 04:12:35.052909 (XEN) UNIT78 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.052971 (XEN) VCPU78: CPU7 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.053022 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.064907 (XEN) GICH_LRs (vcpu 78) mask=0 Apr 24 04:12:35.064965 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.065008 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.065050 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.076903 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.076960 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.077003 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.077045 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.077085 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.077126 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.088904 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.088961 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.089004 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.089084 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.089127 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.089168 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.100901 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.100958 (XEN) No periodic timer Apr 24 04:12:35.101002 (XEN) UNIT79 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.101049 (XEN) VCPU79: CPU30 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.112926 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.112985 (XEN) GICH_LRs (vcpu 79) mask=0 Apr 24 04:12:35.113030 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.113071 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.124910 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.124966 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.125008 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.125049 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.125090 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.125130 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.136854 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.136910 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.136953 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.136994 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.137035 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.137075 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.148902 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.148958 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.149001 (XEN) No periodic timer Apr 24 04:12:35.149043 (XEN) UNIT80 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.160911 (XEN) VCPU80: CPU46 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.160975 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.172904 (XEN) GICH_LRs (vcpu 80) mask=0 Apr 24 04:12:35.172963 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.173007 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.173048 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.173088 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.173128 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.184915 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.184971 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.185014 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.185054 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.185094 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.185134 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.196849 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.196905 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.196948 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.196989 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.197029 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.197070 (XEN) No periodic timer Apr 24 04:12:35.208920 (XEN) UNIT81 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.208981 (XEN) VCPU81: CPU62 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.220912 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.220972 (XEN) GICH_LRs (vcpu 81) mask=0 Apr 24 04:12:35.221018 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.221060 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.221100 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.232903 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.232953 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.232977 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.232999 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.233021 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.233043 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.244904 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.244960 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.245004 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.245045 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.245086 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.245127 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.256908 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.256964 (XEN) No periodic timer Apr 24 04:12:35.257008 (XEN) UNIT82 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.257054 (XEN) VCPU82: CPU79 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.268916 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.268974 (XEN) GICH_LRs (vcpu 82) mask=0 Apr 24 04:12:35.269019 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.280890 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.280947 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.280990 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.281031 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.281071 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.281111 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.292944 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.293001 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.293044 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.293085 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.293126 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.304902 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.304961 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.305005 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.305047 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.305088 (XEN) No periodic timer Apr 24 04:12:35.305129 (XEN) UNIT83 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.316785 (XEN) VCPU83: CPU94 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.316820 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.328904 (XEN) GICH_LRs (vcpu 83) mask=0 Apr 24 04:12:35.328962 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.329005 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.329046 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.329086 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.329126 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.340909 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.340965 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.341008 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.341049 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.341089 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.341129 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.352903 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.352958 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.353001 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.353042 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.353082 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.353122 (XEN) No periodic timer Apr 24 04:12:35.364918 (XEN) UNIT84 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.364979 (XEN) VCPU84: CPU9 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.376909 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.376969 (XEN) GICH_LRs (vcpu 84) mask=0 Apr 24 04:12:35.377014 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.377055 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.377096 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.388908 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.388964 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.389007 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.389048 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.389088 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.389128 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.400909 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.400965 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.401008 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.401050 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.401090 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.412907 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.412963 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.413006 (XEN) No periodic timer Apr 24 04:12:35.413049 (XEN) UNIT85 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.413095 (XEN) VCPU85: CPU47 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.424917 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.424976 (XEN) GICH_LRs (vcpu 85) mask=0 Apr 24 04:12:35.436905 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.436962 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.437005 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.437046 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.437087 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.437127 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.448901 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.448958 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.449000 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.449041 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.449081 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.449155 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.460907 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.460964 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.461007 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.461049 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.461089 (XEN) No periodic timer Apr 24 04:12:35.461132 (XEN) UNIT86 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.472915 (XEN) VCPU86: CPU31 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.472979 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.484846 (XEN) GICH_LRs (vcpu 86) mask=0 Apr 24 04:12:35.484905 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.484948 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.485042 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.485066 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.485101 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.496896 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.496952 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.496994 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.497034 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.497075 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.497116 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.508861 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.508916 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.508959 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.509001 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.509041 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.520909 (XEN) No periodic timer Apr 24 04:12:35.520966 (XEN) UNIT87 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.521014 (XEN) VCPU87: CPU63 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.532833 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.532893 (XEN) GICH_LRs (vcpu 87) mask=0 Apr 24 04:12:35.532939 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.532981 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.544905 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.544961 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.545004 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.545045 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.545087 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.545127 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.556910 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.556966 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.557009 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.557051 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.557091 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.557132 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.568908 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.568964 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.569007 (XEN) No periodic timer Apr 24 04:12:35.569049 (XEN) UNIT88 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.580850 (XEN) VCPU88: CPU95 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.580915 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.580960 (XEN) GICH_LRs (vcpu 88) mask=0 Apr 24 04:12:35.592908 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.592965 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.593008 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.593049 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.593089 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.593129 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.604912 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.604968 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.605011 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.605052 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.605093 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.605133 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.616916 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.616973 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.617016 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.617057 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.617098 (XEN) No periodic timer Apr 24 04:12:35.617139 (XEN) UNIT89 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.628914 (XEN) VCPU89: CPU64 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.628979 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.640908 (XEN) GICH_LRs (vcpu 89) mask=0 Apr 24 04:12:35.640967 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.641009 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.641051 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.641091 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.652898 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.652955 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.652998 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.653039 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.653079 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.653119 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.664907 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.664963 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.665006 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.665047 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.665087 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.676903 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.676960 (XEN) No periodic timer Apr 24 04:12:35.677003 (XEN) UNIT90 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.677051 (XEN) VCPU90: CPU12 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.688993 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.689054 (XEN) GICH_LRs (vcpu 90) mask=0 Apr 24 04:12:35.689100 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.689142 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.700841 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.700897 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.700940 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.700981 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.701022 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.701063 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.712911 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.712967 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.713010 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.713051 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.713091 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.713132 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.724915 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.724970 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.725013 (XEN) No periodic timer Apr 24 04:12:35.725055 (XEN) UNIT91 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.736906 (XEN) VCPU91: CPU16 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.736971 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.737017 (XEN) GICH_LRs (vcpu 91) mask=0 Apr 24 04:12:35.748909 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.748966 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.749009 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.749050 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.749090 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.749130 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.760907 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.760963 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.761006 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.761047 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.761088 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.761128 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.772908 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.772964 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.773007 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.773048 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.773088 (XEN) No periodic timer Apr 24 04:12:35.773129 (XEN) UNIT92 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.784905 (XEN) VCPU92: CPU32 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.796901 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.796961 (XEN) GICH_LRs (vcpu 92) mask=0 Apr 24 04:12:35.797007 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.797048 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.797088 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.808901 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.808958 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.809000 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.809041 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.809081 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.809121 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.820907 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.820963 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.821007 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.821048 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.821088 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.821129 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.832895 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.832952 (XEN) No periodic timer Apr 24 04:12:35.832996 (XEN) UNIT93 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.833043 (XEN) VCPU93: CPU48 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.844913 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.844972 (XEN) GICH_LRs (vcpu 93) mask=0 Apr 24 04:12:35.845017 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.845058 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.856920 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.856976 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.857019 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.857059 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.857099 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.857139 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.868913 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.868969 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.869012 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.869052 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.869093 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.880911 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.880967 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.881010 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.881092 (XEN) No periodic timer Apr 24 04:12:35.881139 (XEN) UNIT94 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.892913 (XEN) VCPU94: CPU66 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.892978 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.893023 (XEN) GICH_LRs (vcpu 94) mask=0 Apr 24 04:12:35.904915 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.904971 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.905013 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.905055 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.905095 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.905135 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.916966 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.917022 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.917064 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.917106 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.917146 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.928925 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.928981 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.929023 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.929064 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.929105 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.929145 (XEN) No periodic timer Apr 24 04:12:35.940911 (XEN) UNIT95 affinities: hard={0-95} soft={0-95} Apr 24 04:12:35.940973 (XEN) VCPU95: CPU80 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 04:12:35.952906 (XEN) pause_count=0 pause_flags=1 Apr 24 04:12:35.952966 (XEN) GICH_LRs (vcpu 95) mask=0 Apr 24 04:12:35.953011 (XEN) VCPU_LR[0]=0 Apr 24 04:12:35.953052 (XEN) VCPU_LR[1]=0 Apr 24 04:12:35.953093 (XEN) VCPU_LR[2]=0 Apr 24 04:12:35.964905 (XEN) VCPU_LR[3]=0 Apr 24 04:12:35.964961 (XEN) VCPU_LR[4]=0 Apr 24 04:12:35.965004 (XEN) VCPU_LR[5]=0 Apr 24 04:12:35.965045 (XEN) VCPU_LR[6]=0 Apr 24 04:12:35.965086 (XEN) VCPU_LR[7]=0 Apr 24 04:12:35.965126 (XEN) VCPU_LR[8]=0 Apr 24 04:12:35.976906 (XEN) VCPU_LR[9]=0 Apr 24 04:12:35.976962 (XEN) VCPU_LR[10]=0 Apr 24 04:12:35.977005 (XEN) VCPU_LR[11]=0 Apr 24 04:12:35.977047 (XEN) VCPU_LR[12]=0 Apr 24 04:12:35.977087 (XEN) VCPU_LR[13]=0 Apr 24 04:12:35.977128 (XEN) VCPU_LR[14]=0 Apr 24 04:12:35.988912 (XEN) VCPU_LR[15]=0 Apr 24 04:12:35.988968 (XEN) No periodic timer Apr 24 04:12:35.989011 (XEN) Notifying guest 0:0 (virq 1, port 0) Apr 24 04:12:35.989057 (XEN) Notifying guest 0:1 (virq 1, port 0) Apr 24 04:12:36.000850 (XEN) Notifying guest 0:2 (virq 1, port 0) Apr 24 04:12:36.000910 (XEN) Notifying guest 0:3 (virq 1, port 0) Apr 24 04:12:36.000956 (XEN) Notifying guest 0:4 (virq 1, port 0) Apr 24 04:12:36.012919 (XEN) Notifying guest 0:5 (virq 1, port 0) Apr 24 04:12:36.012980 (XEN) Notifying guest 0:6 (virq 1, port 0) Apr 24 04:12:36.013026 (XEN) Notifying guest 0:7 (virq 1, port 0) Apr 24 04:12:36.024903 (XEN) Notifying guest 0:8 (virq 1, port 0) Apr 24 04:12:36.024966 (XEN) Notifying guest 0:9 (virq 1, port 0) Apr 24 04:12:36.025012 (XEN) Notifying guest 0:10 (virq 1, port 0) Apr 24 04:12:36.025057 (XEN) Notifying guest 0:11 (virq 1, port 0) Apr 24 04:12:36.036897 (XEN) Notifying guest 0:12 (virq 1, port 0) Apr 24 04:12:36.036956 (XEN) Notifying guest 0:13 (virq 1, port 0) Apr 24 04:12:36.048908 (XEN) Notifying guest 0:14 (virq 1, port 0) Apr 24 04:12:36.048969 (XEN) Notifying guest 0:15 (virq 1, port 0) Apr 24 04:12:36.049016 (XEN) Notifying guest 0:16 (virq 1, port 0) Apr 24 04:12:36.060909 (XEN) Notifying guest 0:17 (virq 1, port 0) Apr 24 04:12:36.060970 (XEN) Notifying guest 0:18 (virq 1, port 0) Apr 24 04:12:36.061017 (XEN) Notifying guest 0:19 (virq 1, port 0) Apr 24 04:12:36.072908 (XEN) Notifying guest 0:20 (virq 1, port 0) Apr 24 04:12:36.072968 (XEN) Notifying guest 0:21 (virq 1, port 0) Apr 24 04:12:36.073014 (XEN) Notifying guest 0:22 (virq 1, port 0) Apr 24 04:12:36.084908 (XEN) Notifying guest 0:23 (virq 1, port 0) Apr 24 04:12:36.084968 (XEN) Notifying guest 0:24 (virq 1, port 0) Apr 24 04:12:36.085014 (XEN) Notifying guest 0:25 (virq 1, port 0) Apr 24 04:12:36.085059 (XEN) Notifying guest 0:26 (virq 1, port 0) Apr 24 04:12:36.096911 (XEN) Notifying guest 0:27 (virq 1, port 0) Apr 24 04:12:36.097012 (XEN) Notifying guest 0:28 (virq 1, port 0) Apr 24 04:12:36.097062 (XEN) Notifying guest 0:29 (virq 1, port 0) Apr 24 04:12:36.108926 (XEN) Notifying guest 0:30 (virq 1, port 0) Apr 24 04:12:36.108986 (XEN) Notifying guest 0:31 (virq 1, port 0) Apr 24 04:12:36.109031 (XEN) Notifying guest 0:32 (virq 1, port 0) Apr 24 04:12:36.120911 (XEN) Notifying guest 0:33 (virq 1, port 0) Apr 24 04:12:36.120971 (XEN) Notifying guest 0:34 (virq 1, port 0) Apr 24 04:12:36.121016 (XEN) Notifying guest 0:35 (virq 1, port 0) Apr 24 04:12:36.132913 (XEN) Notifying guest 0:36 (virq 1, port 0) Apr 24 04:12:36.132972 (XEN) Notifying guest 0:37 (virq 1, port 0) Apr 24 04:12:36.133017 (XEN) Notifying guest 0:38 (virq 1, port 0) Apr 24 04:12:36.144911 (XEN) Notifying guest 0:39 (virq 1, port 0) Apr 24 04:12:36.144971 (XEN) Notifying guest 0:40 (virq 1, port 0) Apr 24 04:12:36.145017 (XEN) Notifying guest 0:41 (virq 1, port 0) Apr 24 04:12:36.156911 (XEN) Notifying guest 0:42 (virq 1, port 0) Apr 24 04:12:36.156971 (XEN) Notifying guest 0:43 (virq 1, port 0) Apr 24 04:12:36.157017 (XEN) Notifying guest 0:44 (virq 1, port 0) Apr 24 04:12:36.168897 (XEN) Notifying guest 0:45 (virq 1, port 0) Apr 24 04:12:36.168957 (XEN) Notifying guest 0:46 (virq 1, port 0) Apr 24 04:12:36.169003 (XEN) Notifying guest 0:47 (virq 1, port 0) Apr 24 04:12:36.180927 (XEN) Notifying guest 0:48 (virq 1, port 0) Apr 24 04:12:36.180986 (XEN) Notifying guest 0:49 (virq 1, port 0) Apr 24 04:12:36.181031 (XEN) Notifying guest 0:50 (virq 1, port 0) Apr 24 04:12:36.192913 (XEN) Notifying guest 0:51 (virq 1, port 0) Apr 24 04:12:36.192972 (XEN) Notifying guest 0:52 (virq 1, port 0) Apr 24 04:12:36.193018 (XEN) Notifying guest 0:53 (virq 1, port 0) Apr 24 04:12:36.204913 (XEN) Notifying guest 0:54 (virq 1, port 0) Apr 24 04:12:36.204973 (XEN) Notifying guest 0:55 (virq 1, port 0) Apr 24 04:12:36.205019 (XEN) Notifying guest 0:56 (virq 1, port 0) Apr 24 04:12:36.216912 (XEN) Notifying guest 0:57 (virq 1, port 0) Apr 24 04:12:36.216971 (XEN) Notifying guest 0:58 (virq 1, port 0) Apr 24 04:12:36.217018 (XEN) Notifying guest 0:59 (virq 1, port 0) Apr 24 04:12:36.228911 (XEN) Notifying guest 0:60 (virq 1, port 0) Apr 24 04:12:36.228970 (XEN) Notifying guest 0:61 (virq 1, port 0) Apr 24 04:12:36.229015 (XEN) Notifying guest 0:62 (virq 1, port 0) Apr 24 04:12:36.240911 (XEN) Notifying guest 0:63 (virq 1, port 0) Apr 24 04:12:36.240971 (XEN) Notifying guest 0:64 (virq 1, port 0) Apr 24 04:12:36.241017 (XEN) Notifying guest 0:65 (virq 1, port 0) Apr 24 04:12:36.252912 (XEN) Notifying guest 0:66 (virq 1, port 0) Apr 24 04:12:36.252972 (XEN) Notifying guest 0:67 (virq 1, port 0) Apr 24 04:12:36.253017 (XEN) Notifying guest 0:68 (virq 1, port 0) Apr 24 04:12:36.264930 (XEN) Notifying guest 0:69 (virq 1, port 0) Apr 24 04:12:36.265003 (XEN) Notifying guest 0:70 (virq 1, port 0) Apr 24 04:12:36.265052 (XEN) Notifying guest 0:71 (virq 1, port 0) Apr 24 04:12:36.276903 (XEN) Notifying guest 0:72 (virq 1, port 0) Apr 24 04:12:36.276963 (XEN) Notifying guest 0:73 (virq 1, port 0) Apr 24 04:12:36.277010 (XEN) Notifying guest 0:74 (virq 1, port 0) Apr 24 04:12:36.288900 (XEN) Notifying guest 0:75 (virq 1, port 0) Apr 24 04:12:36.288960 (XEN) Notifying guest 0:76 (virq 1, port 0) Apr 24 04:12:36.289007 (XEN) Notifying guest 0:77 (virq 1, port 0) Apr 24 04:12:36.300913 (XEN) Notifying guest 0:78 (virq 1, port 0) Apr 24 04:12:36.300972 (XEN) Notifying guest 0:79 (virq 1, port 0) Apr 24 04:12:36.301019 (XEN) Notifying guest 0:80 (virq 1, port 0) Apr 24 04:12:36.312858 (XEN) Notifying guest 0:81 (virq 1, port 0) Apr 24 04:12:36.312918 (XEN) Notifying guest 0:82 (virq 1, port 0) Apr 24 04:12:36.312964 (XEN) Notifying guest 0:83 (virq 1, port 0) Apr 24 04:12:36.324914 (XEN) Notifying guest 0:84 (virq 1, port 0) Apr 24 04:12:36.324973 (XEN) Notifying guest 0:85 (virq 1, port 0) Apr 24 04:12:36.325019 (XEN) Notifying guest 0:86 (virq 1, port 0) Apr 24 04:12:36.336909 (XEN) Notifying guest 0:87 (virq 1, port 0) Apr 24 04:12:36.336968 (XEN) Notifying guest 0:88 (virq 1, port 0) Apr 24 04:12:36.337063 (XEN) Notifying guest 0:89 (virq 1, port 0) Apr 24 04:12:36.348756 (XEN) Notifying guest 0:90 (virq 1, port 0) Apr 24 04:12:36.348787 (XEN) Notifying guest 0:91 (virq 1, port 0) Apr 24 04:12:36.348837 (XEN) Notifying guest 0:92 (virq 1, port 0) Apr 24 04:12:36.360827 (XEN) Notifying guest 0:93 (virq 1, port 0) Apr 24 04:12:36.360878 (XEN) Notifying guest 0:94 (virq 1, port 0) Apr 24 04:12:36.360923 (XEN) Notifying guest 0:95 (virq 1, port 0) Apr 24 04:12:36.372742 Apr 24 04:12:42.892498 (XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input) Apr 24 04:12:42.916939 Apr 24 04:12:42.918324