Apr 24 21:18:34.331157 (XEN) 0000000000000033 0000000000000000 0000000000000000 0000000000010003 Apr 24 21:18:34.340827 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.340890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.352820 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.364819 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.364880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.376852 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.376914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.388855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.388916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.400844 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.400905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.412838 (XEN) Xen call trace: Apr 24 21:18:34.412909 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:34.424858 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:34.424921 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:34.436854 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:34.436913 (XEN) Apr 24 21:18:34.436970 (XEN) *** Dumping CPU52 host state: *** Apr 24 21:18:34.437017 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:34.448840 (XEN) CPU: 52 Apr 24 21:18:34.448895 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:34.460828 (XEN) LR: 00000a0000276fcc Apr 24 21:18:34.460908 (XEN) SP: 0000800fffd7fe60 Apr 24 21:18:34.460954 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:34.472822 (XEN) X0: 0000000000000000 X1: 0000760fffaac000 X2: 0000800fffdec078 Apr 24 21:18:34.472886 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:34.484860 (XEN) X6: 00000a00003825c8 X7: 0000800f1e265d90 X8: 0000000000000012 Apr 24 21:18:34.484948 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:34.496859 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:34.496921 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:34.508812 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000034 Apr 24 21:18:34.508874 (XEN) X21: 00000a0000346e80 X22: 0000000000100000 X23: 0000000000000034 Apr 24 21:18:34.520823 (XEN) X24: 0000000000000034 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:34.532818 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd7fe60 Apr 24 21:18:34.532882 (XEN) Apr 24 21:18:34.532922 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:34.532966 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:34.544885 (XEN) Apr 24 21:18:34.544954 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:34.545000 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:34.545044 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:34.556755 (XEN) Apr 24 21:18:34.556784 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:34.556820 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:34.556844 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:34.556867 (XEN) Apr 24 21:18:34.556888 (XEN) Xen stack trace from sp=0000800fffd7fe60: Apr 24 21:18:34.568828 (XEN) 0000800fffd7fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:34.568907 (XEN) 0000000000000034 0000000000000000 0000000000000000 0000000000010004 Apr 24 21:18:34.580836 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.580909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.592868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.604906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.604990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.616956 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.617037 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.628835 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.628896 (XEN) 0 Apr 24 21:18:34.634075 000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.640850 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000 Apr 24 21:18:34.643241 000000 Apr 24 21:18:34.652828 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.652890 (XEN) Xen call trace: Apr 24 21:18:34.652932 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:34.664860 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:34.664948 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:34.676854 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:34.676913 (XEN) Apr 24 21:18:34.676952 (XEN) *** Dumping CPU53 host state: *** Apr 24 21:18:34.688862 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:34.688950 (XEN) CPU: 53 Apr 24 21:18:34.688993 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:34.704941 (XEN) LR: 00000a0000276fcc Apr 24 21:18:34.704997 (XEN) SP: 0000800fffd77e60 Apr 24 21:18:34.705040 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:34.705111 (XEN) X0: 0000000000000000 X1: 0000760fffaa8000 X2: 0000800fffde8078 Apr 24 21:18:34.716903 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:34.716965 (XEN) X6: 00000a00003825c8 X7: 0000800fffdeb280 X8: 0000000000000012 Apr 24 21:18:34.728910 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:34.740903 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:34.740989 (XEN) X15: 0000aaaaf4bbf370 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:34.752901 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000035 Apr 24 21:18:34.752964 (XEN) X21: 00000a0000346f00 X22: 0000000000200000 X23: 0000000000000035 Apr 24 21:18:34.764918 (XEN) X24: 0000000000000035 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:34.764980 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd77e60 Apr 24 21:18:34.776916 (XEN) Apr 24 21:18:34.776968 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:34.777012 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:34.777055 (XEN) Apr 24 21:18:34.777092 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:34.788907 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:34.788966 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:34.789011 (XEN) Apr 24 21:18:34.789049 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:34.800912 (XEN) HPFAR_EL2: 0000008010803700 Apr 24 21:18:34.800992 (XEN) FAR_EL2: ffff80000ab70100 Apr 24 21:18:34.801038 (XEN) Apr 24 21:18:34.801077 (XEN) Xen stack trace from sp=0000800fffd77e60: Apr 24 21:18:34.812906 (XEN) 0000800fffd77e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:34.812970 (XEN) 0000000000000035 0000000000000000 0000000000000000 0000000000010005 Apr 24 21:18:34.824905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.824966 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.836897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.836960 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.848900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.848985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.860917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.872911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.872973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.884906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.884989 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:34.896911 (XEN) Xen call trace: Apr 24 21:18:34.896966 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:34.908908 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:34.908973 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:34.920904 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:34.920987 (XEN) Apr 24 21:18:34.921028 (XEN) *** Dumping CPU54 host state: *** Apr 24 21:18:34.921072 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:34.932906 (XEN) CPU: 54 Apr 24 21:18:34.932960 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:34.933034 (XEN) LR: 00000a0000276fcc Apr 24 21:18:34.944909 (XEN) SP: 0000800fffd67e60 Apr 24 21:18:34.944966 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:34.945016 (XEN) X0: 0000000000000000 X1: 0000760fffa2e000 X2: 0000800fffd6e078 Apr 24 21:18:34.956922 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:34.957007 (XEN) X6: 00000a00003825c8 X7: 0000800fffdeb740 X8: 0000000000000012 Apr 24 21:18:34.968917 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:34.980906 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:34.980969 (XEN) X15: ffff00002733b30c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:34.992911 (XEN) X18: ffff80000ccb3c58 X19: 00000a00003825cc X20: 0000000000000036 Apr 24 21:18:34.992997 (XEN) X21: 00000a0000346f80 X22: 0000000000400000 X23: 0000000000000036 Apr 24 21:18:35.004911 (XEN) X24: 0000000000000036 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:35.004974 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd67e60 Apr 24 21:18:35.016918 (XEN) Apr 24 21:18:35.016971 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:35.017039 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:35.017082 (XEN) Apr 24 21:18:35.028909 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:35.028967 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:35.029012 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:35.029080 (XEN) Apr 24 21:18:35.029119 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:35.040910 (XEN) HPFAR_EL2: 0000008010804300 Apr 24 21:18:35.040968 (XEN) FAR_EL2: ffff80000ac30100 Apr 24 21:18:35.041012 (XEN) Apr 24 21:18:35.041074 (XEN) Xen stack trace from sp=0000800fffd67e60: Apr 24 21:18:35.052912 (XEN) 0000800fffd67e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:35.052976 (XEN) 0000000000000036 0000000000000000 0000000000000000 0000000000010006 Apr 24 21:18:35.064900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.064962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.076907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.076969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.088926 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.100903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.100965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.112911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.112974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.124915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.124978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.136886 (XEN) Xen call trace: Apr 24 21:18:35.136965 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:35.148909 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:35.148974 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:35.160911 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:35.160969 (XEN) Apr 24 21:18:35.161010 (XEN) *** Dumping CPU55 host state: *** Apr 24 21:18:35.161053 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:35.172918 (XEN) CPU: 55 Apr 24 21:18:35.172996 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:35.173050 (XEN) LR: 00000a0000276fcc Apr 24 21:18:35.184908 (XEN) SP: 0000800fffcffe60 Apr 24 21:18:35.184964 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:35.185015 (XEN) X0: 0000000000000000 X1: 0000760fffa2a000 X2: 0000800fffd6a078 Apr 24 21:18:35.196898 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:35.208906 (XEN) X6: 00000a00003825c8 X7: 0000800fffdebc00 X8: 0000000000000012 Apr 24 21:18:35.208971 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:35.220910 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:35.220973 (XEN) X15: ffff00002756f50c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:35.232917 (XEN) X18: ffff80000b60bc58 X19: 00000a00003825cc X20: 0000000000000037 Apr 24 21:18:35.232980 (XEN) X21: 00000a0000347000 X22: 0000000000800000 X23: 0000000000000037 Apr 24 21:18:35.244912 (XEN) X24: 0000000000000037 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:35.244975 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffcffe60 Apr 24 21:18:35.256919 (XEN) Apr 24 21:18:35.256996 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:35.257043 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:35.268901 (XEN) Apr 24 21:18:35.268955 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:35.269001 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:35.269068 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:35.269113 (XEN) Apr 24 21:18:35.269151 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:35.280909 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:35.280967 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:35.281035 (XEN) Apr 24 21:18:35.281076 (XEN) Xen stack trace from sp=0000800fffcffe60: Apr 24 21:18:35.292900 (XEN) 0000800fffcffe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:35.292964 (XEN) 0000000000000037 0000000000000000 0000000000000000 0000000000010007 Apr 24 21:18:35.304916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.304978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.316906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.316969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.328918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.340972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.341054 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.352909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.352972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.364916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.364980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.376913 (XEN) Xen call trace: Apr 24 21:18:35.376969 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:35.388912 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:35.388978 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:35.400911 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:35.400970 (XEN) Apr 24 21:18:35.401010 (XEN) *** Dumping CPU56 host state: *** Apr 24 21:18:35.401054 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:35.412916 (XEN) CPU: 56 Apr 24 21:18:35.412971 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:35.424906 (XEN) LR: 00000a0000276fcc Apr 24 21:18:35.424963 (XEN) SP: 0000800fffcefe60 Apr 24 21:18:35.425006 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:35.425055 (XEN) X0: 0000000000000000 X1: 0000760fffa28000 X2: 0000800fffd68078 Apr 24 21:18:35.436925 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:35.448902 (XEN) X6: 00000a00003825c8 X7: 0000800fffcf6150 X8: 0000000000000012 Apr 24 21:18:35.448965 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 21:18:35.460921 (XEN) X12: 0000000000000002 X13: 0000000000000000 X14: 0000000000000000 Apr 24 21:18:35.460983 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:35.472915 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 0000000000000038 Apr 24 21:18:35.472978 (XEN) X21: 00000a0000347080 X22: 0000000001000000 X23: 0000000000000038 Apr 24 21:18:35.484917 (XEN) X24: 0000000000000038 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:35.496908 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffcefe60 Apr 24 21:18:35.496973 (XEN) Apr 24 21:18:35.497013 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:35.497056 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:35.508853 (XEN) Apr 24 21:18:35.508904 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:35.508948 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:35.508990 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:35.509032 (XEN) Apr 24 21:18:35.520895 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:35.520952 (XEN) HPFAR_EL2: 0000008010805b00 Apr 24 21:18:35.520996 (XEN) FAR_EL2: ffff80000adb0100 Apr 24 21:18:35.521038 (XEN) Apr 24 21:18:35.521075 (XEN) Xen stack trace from sp=0000800fffcefe60: Apr 24 21:18:35.532857 (XEN) 0000800fffcefe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:35.532891 (XEN) 0000000000000038 0000000000000000 0000000000000000 0000000000010008 Apr 24 21:18:35.544903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.544965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.556912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.568903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.568964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.580909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.580971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.592913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.592995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.604914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.616902 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.616965 (XEN) Xen call trace: Apr 24 21:18:35.617008 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:35.628908 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:35.628971 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:35.640909 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:35.640968 (XEN) Apr 24 21:18:35.641008 (XEN) *** Dumping CPU57 host state: *** Apr 24 21:18:35.641052 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:35.652919 (XEN) CPU: 57 Apr 24 21:18:35.652973 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:35.664904 (XEN) LR: 00000a0000276fcc Apr 24 21:18:35.664961 (XEN) SP: 0000800fffce7e60 Apr 24 21:18:35.665004 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:35.676904 (XEN) X0: 0000000000000000 X1: 0000760fff9b4000 X2: 0000800fffcf4078 Apr 24 21:18:35.676968 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:35.688907 (XEN) X6: 00000a00003825c8 X7: 0000800fffcf6590 X8: 0000000000000012 Apr 24 21:18:35.688970 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 21:18:35.700907 (XEN) X12: 0000000000000001 X13: 00000000000002be X14: 00000000000002be Apr 24 21:18:35.700969 (XEN) X15: ffff00002a0d910c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:35.712928 (XEN) X18: ffff80000cddbc58 X19: 00000a00003825cc X20: 0000000000000039 Apr 24 21:18:35.712990 (XEN) X21: 00000a0000347100 X22: 0000000002000000 X23: 0000000000000039 Apr 24 21:18:35.724917 (XEN) X24: 0000000000000039 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:35.736908 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffce7e60 Apr 24 21:18:35.736971 (XEN) Apr 24 21:18:35.737011 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:35.737053 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:35.748908 (XEN) Apr 24 21:18:35.748961 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:35.749005 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:35.749047 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:35.760918 (XEN) Apr 24 21:18:35.760971 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:35.761014 (XEN) HPFAR_EL2: 0000009010800700 Apr 24 21:18:35.761057 (XEN) FAR_EL2: ffff80000b070100 Apr 24 21:18:35.761099 (XEN) Apr 24 21:18:35.761136 (XEN) Xen stack trace from sp=0000800fffce7e60: Apr 24 21:18:35.772916 (XEN) 0000800fffce7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:35.772979 (XEN) 0000000000000039 0000000000000000 0000000000000000 0000000000010009 Apr 24 21:18:35.784908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.784970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.796919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.808903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.808965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.820916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.820978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.832896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.832958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.844916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.856924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:35.856987 (XEN) Xen call trace: Apr 24 21:18:35.857030 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:35.868911 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:35.868976 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:35.880913 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:35.880971 (XEN) Apr 24 21:18:35.881011 (XEN) *** Dumping CPU58 host state: *** Apr 24 21:18:35.892898 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:35.892961 (XEN) CPU: 58 Apr 24 21:18:35.893003 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:35.904912 (XEN) LR: 00000a0000276fcc Apr 24 21:18:35.904969 (XEN) SP: 0000800fffc7fe60 Apr 24 21:18:35.905012 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:35.916909 (XEN) X0: 0000000000000000 X1: 0000760fff9b0000 X2: 0000800fffcf0078 Apr 24 21:18:35.916972 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:35.928901 (XEN) X6: 00000a00003825c8 X7: 0000800fffcf6a50 X8: 0000000000000012 Apr 24 21:18:35.928964 (XEN) X9: 0000000000000000 X10: ffff800009d8ac08 X11: 000000000000012f Apr 24 21:18:35.940918 (XEN) X12: 000000000000038d X13: ffff800009d32c08 X14: 0000000000000000 Apr 24 21:18:35.940981 (XEN) X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 21:18:35.952925 (XEN) X18: 0000000000000006 X19: 00000a00003825cc X20: 000000000000003a Apr 24 21:18:35.964910 (XEN) X21: 00000a0000347180 X22: 0000000004000000 X23: 000000000000003a Apr 24 21:18:35.964972 (XEN) X24: 000000000000003a X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:35.976902 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc7fe60 Apr 24 21:18:35.976964 (XEN) Apr 24 21:18:35.977004 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:35.988906 (XEN) VTTBR_EL2: 00020107202ad000 Apr 24 21:18:35.988963 (XEN) Apr 24 21:18:35.989003 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:35.989046 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:35.989088 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:36.000903 (XEN) Apr 24 21:18:36.000956 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 21:18:36.001000 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:36.001043 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:36.001085 (XEN) Apr 24 21:18:36.012914 (XEN) Xen stack trace from sp=0000800fffc7fe60: Apr 24 21:18:36.012974 (XEN) 0000800fffc7fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:36.013025 (XEN) 000000000000003a 0000000000000000 0000000000000000 000000000001000a Apr 24 21:18:36.024858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.036905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.036967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.048904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.048966 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.060911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.060973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.072917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.084908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.084970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.096911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.096973 (XEN) Xen call trace: Apr 24 21:18:36.097035 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:36.108920 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:36.108984 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:36.120913 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:36.120971 (XEN) Apr 24 21:18:36.121010 (XEN) *** Dumping CPU59 host state: *** Apr 24 21:18:36.132911 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:36.132973 (XEN) CPU: 59 Apr 24 21:18:36.133014 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:36.144915 (XEN) LR: 00000a0000276fcc Apr 24 21:18:36.144971 (XEN) SP: 0000800fffc6fe60 Apr 24 21:18:36.145014 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:36.156912 (XEN) X0: 0000000000000000 X1: 0000760fff936000 X2: 0000800fffc76078 Apr 24 21:18:36.156975 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:36.168911 (XEN) X6: 00000a00003825c8 X7: 0000800fffc74010 X8: 0000000000000012 Apr 24 21:18:36.168974 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:36.180917 (XEN) X12: 0000000000000001 X13: 000000000000001e X14: 000000000000001e Apr 24 21:18:36.180979 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:36.192920 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000003b Apr 24 21:18:36.204925 (XEN) X21: 00000a0000347200 X22: 0000000008000000 X23: 000000000000003b Apr 24 21:18:36.204997 (XEN) X24: 000000000000003b X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:36.216885 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc6fe60 Apr 24 21:18:36.216948 (XEN) Apr 24 21:18:36.216988 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:36.228875 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:36.228932 (XEN) Apr 24 21:18:36.228971 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:36.229013 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:36.229055 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:36.240928 (XEN) Apr 24 21:18:36.240980 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:36.241024 (XEN) HPFAR_EL2: 0000009010801f00 Apr 24 21:18:36.241066 (XEN) FAR_EL2: ffff80000b1f0100 Apr 24 21:18:36.252901 (XEN) Apr 24 21:18:36.252953 (XEN) Xen stack trace from sp=0000800fffc6fe60: Apr 24 21:18:36.253000 (XEN) 0000800fffc6fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:36.264904 (XEN) 000000000000003b 0000000000000000 0000000000000000 000000000001000b Apr 24 21:18:36.264959 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.276899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.276960 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.288895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.288957 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.300923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.300956 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.312765 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.324852 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.324913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.336885 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.336947 (XEN) Xen call trace: Apr 24 21:18:36.336989 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:36.348905 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:36.360913 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:36.360976 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:36.361022 (XEN) Apr 24 21:18:36.361060 (XEN) *** Dumping CPU60 host state: *** Apr 24 21:18:36.372891 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:36.372954 (XEN) CPU: 60 Apr 24 21:18:36.372995 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:36.384905 (XEN) LR: 00000a0000276fcc Apr 24 21:18:36.384962 (XEN) SP: 0000800fffc67e60 Apr 24 21:18:36.385005 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:36.396904 (XEN) X0: 0000000000000000 X1: 0000760fff932000 X2: 0000800fffc72078 Apr 24 21:18:36.396967 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:36.408875 (XEN) X6: 00000a00003825c8 X7: 0000800fffc74410 X8: 0000000000000012 Apr 24 21:18:36.408939 (XEN) X9: 0000000000000000 X10: ffff800009d8ac08 X11: 000000000000012f Apr 24 21:18:36.420879 (XEN) X12: 000000000000038d X13: ffff800009d32c08 X14: 0000000000000000 Apr 24 21:18:36.432834 (XEN) X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 21:18:36.432895 (XEN) X18: 0000000000000006 X19: 00000a00003825cc X20: 000000000000003c Apr 24 21:18:36.444882 (XEN) X21: 00000a0000347280 X22: 0000000010000000 X23: 000000000000003c Apr 24 21:18:36.444944 (XEN) X24: 000000000000003c X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:36.460958 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc67e60 Apr 24 21:18:36.461021 (XEN) Apr 24 21:18:36.461061 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:36.461104 (XEN) VTTBR_EL2: 000201072212e000 Apr 24 21:18:36.472907 (XEN) Apr 24 21:18:36.472960 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:36.473004 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:36.473047 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:36.473089 (XEN) Apr 24 21:18:36.473127 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 21:18:36.484921 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:36.484978 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:36.485021 (XEN) Apr 24 21:18:36.485060 (XEN) Xen stack trace from sp=0000800fffc67e60: Apr 24 21:18:36.496903 (XEN) 0000800fffc67e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:36.496966 (XEN) 000000000000003c 0000000000000000 0000000000000000 000000000001000c Apr 24 21:18:36.508871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.508931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.520783 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.532866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.532931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.544821 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.544882 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.556823 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.556883 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.568883 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.568945 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.580896 (XEN) Xen call trace: Apr 24 21:18:36.580952 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:36.592844 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:36.592908 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:36.604893 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:36.604970 (XEN) Apr 24 21:18:36.605021 (XEN) *** Dumping CPU61 host state: *** Apr 24 21:18:36.605068 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:36.616869 (XEN) CPU: 61 Apr 24 21:18:36.616923 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/ Apr 24 21:18:36.622263 0x194 Apr 24 21:18:36.628849 (XEN) LR: 00000a0000276fcc Apr 24 21:18:36.628906 (XEN) SP: 0000800fffc17e60 Apr 24 21:18:36.628950 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler Apr 24 21:18:36.631250 ) Apr 24 21:18:36.640827 (XEN) X0: 0000000000000000 X1: 0000760fff8de000 X2: 0000800fffc1e078 Apr 24 21:18:36.640888 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:36.652887 (XEN) X6: 00000a00003825c8 X7: 0000800fffc748d0 X8: 0000000000000012 Apr 24 21:18:36.652950 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:36.664864 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:36.664926 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:36.676903 (XEN) X18: 0000000000000000 X19: 00000a00003825cc X20: 000000000000003d Apr 24 21:18:36.676966 (XEN) X21: 00000a0000347300 X22: 0000000020000000 X23: 000000000000003d Apr 24 21:18:36.688909 (XEN) X24: 000000000000003d X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:36.700904 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc17e60 Apr 24 21:18:36.700967 (XEN) Apr 24 21:18:36.701006 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:36.701049 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:36.712917 (XEN) Apr 24 21:18:36.712969 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:36.713013 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:36.713055 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:36.724908 (XEN) Apr 24 21:18:36.724962 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:36.725006 (XEN) HPFAR_EL2: 0000009010803700 Apr 24 21:18:36.725049 (XEN) FAR_EL2: ffff80000b370100 Apr 24 21:18:36.725091 (XEN) Apr 24 21:18:36.725128 (XEN) Xen stack trace from sp=0000800fffc17e60: Apr 24 21:18:36.736909 (XEN) 0000800fffc17e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:36.736972 (XEN) 000000000000003d 0000000000000000 0000000000000000 000000000001000d Apr 24 21:18:36.748905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.748967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.760928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.772898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.772961 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.784907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.784968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.796916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.796978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.808915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.820897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:36.820959 (XEN) Xen call trace: Apr 24 21:18:36.821002 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:36.832913 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:36.832977 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:36.844914 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:36.844972 (XEN) Apr 24 21:18:36.845012 (XEN) *** Dumping CPU62 host state: *** Apr 24 21:18:36.845075 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:36.856925 (XEN) CPU: 62 Apr 24 21:18:36.856979 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:36.868901 (XEN) LR: 00000a0000276fcc Apr 24 21:18:36.868957 (XEN) SP: 0000800fffc0fe60 Apr 24 21:18:36.869000 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:36.880911 (XEN) X0: 0000000000000000 X1: 0000760fff8dc000 X2: 0000800fffc1c078 Apr 24 21:18:36.880974 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:36.892908 (XEN) X6: 00000a00003825c8 X7: 0000800fffc74d90 X8: 0000000000000012 Apr 24 21:18:36.892970 (XEN) X9: 0000000000000000 X10: ffff800009d8ac08 X11: 000000000000012f Apr 24 21:18:36.904917 (XEN) X12: 000000000000038d X13: ffff800009d32c08 X14: 0000000000000000 Apr 24 21:18:36.904979 (XEN) X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 21:18:36.916915 (XEN) X18: 0000000000000006 X19: 00000a00003825cc X20: 000000000000003e Apr 24 21:18:36.916977 (XEN) X21: 00000a0000347380 X22: 0000000040000000 X23: 000000000000003e Apr 24 21:18:36.928907 (XEN) X24: 000000000000003e X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:36.940917 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc0fe60 Apr 24 21:18:36.940980 (XEN) Apr 24 21:18:36.941020 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:36.941063 (XEN) VTTBR_EL2: 00020107202aa000 Apr 24 21:18:36.952948 (XEN) Apr 24 21:18:36.953002 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:36.953047 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:36.953090 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:36.964902 (XEN) Apr 24 21:18:36.964955 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 21:18:36.965000 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:36.965043 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:36.965085 (XEN) Apr 24 21:18:36.965122 (XEN) Xen stack trace from sp=0000800fffc0fe60: Apr 24 21:18:36.976916 (XEN) 0000800fffc0fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:36.976979 (XEN) 000000000000003e 0000000000000000 0000000000000000 000000000001000e Apr 24 21:18:36.988917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.000907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.000969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.012931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.012993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.024903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.024965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.036920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.036981 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.048920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.060909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.060971 (XEN) Xen call trace: Apr 24 21:18:37.061014 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:37.072914 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:37.072978 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:37.084916 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:37.084976 (XEN) Apr 24 21:18:37.085015 (XEN) *** Dumping CPU63 host state: *** Apr 24 21:18:37.096911 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:37.096974 (XEN) CPU: 63 Apr 24 21:18:37.097016 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:37.108922 (XEN) LR: 00000a0000276fcc Apr 24 21:18:37.108980 (XEN) SP: 0000800ffdf9fe60 Apr 24 21:18:37.109023 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:37.120917 (XEN) X0: 0000000000000000 X1: 0000760fff8d8000 X2: 0000800fffc18078 Apr 24 21:18:37.120980 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:37.132879 (XEN) X6: 00000a00003825c8 X7: 0000800fffc1a280 X8: 0000000000000012 Apr 24 21:18:37.132935 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:37.144871 (XEN) X12: 0000000000000001 X13: 0000000000000383 X14: 0000000000000383 Apr 24 21:18:37.144926 (XEN) X15: ffff000028786f0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:37.156879 (XEN) X18: ffff80000decbc58 X19: 00000a00003825cc X20: 000000000000003f Apr 24 21:18:37.168862 (XEN) X21: 00000a0000347400 X22: 0000000080000000 X23: 000000000000003f Apr 24 21:18:37.168917 (XEN) X24: 000000000000003f X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:37.180867 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf9fe60 Apr 24 21:18:37.180922 (XEN) Apr 24 21:18:37.180963 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:37.192861 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:37.192911 (XEN) Apr 24 21:18:37.192950 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:37.192992 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:37.193034 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:37.204871 (XEN) Apr 24 21:18:37.204918 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:37.204961 (XEN) HPFAR_EL2: 0000009010804f00 Apr 24 21:18:37.205004 (XEN) FAR_EL2: ffff80000b4f0100 Apr 24 21:18:37.205048 (XEN) Apr 24 21:18:37.216871 (XEN) Xen stack trace from sp=0000800ffdf9fe60: Apr 24 21:18:37.216922 (XEN) 0000800ffdf9fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:37.216972 (XEN) 000000000000003f 0000000000000000 0000000000000000 000000000001000f Apr 24 21:18:37.228876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.240869 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.240923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.252900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.252961 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.264919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.264980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.276898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.288871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.288927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.300862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.300915 (XEN) Xen call trace: Apr 24 21:18:37.300957 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:37.312913 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:37.324899 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:37.324964 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:37.325011 (XEN) Apr 24 21:18:37.325050 (XEN) *** Dumping CPU64 host state: *** Apr 24 21:18:37.336900 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:37.336963 (XEN) CPU: 64 Apr 24 21:18:37.337004 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:37.348905 (XEN) LR: 00000a0000276fcc Apr 24 21:18:37.348962 (XEN) SP: 0000800ffdf97e60 Apr 24 21:18:37.349006 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:37.360929 (XEN) X0: 0000000000000000 X1: 0000760fff8c4000 X2: 0000800fffc04078 Apr 24 21:18:37.360993 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:37.372910 (XEN) X6: 00000a00003825c8 X7: 0000800fffc1a740 X8: 0000000000000012 Apr 24 21:18:37.372973 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:37.384910 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:37.396899 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:37.396963 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000040 Apr 24 21:18:37.408900 (XEN) X21: 00000a0000347480 X22: 0000000000000001 X23: 0000000000000040 Apr 24 21:18:37.408963 (XEN) X24: 0000000000000040 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:37.420909 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf97e60 Apr 24 21:18:37.420972 (XEN) Apr 24 21:18:37.421012 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:37.432900 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:37.432957 (XEN) Apr 24 21:18:37.432996 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:37.433039 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:37.433081 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:37.444898 (XEN) Apr 24 21:18:37.444951 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:37.445021 (XEN) HPFAR_EL2: 0000009010805d00 Apr 24 21:18:37.445089 (XEN) FAR_EL2: ffff80000b5d0100 Apr 24 21:18:37.456873 (XEN) Apr 24 21:18:37.456940 (XEN) Xen stack trace from sp=0000800ffdf97e60: Apr 24 21:18:37.457010 (XEN) 0000800ffdf97e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:37.468867 (XEN) 0000000000000040 0000000000000000 0000000000000000 0000000000010100 Apr 24 21:18:37.468922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.480860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.480913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.492861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.492914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.504862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.504915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.516928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.528914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.528975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.540910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.540972 (XEN) Xen call trace: Apr 24 21:18:37.541013 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:37.552919 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:37.564904 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:37.564966 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:37.565011 (XEN) Apr 24 21:18:37.565049 (XEN) *** Dumping CPU65 host state: *** Apr 24 21:18:37.576913 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:37.576975 (XEN) CPU: 65 Apr 24 21:18:37.577016 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:37.588913 (XEN) LR: 00000a0000276fcc Apr 24 21:18:37.588969 (XEN) SP: 0000800ffdf8fe60 Apr 24 21:18:37.589012 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:37.600915 (XEN) X0: 0000000000000000 X1: 0000760fff8c2000 X2: 0000800fffc02078 Apr 24 21:18:37.600978 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:37.612932 (XEN) X6: 00000a00003825c8 X7: 0000800fffc1ac00 X8: 0000000000000012 Apr 24 21:18:37.612995 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:37.624918 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:37.636904 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: ffff800009f15538 Apr 24 21:18:37.636967 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000041 Apr 24 21:18:37.648905 (XEN) X21: 00000a0000347500 X22: 0000000000000002 X23: 0000000000000041 Apr 24 21:18:37.648967 (XEN) X24: 0000000000000041 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:37.660913 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf8fe60 Apr 24 21:18:37.660976 (XEN) Apr 24 21:18:37.661015 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:37.672906 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:37.672963 (XEN) Apr 24 21:18:37.673002 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:37.673044 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:37.684906 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:37.684964 (XEN) Apr 24 21:18:37.685003 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:37.685045 (XEN) HPFAR_EL2: 0000008010800900 Apr 24 21:18:37.685088 (XEN) FAR_EL2: ffff80000a890100 Apr 24 21:18:37.696878 (XEN) Apr 24 21:18:37.696907 (XEN) Xen stack trace from sp=0000800ffdf8fe60: Apr 24 21:18:37.696933 (XEN) 0000800ffdf8fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:37.708882 (XEN) 0000000000000041 0000000000000000 0000000000000000 0000000000010101 Apr 24 21:18:37.708937 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.720870 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.720924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.732876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.732930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.744874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.756876 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.756931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.768868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.768922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.780868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.780923 (XEN) Xen call trace: Apr 24 21:18:37.792903 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:37.792968 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:37.804913 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:37.804975 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:37.805020 (XEN) Apr 24 21:18:37.805057 (XEN) *** Dumping CPU66 host state: *** Apr 24 21:18:37.816916 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:37.816978 (XEN) CPU: 66 Apr 24 21:18:37.817019 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:37.828917 (XEN) LR: 00000a0000276fcc Apr 24 21:18:37.828974 (XEN) SP: 0000800ffdf1fe60 Apr 24 21:18:37.829016 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:37.840911 (XEN) X0: 0000000000000000 X1: 0000760ffdc46000 X2: 0000800ffdf86078 Apr 24 21:18:37.840974 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:37.852899 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf85150 X8: 0000000000000012 Apr 24 21:18:37.864903 (XEN) X9: 0000000000000000 X10: ffff800009d8ac08 X11: 000000000000012f Apr 24 21:18:37.864982 (XEN) X12: 000000000000038d X13: ffff800009d32c08 X14: 0000000000000000 Apr 24 21:18:37.876903 (XEN) X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 21:18:37.876966 (XEN) X18: 0000000000000006 X19: 00000a00003825d0 X20: 0000000000000042 Apr 24 21:18:37.888905 (XEN) X21: 00000a0000347580 X22: 0000000000000004 X23: 0000000000000042 Apr 24 21:18:37.888967 (XEN) X24: 0000000000000042 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:37.900917 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf1fe60 Apr 24 21:18:37.901003 (XEN) Apr 24 21:18:37.912847 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:37.912900 (XEN) VTTBR_EL2: 0002010720298000 Apr 24 21:18:37.912943 (XEN) Apr 24 21:18:37.912984 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:37.913053 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:37.924891 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:37.924965 (XEN) Apr 24 21:18:37.925025 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 21:18:37.925074 (XEN) HPFAR_EL2: 0000008010801500 Apr 24 21:18:37.925125 (XEN) FAR_EL2: ffff80000a950100 Apr 24 21:18:37.936869 (XEN) Apr 24 21:18:37.936922 (XEN) Xen stack trace from sp=0000800ffdf1fe60: Apr 24 21:18:37.936968 (XEN) 0000800ffdf1fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:37.948864 (XEN) 0000000000000042 0000000000000000 0000000000000000 0000000000010102 Apr 24 21:18:37.948920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.960847 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.960902 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.972845 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.984842 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.984896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.996843 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:37.996897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.008840 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.008895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.020890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.020944 (XEN) Xen call trace: Apr 24 21:18:38.032877 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:38.032935 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:38.044902 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:38.044981 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:38.045043 (XEN) Apr 24 21:18:38.056904 (XEN) *** Dumping CPU67 host state: *** Apr 24 21:18:38.056964 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:38.057013 (XEN) CPU: 67 Apr 24 21:18:38.057053 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:38.068956 (XEN) LR: 00000a0000276fcc Apr 24 21:18:38.069013 (XEN) SP: 0000800ffdf17e60 Apr 24 21:18:38.069057 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:38.080884 (XEN) X0: 0000000000000000 X1: 0000760ffdc42000 X2: 0000800ffdf82078 Apr 24 21:18:38.092859 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:38.092915 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf85590 X8: 0000000000000012 Apr 24 21:18:38.104867 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:38.104921 (XEN) X12: 0000000000000001 X13: 0000000000000346 X14: 0000000000000346 Apr 24 21:18:38.116922 (XEN) X15: fffffc0000f01980 X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:38.116986 (XEN) X18: ffff80000cf03c58 X19: 00000a00003825d0 X20: 0000000000000043 Apr 24 21:18:38.128917 (XEN) X21: 00000a0000347600 X22: 0000000000000008 X23: 0000000000000043 Apr 24 21:18:38.128980 (XEN) X24: 0000000000000043 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:38.140911 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf17e60 Apr 24 21:18:38.152904 (XEN) Apr 24 21:18:38.152957 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:38.153001 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:38.153045 (XEN) Apr 24 21:18:38.153082 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:38.153124 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:38.164907 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:38.164964 (XEN) Apr 24 21:18:38.165003 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:38.165046 (XEN) HPFAR_EL2: 0000008010802100 Apr 24 21:18:38.176906 (XEN) FAR_EL2: ffff80000aa10100 Apr 24 21:18:38.176963 (XEN) Apr 24 21:18:38.177003 (XEN) Xen stack trace from sp=0000800ffdf17e60: Apr 24 21:18:38.177048 (XEN) 0000800ffdf17e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:38.188909 (XEN) 0000000000000043 0000000000000000 0000000000000000 0000000000010103 Apr 24 21:18:38.188971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.200920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.200982 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.212918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.224909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.224970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.236912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.236974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.248907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.248969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.260920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.272898 (XEN) Xen call trace: Apr 24 21:18:38.272954 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:38.273005 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:38.284905 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:38.284967 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:38.296906 (XEN) Apr 24 21:18:38.296959 (XEN) *** Dumping CPU68 host state: *** Apr 24 21:18:38.297004 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:38.297052 (XEN) CPU: 68 Apr 24 21:18:38.308901 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:38.308965 (XEN) LR: 00000a0000276fcc Apr 24 21:18:38.309009 (XEN) SP: 0000800ffdf07e60 Apr 24 21:18:38.320895 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:38.320960 (XEN) X0: 0000000000000000 X1: 0000760ffdc40000 X2: 0000800ffdf80078 Apr 24 21:18:38.332839 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:38.332896 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf85a50 X8: 0000000000000012 Apr 24 21:18:38.344898 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:38.344960 (XEN) X12: 004341002c5e16da X13: 000010cfc28a9d2c X14: 0000000000000000 Apr 24 21:18:38.356905 (XEN) X15: 0000aaaaf04bcca0 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:38.356968 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000044 Apr 24 21:18:38.368932 (XEN) X21: 00000a0000347680 X22: 0000000000000010 X23: 0000000000000044 Apr 24 21:18:38.368996 (XEN) X24: 0000000000000044 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:38.380911 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf07e60 Apr 24 21:18:38.392902 (XEN) Apr 24 21:18:38.392955 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:38.392999 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:38.393041 (XEN) Apr 24 21:18:38.393079 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:38.393121 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:38.404856 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:38.404913 (XEN) Apr 24 21:18:38.404952 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:38.404993 (XEN) HPFAR_EL2: 0000008010000200 Apr 24 21:18:38.448691 (XEN) FAR_EL2: ffff80000a380090 Apr 24 21:18:38.448769 (XEN) Apr 24 21:18:38.448811 (XEN) Xen stack trace from sp=0000800ffdf07e60: Apr 24 21:18:38.448857 (XEN) 0000800ffdf07e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:38.448966 (XEN) 0000000000000044 0000000000000000 0000000000000000 0000000000010104 Apr 24 21:18:38.449016 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.449063 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.449110 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.456857 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.456921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.468883 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.468946 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.480950 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.492901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.492964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.504947 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.505009 (XEN) Xen call trace: Apr 24 21:18:38.505051 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:38.516870 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:38.532849 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:38.532915 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:38.532961 (XEN) Apr 24 21:18:38.533000 (XEN) *** Dumping CPU69 host state: *** Apr 24 21:18:38.533044 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:38.548869 (XEN) CPU: 69 Apr 24 21:18:38.548923 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:38.548975 (XEN) LR: 00000a0000276fcc Apr 24 21:18:38.549018 (XEN) SP: 0000800ffde9fe60 Apr 24 21:18:38.564838 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:38.564898 (XEN) X0: 0000000000000000 X1: 0000760ffdbcc000 X2: 0000800ffdf0c078 Apr 24 21:18:38.564948 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:38.580922 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0b010 X8: 0000000000000012 Apr 24 21:18:38.580985 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:38.592888 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:38.592952 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:38.604899 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000045 Apr 24 21:18:38.604962 (XEN) X21: 00000a0000347700 X22: 0000000000000020 X23: 0000000000000045 Apr 24 21:18:38.616853 (XEN) X24: 0000000000000045 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:38.616937 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde9fe60 Apr 24 21:18:38.628858 (XEN) Apr 24 21:18:38.628918 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:38.628964 (XEN) VTTBR_EL2: 0001010 Apr 24 21:18:38.632889 7fb649000 Apr 24 21:18:38.640913 (XEN) Apr 24 21:18:38.640971 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:38.641028 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:38.641051 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:38.641074 (XEN) Apr 24 21:18:38.641095 (XE Apr 24 21:18:38.643012 N) ESR_EL2: 0000000007e00000 Apr 24 21:18:38.652777 (XEN) HPFAR_EL2: 0000008010803900 Apr 24 21:18:38.652807 (XEN) FAR_EL2: ffff80000ab90100 Apr 24 21:18:38.652831 (XEN) Apr 24 21:18:38.652869 (XEN) Xen stack trace from sp=0000800ffde9fe60: Apr 24 21:18:38.664894 (XEN) 0000800ffde9fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:38.664955 (XEN) 0000000000000045 0000000000000000 0000000000000000 0000000000010105 Apr 24 21:18:38.676815 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.676879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.688826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.688881 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.700826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.712826 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.712880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.724830 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.724882 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.736824 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.736878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.748919 (XEN) Xen call trace: Apr 24 21:18:38.748975 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:38.760922 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:38.760987 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:38.772912 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:38.772971 (XEN) Apr 24 21:18:38.773011 (XEN) *** Dumping CPU70 host state: *** Apr 24 21:18:38.773055 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:38.784914 (XEN) CPU: 70 Apr 24 21:18:38.784969 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:38.796910 (XEN) LR: 00000a0000276fcc Apr 24 21:18:38.796966 (XEN) SP: 0000800ffde97e60 Apr 24 21:18:38.797010 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:38.797059 (XEN) X0: 0000000000000000 X1: 0000760ffdbc8000 X2: 0000800ffdf08078 Apr 24 21:18:38.808920 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:38.820895 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0b410 X8: 0000000000000012 Apr 24 21:18:38.820958 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:38.832909 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:38.832972 (XEN) X15: ffff80000cc03bb0 X16: 0000000000000000 X17: ffff8000337ed000 Apr 24 21:18:38.844924 (XEN) X18: ffffffffffffffff X19: 00000a00003825d0 X20: 0000000000000046 Apr 24 21:18:38.844986 (XEN) X21: 00000a0000347780 X22: 0000000000000040 X23: 0000000000000046 Apr 24 21:18:38.856912 (XEN) X24: 0000000000000046 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:38.868900 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde97e60 Apr 24 21:18:38.868983 (XEN) Apr 24 21:18:38.869026 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:38.869069 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:38.880908 (XEN) Apr 24 21:18:38.880960 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:38.881004 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:38.881047 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:38.881089 (XEN) Apr 24 21:18:38.892903 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:38.892961 (XEN) HPFAR_EL2: 0000008010804500 Apr 24 21:18:38.893006 (XEN) FAR_EL2: ffff80000ac50100 Apr 24 21:18:38.893050 (XEN) Apr 24 21:18:38.893089 (XEN) Xen stack trace from sp=0000800ffde97e60: Apr 24 21:18:38.904910 (XEN) 0000800ffde97e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:38.904973 (XEN) 0000000000000046 0000000000000000 0000000000000000 0000000000010106 Apr 24 21:18:38.916909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.916970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.928914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.940934 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.940997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.952887 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.952948 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.964861 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.964915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.976858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.988853 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:38.988907 (XEN) Xen call trace: Apr 24 21:18:38.988948 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:39.000859 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:39.000915 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:39.012858 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:39.012909 (XEN) Apr 24 21:18:39.012948 (XEN) *** Dumping CPU71 host state: *** Apr 24 21:18:39.012992 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:39.024855 (XEN) CPU: 71 Apr 24 21:18:39.024902 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:39.036862 (XEN) LR: 00000a0000276fcc Apr 24 21:18:39.036910 (XEN) SP: 0000800ffde87e60 Apr 24 21:18:39.036953 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:39.048903 (XEN) X0: 0000000000000000 X1: 0000760ffdb4e000 X2: 0000800ffde8e078 Apr 24 21:18:39.048967 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:39.060903 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0b8d0 X8: 0000000000000012 Apr 24 21:18:39.060966 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:39.072933 (XEN) X12: 0000000000000001 X13: 0000000000000285 X14: 0000000000000285 Apr 24 21:18:39.072996 (XEN) X15: ffff000030ca9c0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:39.084940 (XEN) X18: ffff80000defbc58 X19: 00000a00003825d0 X20: 0000000000000047 Apr 24 21:18:39.085002 (XEN) X21: 00000a0000347800 X22: 0000000000000080 X23: 0000000000000047 Apr 24 21:18:39.096913 (XEN) X24: 0000000000000047 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:39.108909 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde87e60 Apr 24 21:18:39.108972 (XEN) Apr 24 21:18:39.109011 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:39.109054 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:39.120921 (XEN) Apr 24 21:18:39.120975 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:39.121021 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:39.121064 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:39.132852 (XEN) Apr 24 21:18:39.132897 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:39.132939 (XEN) HPFAR_EL2: 0000008010805100 Apr 24 21:18:39.132981 (XEN) FAR_EL2: ffff80000ad10100 Apr 24 21:18:39.133022 (XEN) Apr 24 21:18:39.133059 (XEN) Xen stack trace from sp=0000800ffde87e60: Apr 24 21:18:39.144865 (XEN) 0000800ffde87e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:39.144919 (XEN) 0000000000000047 0000000000000000 0000000000000000 0000000000010107 Apr 24 21:18:39.156863 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.168868 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.168923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.180906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.180969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.192906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.192968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.204917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.204980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.216918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.228903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.228965 (XEN) Xen call trace: Apr 24 21:18:39.229007 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:39.240915 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:39.240979 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:39.252911 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:39.252969 (XEN) Apr 24 21:18:39.253009 (XEN) *** Dumping CPU72 host state: *** Apr 24 21:18:39.264872 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:39.264906 (XEN) CPU: 72 Apr 24 21:18:39.264929 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:39.276917 (XEN) LR: 00000a0000276fcc Apr 24 21:18:39.276974 (XEN) SP: 0000800ffde1fe60 Apr 24 21:18:39.277017 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:39.288917 (XEN) X0: 0000000000000000 X1: 0000760ffdb4a000 X2: 0000800ffde8a078 Apr 24 21:18:39.288980 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:39.300909 (XEN) X6: 00000a00003825c8 X7: 0000800ffdf0bd90 X8: 0000000000000012 Apr 24 21:18:39.300973 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 21:18:39.312914 (XEN) X12: 0000000000000001 X13: 00000000000003ab X14: 00000000000003ab Apr 24 21:18:39.312976 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:39.324921 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000048 Apr 24 21:18:39.336903 (XEN) X21: 00000a0000347880 X22: 0000000000000100 X23: 0000000000000048 Apr 24 21:18:39.336966 (XEN) X24: 0000000000000048 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:39.348906 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde1fe60 Apr 24 21:18:39.348970 (XEN) Apr 24 21:18:39.349010 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:39.360910 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:39.360967 (XEN) Apr 24 21:18:39.361007 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:39.361050 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:39.361092 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:39.372924 (XEN) Apr 24 21:18:39.372977 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:39.373021 (XEN) HPFAR_EL2: 0000008010805d00 Apr 24 21:18:39.373063 (XEN) FAR_EL2: ffff80000add0100 Apr 24 21:18:39.373105 (XEN) Apr 24 21:18:39.384904 (XEN) Xen stack trace from sp=0000800ffde1fe60: Apr 24 21:18:39.384963 (XEN) 0000800ffde1fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:39.385013 (XEN) 0000000000000048 0000000000000000 0000000000000000 0000000000010108 Apr 24 21:18:39.396905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.408905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.408968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.420911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.420973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.432910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.432971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.444898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.456892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.456954 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.468912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.468973 (XEN) Xen call trace: Apr 24 21:18:39.469015 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:39.480935 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:39.480998 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:39.492918 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:39.492976 (XEN) Apr 24 21:18:39.493015 (XEN) *** Dumping CPU73 host state: *** Apr 24 21:18:39.504912 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:39.504974 (XEN) CPU: 73 Apr 24 21:18:39.505015 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:39.516912 (XEN) LR: 00000a0000276fcc Apr 24 21:18:39.516968 (XEN) SP: 0000800ffde0fe60 Apr 24 21:18:39.517011 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:39.528886 (XEN) X0: 0000000000000000 X1: 0000760ffdad6000 X2: 0000800ffde16078 Apr 24 21:18:39.528948 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:39.540926 (XEN) X6: 00000a00003825c8 X7: 0000800ffde89280 X8: 0000000000000012 Apr 24 21:18:39.540990 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:39.552911 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:39.552974 (XEN) X15: 0000000000000001 X16: 0000000000000244 X17: 0000000000000000 Apr 24 21:18:39.564916 (XEN) X18: 0000000000000244 X19: 00000a00003825d0 X20: 0000000000000049 Apr 24 21:18:39.576917 (XEN) X21: 00000a0000347900 X22: 0000000000000200 X23: 0000000000000049 Apr 24 21:18:39.576980 (XEN) X24: 0000000000000049 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:39.588914 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde0fe60 Apr 24 21:18:39.588976 (XEN) Apr 24 21:18:39.589016 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:39.600910 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:39.600968 (XEN) Apr 24 21:18:39.601008 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:39.601050 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:39.601092 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:39.612944 (XEN) Apr 24 21:18:39.612974 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:39.612997 (XEN) HPFAR_EL2: 0000009010800900 Apr 24 21:18:39.613021 (XEN) FAR_EL2: ffff80000b090100 Apr 24 21:18:39.624804 (XEN) Apr 24 21:18:39.624831 (XEN) Xen stack trace from sp=0000800ffde0fe60: Apr 24 21:18:39.624870 (XEN) 0000800ffde0fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:39.636857 (XEN) 0000000000000049 0000000000000000 0000000000000000 0000000000010109 Apr 24 21:18:39.636888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.648864 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.648919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.660879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.660934 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.672874 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.672928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.684878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.696909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.696971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.708909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.708970 (XEN) Xen call trace: Apr 24 21:18:39.709012 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:39.720923 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:39.732910 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:39.732972 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:39.733017 (XEN) Apr 24 21:18:39.733055 (XEN) *** Dumping CPU74 host state: *** Apr 24 21:18:39.744907 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:39.744970 (XEN) CPU: 74 Apr 24 21:18:39.745011 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:39.756924 (XEN) LR: 00000a0000276fcc Apr 24 21:18:39.756980 (XEN) SP: 0000800ffde07e60 Apr 24 21:18:39.757023 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:39.768911 (XEN) X0: 0000000000000000 X1: 0000760ffdad4000 X2: 0000800ffde14078 Apr 24 21:18:39.768973 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:39.780927 (XEN) X6: 00000a00003825c8 X7: 0000800ffde89740 X8: 0000000000000012 Apr 24 21:18:39.780990 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:39.792918 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:39.804910 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:39.804972 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000004a Apr 24 21:18:39.816907 (XEN) X21: 00000a0000347980 X22: 0000000000000400 X23: 000000000000004a Apr 24 21:18:39.816969 (XEN) X24: 000000000000004a X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:39.828900 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde07e60 Apr 24 21:18:39.828962 (XEN) Apr 24 21:18:39.829002 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:39.840910 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:39.840968 (XEN) Apr 24 21:18:39.841007 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:39.841049 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:39.852903 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:39.852960 (XEN) Apr 24 21:18:39.853000 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:39.853041 (XEN) HPFAR_EL2: 0000009010801500 Apr 24 21:18:39.853083 (XEN) FAR_EL2: ffff80000b150100 Apr 24 21:18:39.864910 (XEN) Apr 24 21:18:39.864963 (XEN) Xen stack trace from sp=0000800ffde07e60: Apr 24 21:18:39.865010 (XEN) 0000800ffde07e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:39.876927 (XEN) 000000000000004a 0000000000000000 0000000000000000 000000000001010a Apr 24 21:18:39.876990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.888910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.888972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.900911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.900972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.912914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.924911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.924973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.936897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.936959 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.948906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:39.948967 (XEN) Xen call trace: Apr 24 21:18:39.960906 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:39.960971 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:39.972907 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:39.972969 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:39.973013 (XEN) Apr 24 21:18:39.973051 (XEN) *** Dumping CPU75 host state: *** Apr 24 21:18:39.984917 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:39.984979 (XEN) CPU: 75 Apr 24 21:18:39.985020 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:39.996946 (XEN) LR: 00000a0000276fcc Apr 24 21:18:39.997005 (XEN) SP: 0000800ffd99fe60 Apr 24 21:18:39.997048 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:40.008952 (XEN) X0: 0000000000000000 X1: 0000760ffdad0000 X2: 0000800ffde10078 Apr 24 21:18:40.008994 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:40.020826 (XEN) X6: 00000a00003825c8 X7: 0000800ffde89c00 X8: 0000000000000012 Apr 24 21:18:40.032863 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:40.032918 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:40.044858 (XEN) X15: 0000000000000003 X16: 0000000000000219 X17: 0000000000000000 Apr 24 21:18:40.044912 (XEN) X18: 0000000000000219 X19: 00000a00003825d0 X20: 000000000000004b Apr 24 21:18:40.056905 (XEN) X21: 00000a0000347a00 X22: 0000000000000800 X23: 000000000000004b Apr 24 21:18:40.056968 (XEN) X24: 000000000000004b X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:40.068914 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd99fe60 Apr 24 21:18:40.068977 (XEN) Apr 24 21:18:40.069016 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:40.080917 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:40.080975 (XEN) Apr 24 21:18:40.081014 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:40.081057 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:40.092909 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:40.092966 (XEN) Apr 24 21:18:40.093006 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:40.093049 (XEN) HPFAR_EL2: 0000009010802100 Apr 24 21:18:40.093091 (XEN) FAR_EL2: ffff80000b210100 Apr 24 21:18:40.104912 (XEN) Apr 24 21:18:40.104964 (XEN) Xen stack trace from sp=0000800ffd99fe60: Apr 24 21:18:40.105011 (XEN) 0000800ffd99fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:40.116909 (XEN) 000000000000004b 0000000000000000 0000000000000000 000000000001010b Apr 24 21:18:40.116972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.128930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.128992 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.140913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.140976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.152913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.164906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.164967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.176909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.176971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.188910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.188972 (XEN) Xen call trace: Apr 24 21:18:40.200899 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:40.200964 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:40.212909 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:40.212970 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:40.213015 (XEN) Apr 24 21:18:40.224894 (XEN) *** Dumping CPU76 host state: *** Apr 24 21:18:40.224954 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:40.225004 (XEN) CPU: 76 Apr 24 21:18:40.225043 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:40.236888 (XEN) LR: 00000a0000276fcc Apr 24 21:18:40.236938 (XEN) SP: 0000800ffd98fe60 Apr 24 21:18:40.236980 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:40.248912 (XEN) X0: 0000000000000000 X1: 0000760ffd656000 X2: 0000800ffd996078 Apr 24 21:18:40.248975 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:40.260926 (XEN) X6: 00000a00003825c8 X7: 0000800ffd994150 X8: 0000000000000012 Apr 24 21:18:40.272907 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:40.272970 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:40.284919 (XEN) X15: 0000000000000001 X16: 0000000000000004 X17: 0000000000000000 Apr 24 21:18:40.284981 (XEN) X18: 0000000000000004 X19: 00000a00003825d0 X20: 000000000000004c Apr 24 21:18:40.296899 (XEN) X21: 00000a0000347a80 X22: 0000000000001000 X23: 000000000000004c Apr 24 21:18:40.296961 (XEN) X24: 000000000000004c X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:40.308865 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd98fe60 Apr 24 21:18:40.308919 (XEN) Apr 24 21:18:40.320856 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:40.320904 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:40.320947 (XEN) Apr 24 21:18:40.320984 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:40.321025 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:40.332863 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:40.332912 (XEN) Apr 24 21:18:40.332950 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:40.332992 (XEN) HPFAR_EL2: 0000009010802d00 Apr 24 21:18:40.333034 (XEN) FAR_EL2: ffff80000b2d0100 Apr 24 21:18:40.344851 (XEN) Apr 24 21:18:40.344895 (XEN) Xen stack trace from sp=0000800ffd98fe60: Apr 24 21:18:40.344940 (XEN) 0000800ffd98fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:40.356860 (XEN) 000000000000004c 0000000000000000 0000000000000000 000000000001010c Apr 24 21:18:40.356913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.368854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.368907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.380883 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.392855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.392908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.404851 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.404904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.416862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.416916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.428862 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.440939 (XEN) Xen call trace: Apr 24 21:18:40.440992 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:40.441021 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:40.452871 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:40.452949 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:40.464858 (XEN) Apr 24 21:18:40.464905 (XEN) *** Dumping CPU77 host state: *** Apr 24 21:18:40.464950 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:40.464998 (XEN) CPU: 77 Apr 24 21:18:40.476884 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:40.476966 (XEN) LR: 00000a0000276fcc Apr 24 21:18:40.477031 (XEN) SP: 0000800ffd987e60 Apr 24 21:18:40.477080 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:40.488893 (XEN) X0: 0000000000000000 X1: 0000760ffd652000 X2: 0000800ffd992078 Apr 24 21:18:40.500791 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:40.500847 (XEN) X6: 00000a00003825c8 X7: 0000800ffd994590 X8: 0000000000000012 Apr 24 21:18:40.512888 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:40.512955 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:40.524775 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:40.524805 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000004d Apr 24 21:18:40.536892 (XEN) X21: 00000a0000347b00 X22: 0000000000002000 X23: 000000000000004d Apr 24 21:18:40.536948 (XEN) X24: 000000000000004d X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:40.548911 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd987e60 Apr 24 21:18:40.560839 (XEN) Apr 24 21:18:40.560864 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:40.560887 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:40.560911 (XEN) Apr 24 21:18:40.560931 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:40.560954 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:40.572873 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:40.572938 (XEN) Apr 24 21:18:40.573002 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:40.573063 (XEN) HPFAR_EL2: 0000009010803900 Apr 24 21:18:40.584892 (XEN) FAR_EL2: ffff80000b390100 Apr 24 21:18:40.584952 (XEN) Apr 24 21:18:40.584994 (XEN) Xen stack trace from sp=0000800ffd987e60: Apr 24 21:18:40.585039 (XEN) 0000800ffd987e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:40.596880 (XEN) 000000000000004d 0000000000000000 0000000000000000 000000000001010d Apr 24 21:18:40.596942 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.608916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.608977 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.620914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.632910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.632992 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.644914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.644975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.656909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.656972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.668916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.680912 (XEN) Xen call trace: Apr 24 21:18:40.680969 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:40.681021 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:40.692918 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:40.692978 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:40.704928 (XEN) Apr 24 21:18:40.705004 (XEN) *** Dumping CPU78 host state: *** Apr 24 21:18:40.705077 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:40.705139 (XEN) CPU: 78 Apr 24 21:18:40.716875 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:40.716931 (XEN) LR: 00000a0000276fcc Apr 24 21:18:40.716973 (XEN) SP: 0000800ffd937e60 Apr 24 21:18:40.728909 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:40.728974 (XEN) X0: 0000000000000000 X1: 0000760ffd5fe000 X2: 0000800ffd93e078 Apr 24 21:18:40.740904 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:40.740967 (XEN) X6: 00000a00003825c8 X7: 0000800ffd994a50 X8: 0000000000000012 Apr 24 21:18:40.752908 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:40.752970 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:40.764920 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:40.764981 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000004e Apr 24 21:18:40.776903 (XEN) X21: 00000a0000347b80 X22: 0000000000004000 X23: 000000000000004e Apr 24 21:18:40.788913 (XEN) X24: 000000000000004e X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:40.788975 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd937e60 Apr 24 21:18:40.800910 (XEN) Apr 24 21:18:40.800962 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:40.801006 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:40.801050 (XEN) Apr 24 21:18:40.801087 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:40.812904 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:40.812962 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:40.813006 (XEN) Apr 24 21:18:40.813044 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:40.813085 (XEN) HPFAR_EL2: 0000009010804500 Apr 24 21:18:40.824899 (XEN) FAR_EL2: ffff80000b450100 Apr 24 21:18:40.824956 (XEN) Apr 24 21:18:40.824995 (XEN) Xen stack trace from sp=0000800ffd937e60: Apr 24 21:18:40.825040 (XEN) 0000800ffd937e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:40.836922 (XEN) 000000000000004e 0000000000000000 0000000000000000 000000000001010e Apr 24 21:18:40.836984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.848924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.860924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.860986 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.872911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.872972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.884908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.884990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.896914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.908906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.908967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:40.920908 (XEN) Xen call trace: Apr 24 21:18:40.920963 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:40.921015 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:40.932919 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:40.932981 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:40.944910 (XEN) Apr 24 21:18:40.944962 (XEN) *** Dumping CPU79 host state: *** Apr 24 21:18:40.945007 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:40.956903 (XEN) CPU: 79 Apr 24 21:18:40.956958 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:40.957010 (XEN) LR: 00000a0000276fcc Apr 24 21:18:40.957052 (XEN) SP: 0000800ffd92fe60 Apr 24 21:18:40.968907 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:40.968971 (XEN) X0: 0000000000000000 X1: 0000760ffd5fc000 X2: 0000800ffd93c078 Apr 24 21:18:40.980910 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:40.980972 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93a010 X8: 0000000000000012 Apr 24 21:18:40.992913 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:40.992976 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:41.004918 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:41.004980 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000004f Apr 24 21:18:41.016929 (XEN) X21: 00000a0000347c00 X22: 0000000000008000 X23: 000000000000004f Apr 24 21:18:41.028905 (XEN) X24: 000000000000004f X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:41.028968 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd92fe60 Apr 24 21:18:41.040920 (XEN) Apr 24 21:18:41.040973 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:41.041017 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:41.041061 (XEN) Apr 24 21:18:41.041099 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:41.052911 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:41.052969 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:41.053013 (XEN) Apr 24 21:18:41.053051 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:41.053093 (XEN) HPFAR_EL2: 0000009010805300 Apr 24 21:18:41.064903 (XEN) FAR_EL2: ffff80000b530100 Apr 24 21:18:41.064960 (XEN) Apr 24 21:18:41.065000 (XEN) Xen stack trace from sp=0000800ffd92fe60: Apr 24 21:18:41.065045 (XEN) 0000800ffd92fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:41.076919 (XEN) 000000000000004f 0000000000000000 0000000000000000 000000000001010f Apr 24 21:18:41.088899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.088962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.100918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.100980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.112914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.112975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.124909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.124971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.136917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.148918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.148981 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.160912 (XEN) Xen call trace: Apr 24 21:18:41.160968 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:41.161020 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:41.172914 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:41.172976 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:41.184908 (XEN) Apr 24 21:18:41.184960 (XEN) *** Dumping CPU80 host state: *** Apr 24 21:18:41.185007 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:41.196920 (XEN) CPU: 80 Apr 24 21:18:41.196973 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:41.197024 (XEN) LR: 00000a0000276fcc Apr 24 21:18:41.197065 (XEN) SP: 0000800ffd8bfe60 Apr 24 21:18:41.208898 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:41.208962 (XEN) X0: 0000000000000000 X1: 0000760ffd5f8000 X2: 0000800ffd938078 Apr 24 21:18:41.220910 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:41.220973 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93a410 X8: 0000000000000012 Apr 24 21:18:41.232918 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:41.232980 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:41.244908 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:41.256882 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000050 Apr 24 21:18:41.256944 (XEN) X21: 00000a0000347c80 X22: 0000000000010000 X23: 0000000000000050 Apr 24 21:18:41.268921 (XEN) X24: 0000000000000050 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:41.268983 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8bfe60 Apr 24 21:18:41.280926 (XEN) Apr 24 21:18:41.280980 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:41.281024 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:41.281067 (XEN) Apr 24 21:18:41.281105 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:41.292916 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:41.292973 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:41.293017 (XEN) Apr 24 21:18:41.293055 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:41.304911 (XEN) HPFAR_EL2: 0000009010805f00 Apr 24 21:18:41.304969 (XEN) FAR_EL2: ffff80000b5f0100 Apr 24 21:18:41.305013 (XEN) Apr 24 21:18:41.305051 (XEN) Xen stack trace from sp=0000800ffd8bfe60: Apr 24 21:18:41.305096 (XEN) 0000800ffd8bfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:41.316917 (XEN) 0000000000000050 0000000000000000 0000000000000000 0000000000010200 Apr 24 21:18:41.328917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.328979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.340905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.340967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.352923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.352984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.364916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.376906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.376967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.388905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.388986 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.400895 (XEN) Xen call trace: Apr 24 21:18:41.400950 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:41.412903 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:41.412970 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:41.413018 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:41.424913 (XEN) Apr 24 21:18:41.424966 (XEN) *** Dumping CPU81 host state: *** Apr 24 21:18:41.425010 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:41.436895 (XEN) CPU: 81 Apr 24 21:18:41.436952 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:41.437032 (XEN) LR: 00000a0000276fcc Apr 24 21:18:41.448899 (XEN) SP: 0000800ffd8b7e60 Apr 24 21:18:41.448956 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:41.449007 (XEN) X0: 0000000000000000 X1: 0000760ffd5e4000 X2: 0000800ffd924078 Apr 24 21:18:41.460913 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:41.460975 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93a8d0 X8: 0000000000000012 Apr 24 21:18:41.472919 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:41.484905 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:41.484968 (XEN) X15: ffff00002dbedb0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:41.496907 (XEN) X18: ffff800031983c58 X19: 00000a00003825d0 X20: 0000000000000051 Apr 24 21:18:41.496970 (XEN) X21: 00000a0000347d00 X22: 0000000000020000 X23: 0000000000000051 Apr 24 21:18:41.508913 (XEN) X24: 0000000000000051 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:41.508975 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8b7e60 Apr 24 21:18:41.520930 (XEN) Apr 24 21:18:41.520983 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:41.521028 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:41.521070 (XEN) Apr 24 21:18:41.521108 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:41.532927 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:41.532984 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:41.533028 (XEN) Apr 24 21:18:41.533066 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:41.544909 (XEN) HPFAR_EL2: 0000008010800b00 Apr 24 21:18:41.544966 (XEN) FAR_EL2: ffff80000a8b0100 Apr 24 21:18:41.545009 (XEN) Apr 24 21:18:41.545047 (XEN) Xen stack trace from sp=0000800ffd8b7e60: Apr 24 21:18:41.556903 (XEN) 0000800ffd8b7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:41.556966 (XEN) 0000000000000051 0000000000000000 0000000000000000 0000000000010201 Apr 24 21:18:41.568907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.568969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.580916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.580978 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.592913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.592974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.604928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.616944 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.617017 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.628872 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.628928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.640872 (XEN) Xen call trace: Apr 24 21:18:41.640919 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:41.652814 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:41.652871 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:41.664854 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:41.664904 (XEN) Apr 24 21:18:41.664943 (XEN) *** Dumping CPU82 host state: *** Apr 24 21:18:41.664986 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:41.676863 (XEN) CPU: 82 Apr 24 21:18:41.676909 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:41.676957 (XEN) LR: 00000a0000276fcc Apr 24 21:18:41.688855 (XEN) SP: 0000800ffd8afe60 Apr 24 21:18:41.688903 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:41.688952 (XEN) X0: 0000000000000000 X1: 0000760ffd5e2000 X2: 0000800ffd922078 Apr 24 21:18:41.700863 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:41.700916 (XEN) X6: 00000a00003825c8 X7: 0000800ffd93ad90 X8: 0000000000000012 Apr 24 21:18:41.712861 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:41.724902 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:41.724964 (XEN) X15: 0000000031cf7695 X16: 0000000045410ee9 X17: ffff800009f15538 Apr 24 21:18:41.736906 (XEN) X18: ffff800020063c38 X19: 00000a00003825d0 X20: 0000000000000052 Apr 24 21:18:41.736970 (XEN) X21: 00000a0000347d80 X22: 0000000000040000 X23: 0000000000000052 Apr 24 21:18:41.748914 (XEN) X24: 0000000000000052 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:41.748976 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8afe60 Apr 24 21:18:41.760923 (XEN) Apr 24 21:18:41.760976 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:41.761020 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:41.772899 (XEN) Apr 24 21:18:41.772952 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:41.772997 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:41.773039 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:41.773081 (XEN) Apr 24 21:18:41.773119 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:41.784916 (XEN) HPFAR_EL2: 0000008010000200 Apr 24 21:18:41.784973 (XEN) FAR_EL2: ffff80000a380090 Apr 24 21:18:41.785016 (XEN) Apr 24 21:18:41.785053 (XEN) Xen stack trace from sp=0000800ffd8afe60: Apr 24 21:18:41.796904 (XEN) 0000800ffd8afe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:41.796967 (XEN) 0000000000000052 0000000000000000 0000000000000000 0000000000010202 Apr 24 21:18:41.808908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.808969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.820896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.820958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.832875 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.844855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.844909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.856865 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.856919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.868855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.868909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:41.880856 (XEN) Xen call trace: Apr 24 21:18:41.880903 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:41.892904 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:41.892968 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:41.904931 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:41.904991 (XEN) Apr 24 21:18:41.905031 (XEN) *** Dumping CPU83 host state: *** Apr 24 21:18:41.905075 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:41.916909 (XEN) CPU: 83 Apr 24 21:18:41.916963 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:41.917013 (XEN) LR: 00000a0000276fcc Apr 24 21:18:41.928906 (XEN) SP: 0000800ffd83fe60 Apr 24 21:18:41.928963 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:41.929013 (XEN) X0: 0000000000000000 X1: 0000760ffd566000 X2: 0000800ffd8a6078 Apr 24 21:18:41.940913 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:41.952884 (XEN) X6: 00000a00003825c8 X7: 0000800ffd920280 X8: 0000000000000012 Apr 24 21:18:41.952947 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:41.964906 (XEN) X12: 0000000000000001 X13: 00000000000001d3 X14: 00000000000001d3 Apr 24 21:18:41.964969 (XEN) X15: 0000fffffbc47510 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:41.976898 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000053 Apr 24 21:18:41.976960 (XEN) X21: 00000a0000347e00 X22: 0000000000080000 X23: 0000000000000053 Apr 24 21:18:41.988934 (XEN) X24: 0000000000000053 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:41.989002 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd83fe60 Apr 24 21:18:42.000783 (XEN) Apr 24 21:18:42.000831 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:42.000875 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:42.012844 (XEN) Apr 24 21:18:42.012890 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:42.012933 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:42.012975 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:42.013017 (XEN) Apr 24 21:18:42.013055 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:42.024832 (XEN) HPFAR_EL2: 0000008010802300 Apr 24 21:18:42.024882 (XEN) FAR_EL2: ffff80000aa30100 Apr 24 21:18:42.024924 (XEN) Apr 24 21:18:42.024962 (XEN) Xen stack trace from sp=0000800ffd83fe60: Apr 24 21:18:42.036831 (XEN) 0000800ffd83fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:42.036888 (XEN) 0000000000000053 0000000000000000 0000000000000000 0000000000010203 Apr 24 21:18:42.048854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.048910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.060885 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.060947 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.072916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.084919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.084981 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.096901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.096963 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.108919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.108980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.120918 (XEN) Xen call trace: Apr 24 21:18:42.120974 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:42.132916 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:42.132980 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:42.144908 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:42.144967 (XEN) Apr 24 21:18:42.145006 (XEN) *** Dumping CPU84 host state: *** Apr 24 21:18:42.145071 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:42.156910 (XEN) CPU: 84 Apr 24 21:18:42.156963 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:42.168901 (XEN) LR: 00000a0000276fcc Apr 24 21:18:42.168958 (XEN) SP: 0000800ffd837e60 Apr 24 21:18:42.169001 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:42.180901 (XEN) X0: 0000000000000000 X1: 0000760ffd562000 X2: 0000800ffd8a2078 Apr 24 21:18:42.180966 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:42.192923 (XEN) X6: 00000a00003825c8 X7: 0000800ffd920740 X8: 0000000000000012 Apr 24 21:18:42.192984 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:42.204926 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:42.204988 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:42.216907 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 0000000000000054 Apr 24 21:18:42.216969 (XEN) X21: 00000a0000347e80 X22: 0000000000100000 X23: 0000000000000054 Apr 24 21:18:42.228910 (XEN) X24: 0000000000000054 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:42.240903 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd837e60 Apr 24 21:18:42.240966 (XEN) Apr 24 21:18:42.241005 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:42.241048 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:42.252866 (XEN) Apr 24 21:18:42.252895 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:42.252919 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:42.252942 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:42.252965 (XEN) Apr 24 21:18:42.264896 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:42.264953 (XEN) HPFAR_EL2: 0000008010802f00 Apr 24 21:18:42.264998 (XEN) FAR_EL2: ffff80000aaf0100 Apr 24 21:18:42.265040 (XEN) Apr 24 21:18:42.265077 (XEN) Xen stack trace from sp=0000800ffd837e60: Apr 24 21:18:42.276864 (XEN) 0000800ffd837e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:42.276919 (XEN) 0000000000000054 0000000000000000 0000000000000000 0000000000010204 Apr 24 21:18:42.288860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.288914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.300913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.312901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.312963 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.324908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.324969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.336922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.336984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.348907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.360912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.360974 (XEN) Xen call trace: Apr 24 21:18:42.361016 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:42.372916 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:42.372980 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:42.384914 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:42.384973 (XEN) Apr 24 21:18:42.385013 (XEN) *** Dumping CPU85 host state: *** Apr 24 21:18:42.385057 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:42.396920 (XEN) CPU: 85 Apr 24 21:18:42.396974 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:42.408929 (XEN) LR: 00000a0000276fcc Apr 24 21:18:42.408986 (XEN) SP: 0000800ffd827e60 Apr 24 21:18:42.409029 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:42.420912 (XEN) X0: 0000000000000000 X1: 0000760ffd560000 X2: 0000800ffd8a0078 Apr 24 21:18:42.420975 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:42.432912 (XEN) X6: 00000a00003825c8 X7: 0000800ffd920c00 X8: 0000000000000012 Apr 24 21:18:42.432975 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:42.444912 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:42.444974 (XEN) X15: ffff00002a2b9b0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:42.456915 (XEN) X18: ffff80001055bc58 X19: 00000a00003825d0 X20: 0000000000000055 Apr 24 21:18:42.456977 (XEN) X21: 00000a0000347f00 X22: 0000000000200000 X23: 0000000000000055 Apr 24 21:18:42.468912 (XEN) X24: 0000000000000055 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:42.480908 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd827e60 Apr 24 21:18:42.480971 (XEN) Apr 24 21:18:42.481010 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:42.481053 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:42.492907 (XEN) Apr 24 21:18:42.492960 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:42.493005 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:42.493047 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:42.504906 (XEN) Apr 24 21:18:42.504958 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:42.505002 (XEN) HPFAR_EL2: 0000008010803b00 Apr 24 21:18:42.505044 (XEN) FAR_EL2: ffff80000abb0100 Apr 24 21:18:42.505086 (XEN) Apr 24 21:18:42.505123 (XEN) Xen stack trace from sp=0000800ffd827e60: Apr 24 21:18:42.516874 (XEN) 0000800ffd827e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:42.516936 (XEN) 0000000000000055 0000000000000000 0000000000000000 0000000000010205 Apr 24 21:18:42.528915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.540918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.540981 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.552913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.552975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.564913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.564974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.576903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.576964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.588923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.600903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.600965 (XEN) Xen call trace: Apr 24 21:18:42.601007 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:42.612923 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:42.612987 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:42.624910 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:42.624969 (XEN) Apr 24 21:18:42.625008 (XEN) *** Dumping CPU86 host state: *** Apr 24 21:18:42.636903 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:42.636966 (XEN) CPU: 86 Apr 24 21:18:42.637007 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:42.648907 (XEN) LR: 00000a0000276fcc Apr 24 21:18:42.648964 (XEN) SP: 0000800ffb7bfe60 Apr 24 21:18:42.649007 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:42.660934 (XEN) X0: 0000000000000000 X1: 0000760ffd4ec000 X2: 0000800ffd82c078 Apr 24 21:18:42.660998 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:42.672906 (XEN) X6: 00000a00003825c8 X7: 0000800ffd82b150 X8: 0000000000000012 Apr 24 21:18:42.672969 (XEN) X9: 0000000000000080 X10: 0000000000000000 X11: 0000000000000002 Apr 24 21:18:42.684910 (XEN) X12: 0000000000000000 X13: 0000000000000025 X14: 0000000000000180 Apr 24 21:18:42.684973 (XEN) X15: ffff0000319a5b0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:42.696925 (XEN) X18: ffff80000da23c58 X19: 00000a00003825d0 X20: 0000000000000056 Apr 24 21:18:42.708905 (XEN) X21: 00000a0000347f80 X22: 0000000000400000 X23: 0000000000000056 Apr 24 21:18:42.708968 (XEN) X24: 0000000000000056 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:42.720912 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb7bfe60 Apr 24 21:18:42.720975 (XEN) Apr 24 21:18:42.721014 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:42.732913 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:42.732970 (XEN) Apr 24 21:18:42.733010 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:42.733052 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:42.733094 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:42.744913 (XEN) Apr 24 21:18:42.744966 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:42.745010 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:42.745053 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:42.745095 (XEN) Apr 24 21:18:42.756897 (XEN) Xen stack trace from sp=0000800ffb7bfe60: Apr 24 21:18:42.756956 (XEN) 0000800ffb7bfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:42.757006 (XEN) 0000000000000056 0000000000000000 0000000000000000 0000000000010206 Apr 24 21:18:42.768920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.780903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.780964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.792918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.792980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.804912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.804973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.816905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.828906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.828968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.840883 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:42.840944 (XEN) Xen call trace: Apr 24 21:18:42.840987 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:42.852927 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:42.852990 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:42.864830 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:42.864862 (XEN) Apr 24 21:18:42.864883 (XEN) *** Dumping CPU87 host state: *** Apr 24 21:18:42.876902 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:42.876986 (XEN) CPU: 87 Apr 24 21:18:42.877056 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:42.888875 (XEN) LR: 00000a0000276fcc Apr 24 21:18:42.888925 (XEN) SP: 0000800ffb7b7e60 Apr 24 21:18:42.888968 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:42.900856 (XEN) X0: 0000000000000000 X1: 0000760ffd4e8000 X2: 0000800ffd828078 Apr 24 21:18:42.900910 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:42.912884 (XEN) X6: 00000a00003825c8 X7: 0000800ffd82b590 X8: 0000000000000012 Apr 24 21:18:42.912940 (XEN) X9: 0000000000000000 X10: 00000000000009d0 X11: 0000000000000000 Apr 24 21:18:42.924861 (XEN) X12: 0000000000000001 X13: 0000000000000216 X14: 0000000000000216 Apr 24 21:18:42.936900 (XEN) X15: ffff00002765e90c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:42.936965 (XEN) X18: ffff800010493c58 X19: 00000a00003825d0 X20: 0000000000000057 Apr 24 21:18:42.948910 (XEN) X21: 00000a0000348000 X22: 0000000000800000 X23: 0000000000000057 Apr 24 21:18:42.948973 (XEN) X24: 0000000000000057 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:42.960906 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb7b7e60 Apr 24 21:18:42.960968 (XEN) Apr 24 21:18:42.961007 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:42.972908 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:42.972965 (XEN) Apr 24 21:18:42.973005 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:42.973048 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:42.973091 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:42.984917 (XEN) Apr 24 21:18:42.984970 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:42.985014 (XEN) HPFAR_EL2: 0000008010805300 Apr 24 21:18:42.985056 (XEN) FAR_EL2: ffff80000ad30100 Apr 24 21:18:42.996906 (XEN) Apr 24 21:18:42.996958 (XEN) Xen stack trace from sp=0000800ffb7b7e60: Apr 24 21:18:42.997006 (XEN) 0000800ffb7b7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:43.008908 (XEN) 0000000000000057 0000000000000000 0000000000000000 0000000000010207 Apr 24 21:18:43.008970 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.020921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.020983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.032894 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.032955 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.044913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.044975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.056905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.068860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.068922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.080921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.080983 (XEN) Xen call trace: Apr 24 21:18:43.081026 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:43.092915 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:43.104914 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:43.104976 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:43.105021 (XEN) Apr 24 21:18:43.105060 (XEN) *** Dumping CPU88 host state: *** Apr 24 21:18:43.116908 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:43.116970 (XEN) CPU: 88 Apr 24 21:18:43.117011 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:43.128813 (XEN) LR: 00000a0000276fcc Apr 24 21:18:43.128844 (XEN) SP: 0000800ffb7a7e60 Apr 24 21:18:43.128867 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:43.140880 (XEN) X0: 0000000000000000 X1: 0000760ffb46e000 X2: 0000800ffb7ae078 Apr 24 21:18:43.140936 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:43.152856 (XEN) X6: 00000a00003825c8 X7: 0000800ffd82ba50 X8: 0000000000000012 Apr 24 21:18:43.152910 (XEN) X9: 0000000000000000 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:43.164880 (XEN) X12: 0000000000000000 X13: 0000000000000000 X14: 00000000000000fe Apr 24 21:18:43.176858 (XEN) X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 21:18:43.176912 (XEN) X18: 0000000000000006 X19: 00000a00003825d0 X20: 0000000000000058 Apr 24 21:18:43.188852 (XEN) X21: 00000a0000348080 X22: 0000000001000000 X23: 0000000000000058 Apr 24 21:18:43.188906 (XEN) X24: 0000000000000058 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:43.200863 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb7a7e60 Apr 24 21:18:43.200918 (XEN) Apr 24 21:18:43.200957 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:43.212853 (XEN) VTTBR_EL2: 00020107fc640000 Apr 24 21:18:43.212902 (XEN) Apr 24 21:18:43.212941 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:43.212983 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:43.224854 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:43.224903 (XEN) Apr 24 21:18:43.224941 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 21:18:43.224982 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:43.225024 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:43.236857 (XEN) Apr 24 21:18:43.236901 (XEN) Xen stack trace from sp=0000800ffb7a7e60: Apr 24 21:18:43.236946 (XEN) 0000800ffb7a7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:43.248906 (XEN) 0000000000000058 0000000000000000 0000000000000000 0000000000010208 Apr 24 21:18:43.248967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.260921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.260982 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.272912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.272973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.284927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.296925 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.296997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.308904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.308966 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.320912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.320973 (XEN) Xen call trace: Apr 24 21:18:43.332917 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:43.332983 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:43.344903 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:43.344964 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:43.345009 (XEN) Apr 24 21:18:43.345047 (XEN) *** Dumping CPU89 host state: *** Apr 24 21:18:43.356919 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:43.356980 (XEN) CPU: 89 Apr 24 21:18:43.357021 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:43.368911 (XEN) LR: 00000a0000276fcc Apr 24 21:18:43.368967 (XEN) SP: 0000800ffb73fe60 Apr 24 21:18:43.369009 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:43.380918 (XEN) X0: 0000000000000000 X1: 0000760ffb46a000 X2: 0000800ffb7aa078 Apr 24 21:18:43.380980 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:43.392917 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a9010 X8: 0000000000000012 Apr 24 21:18:43.404902 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:43.404965 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:43.416929 (XEN) X15: 0000000000000003 X16: 000000000000020b X17: 0000000000000000 Apr 24 21:18:43.417020 (XEN) X18: 000000000000020b X19: 00000a00003825d0 X20: 0000000000000059 Apr 24 21:18:43.428929 (XEN) X21: 00000a0000348100 X22: 0000000002000000 X23: 0000000000000059 Apr 24 21:18:43.429014 (XEN) X24: 0000000000000059 X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:43.440907 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb73fe60 Apr 24 21:18:43.440969 (XEN) Apr 24 21:18:43.441008 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:43.452907 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:43.452963 (XEN) Apr 24 21:18:43.453003 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:43.453045 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:43.464906 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:43.464964 (XEN) Apr 24 21:18:43.465003 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:43.465046 (XEN) HPFAR_EL2: 0000009010800b00 Apr 24 21:18:43.465088 (XEN) FAR_EL2: ffff80000b0b0100 Apr 24 21:18:43.476861 (XEN) Apr 24 21:18:43.476905 (XEN) Xen stack trace from sp=0000800ffb73fe60: Apr 24 21:18:43.476951 (XEN) 0000800ffb73fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:43.488854 (XEN) 0000000000000059 0000000000000000 0000000000000000 0000000000010209 Apr 24 21:18:43.488907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.500866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.500919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.512919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.512980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.524928 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.536915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.536976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.548915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.548977 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.560878 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.560933 (XEN) Xen call trace: Apr 24 21:18:43.572862 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:43.572919 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:43.584861 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:43.584914 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:43.584958 (XEN) Apr 24 21:18:43.596850 (XEN) *** Dumping CPU90 host state: *** Apr 24 21:18:43.596899 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:43.596947 (XEN) CPU: 90 Apr 24 21:18:43.596987 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:43.608870 (XEN) LR: 00000a0000276fcc Apr 24 21:18:43.608918 (XEN) SP: 0000800ffb72fe60 Apr 24 21:18:43.608960 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:43.620959 (XEN) X0: 0000000000000000 X1: 0000760ffb3f6000 X2: 0000800ffb736078 Apr 24 21:18:43.621025 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:43.632888 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a9410 X8: 0000000000000012 Apr 24 21:18:43.644854 (XEN) X9: 0000000000000000 X10: ffff800009d8ac08 X11: 000000000000012f Apr 24 21:18:43.644909 (XEN) X12: 000000000000038d X13: ffff800009d32c08 X14: 0000000000000000 Apr 24 21:18:43.656860 (XEN) X15: ffff80000800b7e0 X16: 000000000000001d X17: 0000000000000000 Apr 24 21:18:43.656913 (XEN) X18: 0000000000000006 X19: 00000a00003825d0 X20: 000000000000005a Apr 24 21:18:43.668864 (XEN) X21: 00000a0000348180 X22: 0000000004000000 X23: 000000000000005a Apr 24 21:18:43.668939 (XEN) X24: 000000000000005a X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:43.680866 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb72fe60 Apr 24 21:18:43.692902 (XEN) Apr 24 21:18:43.692956 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:43.693001 (XEN) VTTBR_EL2: 00020107fc640000 Apr 24 21:18:43.693043 (XEN) Apr 24 21:18:43.693081 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:43.693123 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:43.704907 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:43.704964 (XEN) Apr 24 21:18:43.705003 (XEN) ESR_EL2: 000000005a000ea1 Apr 24 21:18:43.705045 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:43.705087 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:43.716910 (XEN) Apr 24 21:18:43.716963 (XEN) Xen stack trace from sp=0000800ffb72fe60: Apr 24 21:18:43.717010 (XEN) 0000800ffb72fe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:43.728902 (XEN) 000000000000005a 0000000000000000 0000000000000000 000000000001020a Apr 24 21:18:43.728964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.740914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.740975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.752919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.764920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.764981 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.776912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.777004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.788930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.788991 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.800903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.812948 (XEN) Xen call trace: Apr 24 21:18:43.813027 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:43.813061 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:43.824881 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:43.824936 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:43.836882 (XEN) Apr 24 21:18:43.836935 (XEN) *** Dumping CPU91 host state: *** Apr 24 21:18:43.836981 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:43.837029 (XEN) CPU: 91 Apr 24 21:18:43.848883 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:43.848947 (XEN) LR: 00000a0000276fcc Apr 24 21:18:43.848990 (XEN) SP: 0000800ffb727e60 Apr 24 21:18:43.849032 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:43.860882 (XEN) X0: 0000000000000000 X1: 0000760ffb3f4000 X2: 0000800ffb734078 Apr 24 21:18:43.872871 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:43.872934 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a98d0 X8: 0000000000000012 Apr 24 21:18:43.884910 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:43.884972 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:43.896924 (XEN) X15: ffff00002a87ab0c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:43.896987 (XEN) X18: ffff80000da13c58 X19: 00000a00003825d0 X20: 000000000000005b Apr 24 21:18:43.908933 (XEN) X21: 00000a0000348200 X22: 0000000008000000 X23: 000000000000005b Apr 24 21:18:43.908995 (XEN) X24: 000000000000005b X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:43.920922 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb727e60 Apr 24 21:18:43.932940 (XEN) Apr 24 21:18:43.932993 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:43.933038 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:43.933080 (XEN) Apr 24 21:18:43.933118 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:43.933160 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:43.944930 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:43.944987 (XEN) Apr 24 21:18:43.945026 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:43.945068 (XEN) HPFAR_EL2: 0000009010802300 Apr 24 21:18:43.956924 (XEN) FAR_EL2: ffff80000b230100 Apr 24 21:18:43.956981 (XEN) Apr 24 21:18:43.957021 (XEN) Xen stack trace from sp=0000800ffb727e60: Apr 24 21:18:43.957066 (XEN) 0000800ffb727e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:43.968944 (XEN) 000000000000005b 0000000000000000 0000000000000000 000000000001020b Apr 24 21:18:43.969034 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.980909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.981008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:43.992923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.004917 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.004979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.016914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.016976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.028914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.028976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.040925 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.052910 (XEN) Xen call trace: Apr 24 21:18:44.052965 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:44.053017 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:44.064919 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:44.064981 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:44.076910 (XEN) Apr 24 21:18:44.076963 (XEN) *** Dumping CPU92 host state: *** Apr 24 21:18:44.077008 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:44.077056 (XEN) CPU: 92 Apr 24 21:18:44.088909 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:44.088974 (XEN) LR: 00000a0000276fcc Apr 24 21:18:44.089017 (XEN) SP: 0000800ffb6bfe60 Apr 24 21:18:44.100910 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:44.100974 (XEN) X0: 0000000000000000 X1: 0000760ffb3f0000 X2: 0000800ffb730078 Apr 24 21:18:44.112913 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:44.112975 (XEN) X6: 00000a00003825c8 X7: 0000800ffb7a9d90 X8: 0000000000000012 Apr 24 21:18:44.124919 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:44.124981 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:44.136920 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:44.136982 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005c Apr 24 21:18:44.148922 (XEN) X21: 00000a0000348280 X22: 0000000010000000 X23: 000000000000005c Apr 24 21:18:44.160922 (XEN) X24: 000000000000005c X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:44.160984 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb6bfe60 Apr 24 21:18:44.172919 (XEN) Apr 24 21:18:44.172971 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:44.173015 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:44.173076 (XEN) Apr 24 21:18:44.173118 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:44.184915 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:44.184972 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:44.185016 (XEN) Apr 24 21:18:44.185054 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:44.185095 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:44.196926 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:44.196983 (XEN) Apr 24 21:18:44.197022 (XEN) Xen stack trace from sp=0000800ffb6bfe60: Apr 24 21:18:44.197067 (XEN) 0000800ffb6bfe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:44.208921 (XEN) 000000000000005c 0000000000000000 0000000000000000 000000000001020c Apr 24 21:18:44.208983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.220929 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.232907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.232969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.244915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.244976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.256918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.256979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.268919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.280910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.280972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.292916 (XEN) Xen call trace: Apr 24 21:18:44.292971 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:44.293023 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:44.304926 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:44.304987 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:44.316917 (XEN) Apr 24 21:18:44.316969 (XEN) *** Dumping CPU93 host state: *** Apr 24 21:18:44.317014 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:44.328911 (XEN) CPU: 93 Apr 24 21:18:44.328965 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:44.329016 (XEN) LR: 00000a0000276fcc Apr 24 21:18:44.329058 (XEN) SP: 0000800ffb6afe60 Apr 24 21:18:44.340917 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:44.340981 (XEN) X0: 0000000000000000 X1: 0000760ffb374000 X2: 0000800ffb6b4078 Apr 24 21:18:44.352925 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:44.352987 (XEN) X6: 00000a00003825c8 X7: 0000800ffb6b7280 X8: 0000000000000012 Apr 24 21:18:44.364917 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:44.364979 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:44.376919 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:44.376980 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005d Apr 24 21:18:44.388917 (XEN) X21: 00000a0000348300 X22: 0000000020000000 X23: 000000000000005d Apr 24 21:18:44.400910 (XEN) X24: 000000000000005d X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:44.400971 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb6afe60 Apr 24 21:18:44.412922 (XEN) Apr 24 21:18:44.412975 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:44.413018 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:44.413061 (XEN) Apr 24 21:18:44.413098 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:44.424913 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:44.424970 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:44.425033 (XEN) Apr 24 21:18:44.425074 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:44.425117 (XEN) HPFAR_EL2: 0000009010803b00 Apr 24 21:18:44.436904 (XEN) FAR_EL2: ffff80000b3b0100 Apr 24 21:18:44.436961 (XEN) Apr 24 21:18:44.437000 (XEN) Xen stack trace from sp=0000800ffb6afe60: Apr 24 21:18:44.437046 (XEN) 0000800ffb6afe70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:44.448932 (XEN) 000000000000005d 0000000000000000 0000000000000000 000000000001020d Apr 24 21:18:44.460913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.460975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.472912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.472973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.484871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.484933 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.496869 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.496930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.508872 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.520866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.520927 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.532864 (XEN) Xen call trace: Apr 24 21:18:44.532920 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:44.532971 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:44.544938 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:44.544999 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:44.556909 (XEN) Apr 24 21:18:44.556961 (XEN) *** Dumping CPU94 host state: *** Apr 24 21:18:44.557006 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:44.568891 (XEN) CPU: 94 Apr 24 21:18:44.568945 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:44.568995 (XEN) LR: 00000a0000276fcc Apr 24 21:18:44.569037 (XEN) SP: 0000800ffb6a7e60 Apr 24 21:18:44.580879 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:44.580942 (XEN) X0: 0000000000000000 X1: 0000760ffb372000 X2: 0000800ffb6b2078 Apr 24 21:18:44.592902 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:44.592965 (XEN) X6: 00000a00003825c8 X7: 0000800ffb6b7740 X8: 0000000000000012 Apr 24 21:18:44.604888 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 24 21:18:44.604943 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 24 21:18:44.616909 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 24 21:18:44.628908 (XEN) X18: 0000000000000000 X19: 00000a00003825d0 X20: 000000000000005e Apr 24 21:18:44.628970 (XEN) X21: 00000a0000348380 X22: 0000000040000000 X23: 000000000000005e Apr 24 21:18:44.640911 (XEN) X24: 000000000000005e X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:44.640973 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb6a7e60 Apr 24 21:18:44.652912 (XEN) Apr 24 21:18:44.652964 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:44.653008 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:44.653050 (XEN) Apr 24 21:18:44.653088 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:44.664908 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:44.664965 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:44.665009 (XEN) Apr 24 21:18:44.665046 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:44.676909 (XEN) HPFAR_EL2: 0000000000030300 Apr 24 21:18:44.676986 (XEN) FAR_EL2: ffff80000b010100 Apr 24 21:18:44.677034 (XEN) Apr 24 21:18:44.677072 (XEN) Xen stack trace from sp=0000800ffb6a7e60: Apr 24 21:18:44.677117 (XEN) 0000800ffb6a7e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:44.688912 (XEN) 000000000000005e 0000000000000000 0000000000000000 000000000001020e Apr 24 21:18:44.700910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.700971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.712890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.712957 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.724906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.724967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.736908 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.748898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.748960 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.760919 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.760980 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.772910 (XEN) Xen call trace: Apr 24 21:18:44.772965 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:44.784895 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:44.784963 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:44.785012 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:44.796928 (XEN) Apr 24 21:18:44.796980 (XEN) *** Dumping CPU95 host state: *** Apr 24 21:18:44.797025 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 24 21:18:44.808906 (XEN) CPU: 95 Apr 24 21:18:44.808961 (XEN) PC: 00000a0000276fe8 arch/arm/domain.c#idle_loop+0x12c/0x194 Apr 24 21:18:44.809012 (XEN) LR: 00000a0000276fcc Apr 24 21:18:44.820904 (XEN) SP: 0000800ffb657e60 Apr 24 21:18:44.820961 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 24 21:18:44.821012 (XEN) X0: 0000000000000000 X1: 0000760ffb31e000 X2: 0000800ffb65e078 Apr 24 21:18:44.832925 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003825c0 Apr 24 21:18:44.832987 (XEN) X6: 00000a00003825c8 X7: 0000800ffb6b7c00 X8: 0000000000000012 Apr 24 21:18:44.844904 (XEN) X9: 0000000000000080 X10: 00000000000009d0 X11: 0000000000000001 Apr 24 21:18:44.856914 (XEN) X12: 0000000000000001 X13: 000000000000015c X14: 000000000000015c Apr 24 21:18:44.856977 (XEN) X15: ffff000035ec750c X16: ffff80000929f0b8 X17: 0000000000000000 Apr 24 21:18:44.868912 (XEN) X18: ffff80000cefbc58 X19: 00000a00003825d0 X20: 000000000000005f Apr 24 21:18:44.868975 (XEN) X21: 00000a0000348400 X22: 0000000080000000 X23: 000000000000005f Apr 24 21:18:44.880913 (XEN) X24: 000000000000005f X25: 0000000000000000 X26: 0000000000000000 Apr 24 21:18:44.880975 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb657e60 Apr 24 21:18:44.892917 (XEN) Apr 24 21:18:44.892969 (XEN) VTCR_EL2: 00000000800d3590 Apr 24 21:18:44.893013 (XEN) VTTBR_EL2: 00010107fb649000 Apr 24 21:18:44.893056 (XEN) Apr 24 21:18:44.893093 (XEN) SCTLR_EL2: 0000000030cd183d Apr 24 21:18:44.904908 (XEN) HCR_EL2: 00000000807c663f Apr 24 21:18:44.904965 (XEN) TTBR0_EL2: 000001071e467000 Apr 24 21:18:44.905009 (XEN) Apr 24 21:18:44.905046 (XEN) ESR_EL2: 0000000007e00000 Apr 24 21:18:44.916904 (XEN) HPFAR_EL2: 0000009010805100 Apr 24 21:18:44.916961 (XEN) FAR_EL2: ffff80000b510100 Apr 24 21:18:44.917005 (XEN) Apr 24 21:18:44.917043 (XEN) Xen stack trace from sp=0000800ffb657e60: Apr 24 21:18:44.928906 (XEN) 0000800ffb657e70 00000a0000283a58 00000a0000341420 00000a00003785a8 Apr 24 21:18:44.928991 (XEN) 000000000000005f 0000000000000000 0000000000000000 000000000001020f Apr 24 21:18:44.940911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.940972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.952907 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.952968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.964888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.964950 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.976923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.988922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:44.988984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:45.000923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:45.000985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 24 21:18:45.012918 (XEN) Xen call trace: Apr 24 21:18:45.012975 (XEN) [<00000a0000276fe8>] arch/arm/domain.c#idle_loop+0x12c/0x194 (PC) Apr 24 21:18:45.024916 (XEN) [<00000a0000276fcc>] arch/arm/domain.c#idle_loop+0x110/0x194 (LR) Apr 24 21:18:45.024981 (XEN) [<00000a0000283a58>] start_secondary+0x218/0x21c Apr 24 21:18:45.036883 (XEN) [<00000a00003785a8>] 00000a00003785a8 Apr 24 21:18:45.036943 (XEN) Apr 24 21:18:45.036982 Apr 24 21:18:50.637723 (XEN) 'q' pressed -> dumping domain info (now = 1285156652550) Apr 24 21:18:50.656916 (XEN) General information for domain 0: Apr 24 21:18:50.656976 (XEN) refcnt=3 dying=0 pa Apr 24 21:18:50.659240 use_count=0 Apr 24 21:18:50.668837 (XEN) nr_pages=131072 xenheap_pages=2 dirty_cpus={} max_pages=131072 Apr 24 21:18:50.668901 (XEN) handle=00000000-0000-0000-0000-000000000000 vm_assist=00000020 Apr 24 21:18:50.680897 (XEN) p2m mappings for domain 0 (vmid 1): Apr 24 21:18:50.680957 (XEN) 1G mappings: 4984 (shattered 3) Apr 24 21:18:50.681003 (XEN) 2M mappings: 1444452 (shattered 98) Apr 24 21:18:50.692897 (XEN) 4K mappings: 50192 Apr 24 21:18:50.692954 (XEN) Rangesets belonging to domain 0: Apr 24 21:18:50.692999 (XEN) Interrupts { 32, 38, 48-51 } Apr 24 21:18:50.693042 (XEN) I/O Memory { 802000000-808000000, 810000000-820000000, 838000000-844000000, 846000000-848002000, 849000000-849002000, 84a000000-84a002000, 84b000000-84b002000, 868000000-880000000, 88001f000-880058000, 881010000-883000010, 902000000-908000000, 910000000-920000000, 938000000-944000000, 946000000-948002000, 949000000-949002000, 94a000000-94a002000, 94b000000-94b002000, 968000000-980000000 } Apr 24 21:18:50.728894 (XEN) NODE affinity for domain 0: [0] Apr 24 21:18:50.740901 (XEN) VCPU information and callbacks for domain 0: Apr 24 21:18:50.740961 (XEN) UNIT0 affinities: hard={0-95} soft={0-95} Apr 24 21:18:50.741008 (XEN) VCPU0: CPU18 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:50.752912 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:50.752969 (XEN) GICH_LRs (vcpu 0) mask=0 Apr 24 21:18:50.753012 (XEN) VCPU_LR[0]=0 Apr 24 21:18:50.764911 (XEN) VCPU_LR[1]=0 Apr 24 21:18:50.764966 (XEN) VCPU_LR[2]=0 Apr 24 21:18:50.765007 (XEN) VCPU_LR[3]=0 Apr 24 21:18:50.765047 (XEN) VCPU_LR[4]=0 Apr 24 21:18:50.765087 (XEN) VCPU_LR[5]=0 Apr 24 21:18:50.765127 (XEN) VCPU_LR[6]=0 Apr 24 21:18:50.776913 (XEN) VCPU_LR[7]=0 Apr 24 21:18:50.776969 (XEN) VCPU_LR[8]=0 Apr 24 21:18:50.777011 (XEN) VCPU_LR[9]=0 Apr 24 21:18:50.777051 (XEN) VCPU_LR[10]=0 Apr 24 21:18:50.777091 (XEN) VCPU_LR[11]=0 Apr 24 21:18:50.777130 (XEN) VCPU_LR[12]=0 Apr 24 21:18:50.788906 (XEN) VCPU_LR[13]=0 Apr 24 21:18:50.788986 (XEN) VCPU_LR[14]=0 Apr 24 21:18:50.789031 (XEN) VCPU_LR[15]=0 Apr 24 21:18:50.789071 (XEN) No periodic timer Apr 24 21:18:50.789112 (XEN) UNIT1 affinities: hard={0-95} soft={0-95} Apr 24 21:18:50.800916 (XEN) VCPU1: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:50.800979 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:50.812910 (XEN) GICH_LRs (vcpu 1) mask=0 Apr 24 21:18:50.812967 (XEN) VCPU_LR[0]=0 Apr 24 21:18:50.813009 (XEN) VCPU_LR[1]=0 Apr 24 21:18:50.813050 (XEN) VCPU_LR[2]=0 Apr 24 21:18:50.813090 (XEN) VCPU_LR[3]=0 Apr 24 21:18:50.813129 (XEN) VCPU_LR[4]=0 Apr 24 21:18:50.824916 (XEN) VCPU_LR[5]=0 Apr 24 21:18:50.824971 (XEN) VCPU_LR[6]=0 Apr 24 21:18:50.825013 (XEN) VCPU_LR[7]=0 Apr 24 21:18:50.825053 (XEN) VCPU_LR[8]=0 Apr 24 21:18:50.825093 (XEN) VCPU_LR[9]=0 Apr 24 21:18:50.825132 (XEN) VCPU_LR[10]=0 Apr 24 21:18:50.836889 (XEN) VCPU_LR[11]=0 Apr 24 21:18:50.836944 (XEN) VCPU_LR[12]=0 Apr 24 21:18:50.836986 (XEN) VCPU_LR[13]=0 Apr 24 21:18:50.837027 (XEN) VCPU_LR[14]=0 Apr 24 21:18:50.837067 (XEN) VCPU_LR[15]=0 Apr 24 21:18:50.848885 (XEN) No periodic timer Apr 24 21:18:50.848940 (XEN) UNIT2 affinities: hard={0-95} soft={0-95} Apr 24 21:18:50.848987 (XEN) VCPU2: CPU3 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:50.860906 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:50.860964 (XEN) GICH_LRs (vcpu 2) mask=0 Apr 24 21:18:50.861007 (XEN) VCPU_LR[0]=0 Apr 24 21:18:50.861047 (XEN) VCPU_LR[1]=0 Apr 24 21:18:50.872908 (XEN) VCPU_LR[2]=0 Apr 24 21:18:50.872965 (XEN) VCPU_LR[3]=0 Apr 24 21:18:50.873007 (XEN) VCPU_LR[4]=0 Apr 24 21:18:50.873047 (XEN) VCPU_LR[5]=0 Apr 24 21:18:50.873087 (XEN) VCPU_LR[6]=0 Apr 24 21:18:50.873127 (XEN) VCPU_LR[7]=0 Apr 24 21:18:50.884899 (XEN) VCPU_LR[8]=0 Apr 24 21:18:50.884956 (XEN) VCPU_LR[9]=0 Apr 24 21:18:50.884998 (XEN) VCPU_LR[10]=0 Apr 24 21:18:50.885038 (XEN) VCPU_LR[11]=0 Apr 24 21:18:50.885078 (XEN) VCPU_LR[12]=0 Apr 24 21:18:50.885118 (XEN) VCPU_LR[13]=0 Apr 24 21:18:50.896905 (XEN) VCPU_LR[14]=0 Apr 24 21:18:50.896961 (XEN) VCPU_LR[15]=0 Apr 24 21:18:50.897002 (XEN) No periodic timer Apr 24 21:18:50.897043 (XEN) UNIT3 affinities: hard={0-95} soft={0-95} Apr 24 21:18:50.897089 (XEN) VCPU3: CPU50 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:50.908913 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:50.908970 (XEN) GICH_LRs (vcpu 3) mask=0 Apr 24 21:18:50.909014 (XEN) VCPU_LR[0]=0 Apr 24 21:18:50.920906 (XEN) VCPU_LR[1]=0 Apr 24 21:18:50.920961 (XEN) VCPU_LR[2]=0 Apr 24 21:18:50.921003 (XEN) VCPU_LR[3]=0 Apr 24 21:18:50.921043 (XEN) VCPU_LR[4]=0 Apr 24 21:18:50.921083 (XEN) VCPU_LR[5]=0 Apr 24 21:18:50.921122 (XEN) VCPU_LR[6]=0 Apr 24 21:18:50.932913 (XEN) VCPU_LR[7]=0 Apr 24 21:18:50.932968 (XEN) VCPU_LR[8]=0 Apr 24 21:18:50.933009 (XEN) VCPU_LR[9]=0 Apr 24 21:18:50.933049 (XEN) VCPU_LR[10]=0 Apr 24 21:18:50.933089 (XEN) VCPU_LR[11]=0 Apr 24 21:18:50.933128 (XEN) VCPU_LR[12]=0 Apr 24 21:18:50.944906 (XEN) VCPU_LR[13]=0 Apr 24 21:18:50.944961 (XEN) VCPU_LR[14]=0 Apr 24 21:18:50.945003 (XEN) VCPU_LR[15]=0 Apr 24 21:18:50.945043 (XEN) No periodic timer Apr 24 21:18:50.945084 (XEN) UNIT4 affinities: hard={0-95} soft={0-95} Apr 24 21:18:50.956908 (XEN) VCPU4: CPU65 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:50.956972 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:50.957017 (XEN) GICH_LRs (vcpu 4) mask=0 Apr 24 21:18:50.968903 (XEN) VCPU_LR[0]=0 Apr 24 21:18:50.968958 (XEN) VCPU_LR[1]=0 Apr 24 21:18:50.968999 (XEN) VCPU_LR[2]=0 Apr 24 21:18:50.969039 (XEN) VCPU_LR[3]=0 Apr 24 21:18:50.980921 (XEN) VCPU_LR[4]=0 Apr 24 21:18:50.980976 (XEN) VCPU_LR[5]=0 Apr 24 21:18:50.981018 (XEN) VCPU_LR[6]=0 Apr 24 21:18:50.981058 (XEN) VCPU_LR[7]=0 Apr 24 21:18:50.981098 (XEN) VCPU_LR[8]=0 Apr 24 21:18:50.981155 (XEN) VCPU_LR[9]=0 Apr 24 21:18:50.992906 (XEN) VCPU_LR[10]=0 Apr 24 21:18:50.992963 (XEN) VCPU_LR[11]=0 Apr 24 21:18:50.993005 (XEN) VCPU_LR[12]=0 Apr 24 21:18:50.993045 (XEN) VCPU_LR[13]=0 Apr 24 21:18:50.993085 (XEN) VCPU_LR[14]=0 Apr 24 21:18:50.993125 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.004905 (XEN) No periodic timer Apr 24 21:18:51.004962 (XEN) UNIT5 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.005008 (XEN) VCPU5: CPU33 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.016908 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.016967 (XEN) GICH_LRs (vcpu 5) mask=0 Apr 24 21:18:51.017011 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.017051 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.017090 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.028879 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.028934 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.028975 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.029016 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.029056 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.029096 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.040903 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.040958 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.040999 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.041039 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.041080 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.041120 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.052916 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.052971 (XEN) No periodic timer Apr 24 21:18:51.053014 (XEN) UNIT6 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.053060 (XEN) VCPU6: CPU4 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.064912 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.064970 (XEN) GICH_LRs (vcpu 6) mask=0 Apr 24 21:18:51.065014 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.076901 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.076957 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.076999 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.077040 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.077082 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.077123 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.088888 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.088944 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.088986 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.089026 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.089066 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.100913 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.100969 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.101010 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.101050 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.101090 (XEN) No periodic timer Apr 24 21:18:51.101131 (XEN) UNIT7 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.112913 (XEN) VCPU7: CPU19 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.113002 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.124921 (XEN) GICH_LRs (vcpu 7) mask=0 Apr 24 21:18:51.124978 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.125021 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.125061 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.125101 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.125140 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.136882 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.136937 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.136978 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.137019 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.137061 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.137100 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.148907 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.148962 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.149004 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.149044 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.149084 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.160907 (XEN) No periodic timer Apr 24 21:18:51.160963 (XEN) UNIT8 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.161010 (XEN) VCPU8: CPU35 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.172909 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.172967 (XEN) GICH_LRs (vcpu 8) mask=0 Apr 24 21:18:51.173011 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.173051 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.173090 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.184911 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.184966 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.185026 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.185070 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.185110 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.185150 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.196916 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.196970 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.197013 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.197052 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.197092 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.197131 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.208903 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.208958 (XEN) No periodic timer Apr 24 21:18:51.209001 (XEN) UNIT9 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.209046 (XEN) VCPU9: CPU53 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.220901 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.220959 (XEN) GICH_LRs (vcpu 9) mask=0 Apr 24 21:18:51.232921 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.232976 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.233017 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.233057 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.233097 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.233136 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.244894 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.244949 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.244991 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.245031 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.245071 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.245111 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.256898 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.256954 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.256996 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.257036 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.257076 (XEN) No periodic timer Apr 24 21:18:51.257117 (XEN) UNIT10 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.268907 (XEN) VCPU10: CPU67 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.268971 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.280907 (XEN) GICH_LRs (vcpu 10) mask=0 Apr 24 21:18:51.280965 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.281007 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.281047 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.281086 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.281126 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.292899 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.292954 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.292995 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.293035 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.293075 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.293114 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.304918 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.304973 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.305015 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.305055 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.305095 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.316908 (XEN) No periodic timer Apr 24 21:18:51.316964 (XEN) UNIT11 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.317012 (XEN) VCPU11: CPU5 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.328906 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.328964 (XEN) GICH_LRs (vcpu 11) mask=0 Apr 24 21:18:51.329008 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.329049 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.329089 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.340891 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.340947 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.340988 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.341028 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.341067 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.352911 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.352966 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.353008 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.353048 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.353088 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.353127 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.364913 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.364968 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.365010 (XEN) No periodic timer Apr 24 21:18:51.365050 (XEN) UNIT12 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.376908 (XEN) VCPU12: CPU6 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.376972 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.377017 (XEN) GICH_LRs (vcpu 12) mask=0 Apr 24 21:18:51.388903 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.388974 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.389019 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.389060 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.389100 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.389139 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.400906 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.400962 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.401004 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.401044 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.401084 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.401124 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.412908 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.412963 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.413005 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.413045 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.413085 (XEN) No periodic timer Apr 24 21:18:51.413125 (XEN) UNIT13 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.424912 (XEN) VCPU13: CPU20 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.424975 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.436907 (XEN) GICH_LRs (vcpu 13) mask=0 Apr 24 21:18:51.436965 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.437007 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.437047 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.437087 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.448903 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.448960 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.449002 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.449042 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.449082 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.449122 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.460897 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.460954 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.460996 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.461036 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.461076 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.461116 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.472900 (XEN) No periodic timer Apr 24 21:18:51.472955 (XEN) UNIT14 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.473003 (XEN) VCPU14: CPU41 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.484923 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.484980 (XEN) GICH_LRs (vcpu 14) mask=0 Apr 24 21:18:51.485024 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.485064 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.496903 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.496958 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.497000 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.497040 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.497080 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.497119 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.508910 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.508965 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.509006 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.509046 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.509086 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.509126 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.520911 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.520966 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.521008 (XEN) No periodic timer Apr 24 21:18:51.521049 (XEN) UNIT15 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.532911 (XEN) VCPU15: CPU55 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.532975 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.533020 (XEN) GICH_LRs (vcpu 15) mask=0 Apr 24 21:18:51.544901 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.544956 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.544998 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.545038 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.545077 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.545116 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.556922 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.556977 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.557018 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.557058 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.557097 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.557138 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.568908 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.568963 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.569004 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.569044 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.569084 (XEN) No periodic timer Apr 24 21:18:51.569125 (XEN) UNIT16 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.580857 (XEN) VCPU16: CPU68 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.580936 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.592915 (XEN) GICH_LRs (vcpu 16) mask=0 Apr 24 21:18:51.592972 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.593014 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.593054 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.593093 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.604866 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.604922 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.604963 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.605003 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.605043 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.616852 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.616907 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.616950 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.616990 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.617030 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.617070 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.628908 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.628963 (XEN) No periodic timer Apr 24 21:18:51.629006 (XEN) UNIT17 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.629052 (XEN) VCPU17: CPU95 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.640918 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.640976 (XEN) GICH_LRs (vcpu 17) mask=0 Apr 24 21:18:51.641019 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.641060 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.652907 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.652961 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.653003 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.653043 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.653083 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.653123 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.664901 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.664956 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.664997 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.665037 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.665076 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.676902 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.676959 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.677002 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.677042 (XEN) No periodic timer Apr 24 21:18:51.677083 (XEN) UNIT18 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.688904 (XEN) VCPU18: CPU7 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.688968 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.689012 (XEN) GICH_LRs (vcpu 18) mask=0 Apr 24 21:18:51.700906 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.700961 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.701002 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.701042 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.701081 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.701120 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.712903 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.712957 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.712999 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.713039 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.713078 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.713117 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.724873 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.724928 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.724970 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.725010 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.725050 (XEN) No periodic timer Apr 24 21:18:51.736905 (XEN) UNIT19 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.736965 (XEN) VCPU19: CPU21 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.748903 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.748961 (XEN) GICH_LRs (vcpu 19) mask=0 Apr 24 21:18:51.749005 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.749046 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.749085 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.760899 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.760955 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.760997 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.761037 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.761077 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.761116 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.772922 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.772977 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.773020 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.773060 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.773100 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.773140 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.784926 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.784982 (XEN) No periodic timer Apr 24 21:18:51.785025 (XEN) UNIT20 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.785071 (XEN) VCPU20: CPU36 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.796922 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.796979 (XEN) GICH_LRs (vcpu 20) mask=0 Apr 24 21:18:51.797024 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.808873 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.808930 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.808971 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.809011 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.809052 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.809092 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.820904 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.820960 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.821001 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.821041 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.821081 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.821120 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.832901 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.832957 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.832999 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.833039 (XEN) No periodic timer Apr 24 21:18:51.833080 (XEN) UNIT21 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.844919 (XEN) VCPU21: CPU54 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.844981 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.845026 (XEN) GICH_LRs (vcpu 21) mask=0 Apr 24 21:18:51.856889 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.856943 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.856985 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.857025 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.857064 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.868913 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.868968 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.869010 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.869050 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.869090 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.869129 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.880903 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.880958 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.880999 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.881039 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.881079 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.881119 (XEN) No periodic timer Apr 24 21:18:51.892907 (XEN) UNIT22 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.892968 (XEN) VCPU22: CPU69 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.904908 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.904966 (XEN) GICH_LRs (vcpu 22) mask=0 Apr 24 21:18:51.905010 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.905050 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.905090 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.916908 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.916963 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.917005 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.917044 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.917084 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.917124 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.928902 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.928958 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.928999 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.929039 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.929080 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.929120 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.940906 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.940961 (XEN) No periodic timer Apr 24 21:18:51.941003 (XEN) UNIT23 affinities: hard={0-95} soft={0-95} Apr 24 21:18:51.941049 (XEN) VCPU23: CPU86 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:51.952914 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:51.952971 (XEN) GICH_LRs (vcpu 23) mask=0 Apr 24 21:18:51.953016 (XEN) VCPU_LR[0]=0 Apr 24 21:18:51.964914 (XEN) VCPU_LR[1]=0 Apr 24 21:18:51.964969 (XEN) VCPU_LR[2]=0 Apr 24 21:18:51.965011 (XEN) VCPU_LR[3]=0 Apr 24 21:18:51.965051 (XEN) VCPU_LR[4]=0 Apr 24 21:18:51.965090 (XEN) VCPU_LR[5]=0 Apr 24 21:18:51.965130 (XEN) VCPU_LR[6]=0 Apr 24 21:18:51.976899 (XEN) VCPU_LR[7]=0 Apr 24 21:18:51.976954 (XEN) VCPU_LR[8]=0 Apr 24 21:18:51.976996 (XEN) VCPU_LR[9]=0 Apr 24 21:18:51.977055 (XEN) VCPU_LR[10]=0 Apr 24 21:18:51.977099 (XEN) VCPU_LR[11]=0 Apr 24 21:18:51.988904 (XEN) VCPU_LR[12]=0 Apr 24 21:18:51.988959 (XEN) VCPU_LR[13]=0 Apr 24 21:18:51.989001 (XEN) VCPU_LR[14]=0 Apr 24 21:18:51.989041 (XEN) VCPU_LR[15]=0 Apr 24 21:18:51.989081 (XEN) No periodic timer Apr 24 21:18:51.989122 (XEN) UNIT24 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.000929 (XEN) VCPU24: CPU35 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.000993 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.012912 (XEN) GICH_LRs (vcpu 24) mask=0 Apr 24 21:18:52.012970 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.013012 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.013052 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.013092 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.013132 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.024915 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.024970 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.025012 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.025052 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.025092 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.025132 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.036905 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.036960 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.037001 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.037041 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.037082 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.048910 (XEN) No periodic timer Apr 24 21:18:52.048965 (XEN) UNIT25 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.049013 (XEN) VCPU25: CPU22 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.060917 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.060975 (XEN) GICH_LRs (vcpu 25) mask=0 Apr 24 21:18:52.061020 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.061061 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.061101 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.072908 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.072964 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.073005 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.073045 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.073086 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.073126 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.084913 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.084968 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.085010 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.085051 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.085091 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.085131 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.096915 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.096970 (XEN) No periodic timer Apr 24 21:18:52.097012 (XEN) UNIT26 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.097058 (XEN) VCPU26: CPU37 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.108900 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.108957 (XEN) GICH_LRs (vcpu 26) mask=0 Apr 24 21:18:52.120918 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.120973 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.121014 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.121054 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.121094 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.121134 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.132903 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.132957 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.132999 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.133039 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.133078 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.133117 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.144911 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.144966 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.145008 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.145048 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.145088 (XEN) No periodic timer Apr 24 21:18:52.145129 (XEN) UNIT27 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.156916 (XEN) VCPU27: CPU57 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.156979 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.168901 (XEN) GICH_LRs (vcpu 27) mask=0 Apr 24 21:18:52.168958 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.169001 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.169041 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.169080 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.180901 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.180956 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.181017 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.181061 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.181101 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.181141 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.192919 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.192975 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.193017 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.193057 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.193097 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.193136 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.204901 (XEN) No periodic timer Apr 24 21:18:52.204958 (XEN) UNIT28 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.205005 (XEN) VCPU28: CPU70 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.216901 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.216959 (XEN) GICH_LRs (vcpu 28) mask=0 Apr 24 21:18:52.217003 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.217043 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.217083 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.228909 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.228963 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.229005 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.229045 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.229084 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.240901 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.240956 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.240997 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.241037 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.241077 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.241116 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.252883 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.252938 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.252980 (XEN) No periodic timer Apr 24 21:18:52.253021 (XEN) UNIT29 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.264830 (XEN) VCPU29: CPU91 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.264894 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.264940 (XEN) GICH_LRs (vcpu 29) mask=0 Apr 24 21:18:52.280875 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.280929 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.280971 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.281011 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.281051 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.281090 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.281129 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.281169 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.292866 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.292921 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.292962 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.293002 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.293042 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.293081 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.304881 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.304936 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.304977 (XEN) No periodic timer Apr 24 21:18:52.305018 (XEN) UNIT30 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.316872 (XEN) VCPU30: CPU85 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.316936 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.316981 (XEN) GICH_LRs (vcpu 30) mask=0 Apr 24 21:18:52.328820 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.328869 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.328910 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.328950 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.328991 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.329032 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.340865 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.340921 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.340962 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.341003 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.341044 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.341085 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.352858 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.352914 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.352956 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.352997 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.353037 (XEN) No periodic timer Apr 24 21:18:52.353079 (XEN) UNIT31 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.364871 (XEN) VCPU31: CPU23 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.364935 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.376880 (XEN) GICH_LRs (vcpu 31) mask=0 Apr 24 21:18:52.376937 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.377000 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.377044 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.388862 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.388921 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.388963 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.389004 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.389043 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.389083 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.389123 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.400850 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.400905 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.400948 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.400989 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.401030 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.412864 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.412921 (XEN) No periodic timer Apr 24 21:18:52.412964 (XEN) UNIT32 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.413011 (XEN) VCPU32: CPU40 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.424877 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.424935 (XEN) GICH_LRs (vcpu 32) mask=0 Apr 24 21:18:52.424980 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.425021 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.436850 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.436907 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.436950 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.436991 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.437030 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.437072 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.448877 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.448933 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.448976 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.449016 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.449056 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.449097 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.460868 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.460923 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.460965 (XEN) No periodic timer Apr 24 21:18:52.461006 (XEN) UNIT33 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.476833 (XEN) VCPU33: CPU59 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.476898 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.476944 (XEN) GICH_LRs (vcpu 33) mask=0 Apr 24 21:18:52.476987 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.477027 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.488824 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.488878 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.488920 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.488961 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.489002 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.504929 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.504985 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.505028 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.505069 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.505110 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.505151 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.505192 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.505233 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.520910 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.520966 (XEN) No periodic timer Apr 24 21:18:52.521011 (XEN) UNIT34 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.521059 (XEN) VCPU34: CPU71 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.532856 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.532917 (XEN) GICH_LRs (vcpu 34) mask=0 Apr 24 21:18:52.532964 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.533007 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.533048 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.544898 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.544954 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.544997 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.545039 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.545079 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.545121 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.556905 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.556962 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.557005 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.557046 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.557087 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.557128 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.568879 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.568936 (XEN) No periodic timer Apr 24 21:18:52.568980 (XEN) UNIT35 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.569028 (XEN) VCPU35: CPU56 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.580934 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.580993 (XEN) GICH_LRs (vcpu 35) mask=0 Apr 24 21:18:52.581039 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.592887 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.592945 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.592989 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.593031 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.593071 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.593112 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.593153 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.604924 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.604981 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.605024 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.605065 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.605107 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.616905 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.616962 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.617006 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.617048 (XEN) No periodic timer Apr 24 21:18:52.617091 (XEN) UNIT36 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.628911 (XEN) VCPU36: CPU7 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.628974 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.640907 (XEN) GICH_LRs (vcpu 36) mask=0 Apr 24 21:18:52.640967 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.641010 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.641053 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.641094 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.641136 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.652909 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.652965 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.653009 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.653051 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.653092 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.653134 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.664908 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.664964 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.665008 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.665049 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.665091 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.665132 (XEN) No periodic timer Apr 24 21:18:52.676905 (XEN) UNIT37 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.676967 (XEN) VCPU37: CPU24 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.688905 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.688966 (XEN) GICH_LRs (vcpu 37) mask=0 Apr 24 21:18:52.689012 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.689054 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.689096 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.700912 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.700969 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.701013 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.701055 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.701097 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.701138 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.712901 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.712958 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.713000 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.713042 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.713084 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.713125 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.724898 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.724955 (XEN) No periodic timer Apr 24 21:18:52.724999 (XEN) UNIT38 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.725046 (XEN) VCPU38: CPU39 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.736928 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.736986 (XEN) GICH_LRs (vcpu 38) mask=0 Apr 24 21:18:52.737032 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.748897 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.748955 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.748999 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.749040 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.749082 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.760900 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.760958 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.761004 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.761044 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.761086 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.761128 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.772910 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.772968 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.773011 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.773070 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.773115 (XEN) No periodic timer Apr 24 21:18:52.773158 (XEN) UNIT39 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.784906 (XEN) VCPU39: CPU63 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.784971 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.796901 (XEN) GICH_LRs (vcpu 39) mask=0 Apr 24 21:18:52.796959 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.797002 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.797043 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.797084 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.797124 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.808913 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.808968 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.809011 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.809053 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.809094 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.809136 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.820904 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.820961 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.821003 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.821045 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.821087 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.832900 (XEN) No periodic timer Apr 24 21:18:52.832957 (XEN) UNIT40 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.833006 (XEN) VCPU40: CPU72 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.844913 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.844972 (XEN) GICH_LRs (vcpu 40) mask=0 Apr 24 21:18:52.845018 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.845060 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.845102 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.856914 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.856971 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.857014 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.857055 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.857096 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.857135 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.868904 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.868960 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.869002 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.869043 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.869085 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.880907 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.880965 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.881008 (XEN) No periodic timer Apr 24 21:18:52.881050 (XEN) UNIT41 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.892907 (XEN) VCPU41: CPU94 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.892972 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.893019 (XEN) GICH_LRs (vcpu 41) mask=0 Apr 24 21:18:52.904909 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.904966 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.905009 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.905050 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.905092 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.905132 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.916908 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.916964 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.917008 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.917049 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.917089 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.917129 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.928904 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.928961 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.929003 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.929044 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.929084 (XEN) No periodic timer Apr 24 21:18:52.929127 (XEN) UNIT42 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.940914 (XEN) VCPU42: CPU8 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:52.940978 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:52.952920 (XEN) GICH_LRs (vcpu 42) mask=0 Apr 24 21:18:52.952979 (XEN) VCPU_LR[0]=0 Apr 24 21:18:52.953021 (XEN) VCPU_LR[1]=0 Apr 24 21:18:52.953061 (XEN) VCPU_LR[2]=0 Apr 24 21:18:52.953103 (XEN) VCPU_LR[3]=0 Apr 24 21:18:52.953143 (XEN) VCPU_LR[4]=0 Apr 24 21:18:52.964915 (XEN) VCPU_LR[5]=0 Apr 24 21:18:52.964970 (XEN) VCPU_LR[6]=0 Apr 24 21:18:52.965012 (XEN) VCPU_LR[7]=0 Apr 24 21:18:52.965052 (XEN) VCPU_LR[8]=0 Apr 24 21:18:52.965092 (XEN) VCPU_LR[9]=0 Apr 24 21:18:52.965131 (XEN) VCPU_LR[10]=0 Apr 24 21:18:52.976927 (XEN) VCPU_LR[11]=0 Apr 24 21:18:52.976982 (XEN) VCPU_LR[12]=0 Apr 24 21:18:52.977024 (XEN) VCPU_LR[13]=0 Apr 24 21:18:52.977065 (XEN) VCPU_LR[14]=0 Apr 24 21:18:52.977106 (XEN) VCPU_LR[15]=0 Apr 24 21:18:52.988910 (XEN) No periodic timer Apr 24 21:18:52.988966 (XEN) UNIT43 affinities: hard={0-95} soft={0-95} Apr 24 21:18:52.989013 (XEN) VCPU43: CPU51 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.000905 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.000963 (XEN) GICH_LRs (vcpu 43) mask=0 Apr 24 21:18:53.001007 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.001047 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.012842 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.012898 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.012940 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.012981 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.013022 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.013062 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.024908 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.024964 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.025005 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.025046 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.025086 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.025127 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.036882 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.036938 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.036979 (XEN) No periodic timer Apr 24 21:18:53.037021 (XEN) UNIT44 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.048917 (XEN) VCPU44: CPU84 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.048980 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.049025 (XEN) GICH_LRs (vcpu 44) mask=0 Apr 24 21:18:53.060843 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.060899 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.060941 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.060981 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.061022 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.061062 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.072921 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.072977 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.073019 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.073060 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.073100 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.073140 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.084902 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.084958 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.085000 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.085040 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.085080 (XEN) No periodic timer Apr 24 21:18:53.085121 (XEN) UNIT45 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.096922 (XEN) VCPU45: CPU52 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.096985 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.108901 (XEN) GICH_LRs (vcpu 45) mask=0 Apr 24 21:18:53.108959 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.109001 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.109041 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.109082 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.120903 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.120958 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.120999 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.121039 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.121079 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.132902 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.132958 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.133000 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.133040 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.133080 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.133119 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.144908 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.144963 (XEN) No periodic timer Apr 24 21:18:53.145006 (XEN) UNIT46 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.145052 (XEN) VCPU46: CPU73 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.156908 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.156966 (XEN) GICH_LRs (vcpu 46) mask=0 Apr 24 21:18:53.157010 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.157050 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.168904 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.168958 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.169000 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.169039 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.169097 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.169140 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.180911 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.180966 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.181007 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.181047 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.181087 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.181127 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.192924 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.192979 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.193020 (XEN) No periodic timer Apr 24 21:18:53.193061 (XEN) UNIT47 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.204909 (XEN) VCPU47: CPU80 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.204972 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.205017 (XEN) GICH_LRs (vcpu 47) mask=0 Apr 24 21:18:53.216908 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.216963 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.217005 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.217045 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.217085 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.217126 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.228904 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.228958 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.229000 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.229040 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.229080 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.229119 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.240866 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.240921 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.240962 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.241003 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.241043 (XEN) No periodic timer Apr 24 21:18:53.241084 (XEN) UNIT48 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.252910 (XEN) VCPU48: CPU9 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.264902 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.264961 (XEN) GICH_LRs (vcpu 48) mask=0 Apr 24 21:18:53.265006 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.265046 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.265086 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.276907 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.276961 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.277003 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.277043 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.277082 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.277122 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.288902 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.288957 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.288999 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.289039 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.289079 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.289118 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.300921 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.300976 (XEN) No periodic timer Apr 24 21:18:53.301019 (XEN) UNIT49 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.301065 (XEN) VCPU49: CPU25 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.312922 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.312980 (XEN) GICH_LRs (vcpu 49) mask=0 Apr 24 21:18:53.313024 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.324906 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.324963 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.325006 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.325046 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.325086 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.325126 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.336902 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.336959 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.337001 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.337042 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.337082 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.337121 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.348915 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.348971 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.349013 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.349054 (XEN) No periodic timer Apr 24 21:18:53.349095 (XEN) UNIT50 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.360913 (XEN) VCPU50: CPU41 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.360976 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.361020 (XEN) GICH_LRs (vcpu 50) mask=0 Apr 24 21:18:53.372916 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.372990 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.373035 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.373075 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.373115 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.384903 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.384958 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.385000 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.385040 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.385080 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.385120 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.396903 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.396958 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.397000 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.397040 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.397080 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.397120 (XEN) No periodic timer Apr 24 21:18:53.408912 (XEN) UNIT51 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.408973 (XEN) VCPU51: CPU61 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.420904 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.420962 (XEN) GICH_LRs (vcpu 51) mask=0 Apr 24 21:18:53.421006 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.421046 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.421086 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.432910 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.432966 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.433008 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.433048 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.433088 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.433128 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.444915 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.444969 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.445011 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.445051 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.445091 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.445131 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.456903 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.456958 (XEN) No periodic timer Apr 24 21:18:53.457000 (XEN) UNIT52 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.457046 (XEN) VCPU52: CPU74 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.468918 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.468976 (XEN) GICH_LRs (vcpu 52) mask=0 Apr 24 21:18:53.469020 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.480909 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.480965 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.481006 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.481046 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.481085 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.481125 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.492904 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.492959 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.493000 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.493041 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.493081 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.493121 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.504897 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.504953 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.504995 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.505036 (XEN) No periodic timer Apr 24 21:18:53.505077 (XEN) UNIT53 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.516911 (XEN) VCPU53: CPU89 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.516973 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.528901 (XEN) GICH_LRs (vcpu 53) mask=0 Apr 24 21:18:53.528959 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.529001 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.529040 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.529080 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.529120 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.540910 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.540965 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.541006 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.541046 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.541086 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.541125 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.552924 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.552979 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.553021 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.553061 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.553101 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.564908 (XEN) No periodic timer Apr 24 21:18:53.564963 (XEN) UNIT54 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.565011 (XEN) VCPU54: CPU10 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.576925 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.576984 (XEN) GICH_LRs (vcpu 54) mask=0 Apr 24 21:18:53.577029 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.577070 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.577110 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.588902 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.588957 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.588998 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.589038 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.589078 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.589117 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.600922 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.600976 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.601018 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.601058 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.601098 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.601137 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.612913 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.612967 (XEN) No periodic timer Apr 24 21:18:53.613009 (XEN) UNIT55 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.613055 (XEN) VCPU55: CPU26 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.624921 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.624978 (XEN) GICH_LRs (vcpu 55) mask=0 Apr 24 21:18:53.625022 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.636908 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.636963 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.637005 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.637045 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.637085 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.648904 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.648960 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.649001 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.649041 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.649081 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.649121 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.660908 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.660963 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.661005 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.661046 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.661086 (XEN) No periodic timer Apr 24 21:18:53.661127 (XEN) UNIT56 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.672915 (XEN) VCPU56: CPU42 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.672979 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.684912 (XEN) GICH_LRs (vcpu 56) mask=0 Apr 24 21:18:53.684969 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.685011 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.685050 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.685090 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.696911 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.696967 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.697009 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.697049 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.697089 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.697129 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.708903 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.708959 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.709000 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.709040 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.709081 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.709120 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.720908 (XEN) No periodic timer Apr 24 21:18:53.720964 (XEN) UNIT57 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.721011 (XEN) VCPU57: CPU17 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.732912 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.732970 (XEN) GICH_LRs (vcpu 57) mask=0 Apr 24 21:18:53.733014 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.733055 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.733095 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.744908 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.744962 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.745003 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.745043 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.745083 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.745123 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.756902 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.756956 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.756998 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.757038 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.757077 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.768907 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.768981 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.769026 (XEN) No periodic timer Apr 24 21:18:53.769068 (XEN) UNIT58 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.780921 (XEN) VCPU58: CPU53 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.780985 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.781030 (XEN) GICH_LRs (vcpu 58) mask=0 Apr 24 21:18:53.792906 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.792961 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.793003 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.793043 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.793083 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.793123 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.804918 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.804972 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.805014 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.805053 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.805093 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.805133 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.816916 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.816972 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.817013 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.817053 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.817093 (XEN) No periodic timer Apr 24 21:18:53.817134 (XEN) UNIT59 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.828918 (XEN) VCPU59: CPU92 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.828981 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.840906 (XEN) GICH_LRs (vcpu 59) mask=0 Apr 24 21:18:53.840964 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.841006 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.841046 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.841086 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.852875 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.852930 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.852972 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.853012 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.853052 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.853091 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.864915 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.864970 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.865012 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.865052 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.865092 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.865132 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.876916 (XEN) No periodic timer Apr 24 21:18:53.876972 (XEN) UNIT60 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.877019 (XEN) VCPU60: CPU11 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.888900 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.888958 (XEN) GICH_LRs (vcpu 60) mask=0 Apr 24 21:18:53.889002 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.889043 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.900908 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.900962 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.901003 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.901043 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.901083 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.901123 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.912913 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.912968 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.913009 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.913049 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.913088 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.924903 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.924959 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.925001 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.925041 (XEN) No periodic timer Apr 24 21:18:53.925082 (XEN) UNIT61 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.936903 (XEN) VCPU61: CPU27 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.936966 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.937011 (XEN) GICH_LRs (vcpu 61) mask=0 Apr 24 21:18:53.948911 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.948966 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.949008 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.949049 (XEN) VCPU_LR[3]=0 Apr 24 21:18:53.949088 (XEN) VCPU_LR[4]=0 Apr 24 21:18:53.949128 (XEN) VCPU_LR[5]=0 Apr 24 21:18:53.960908 (XEN) VCPU_LR[6]=0 Apr 24 21:18:53.960963 (XEN) VCPU_LR[7]=0 Apr 24 21:18:53.961004 (XEN) VCPU_LR[8]=0 Apr 24 21:18:53.961044 (XEN) VCPU_LR[9]=0 Apr 24 21:18:53.961084 (XEN) VCPU_LR[10]=0 Apr 24 21:18:53.961142 (XEN) VCPU_LR[11]=0 Apr 24 21:18:53.972906 (XEN) VCPU_LR[12]=0 Apr 24 21:18:53.972961 (XEN) VCPU_LR[13]=0 Apr 24 21:18:53.973003 (XEN) VCPU_LR[14]=0 Apr 24 21:18:53.973043 (XEN) VCPU_LR[15]=0 Apr 24 21:18:53.973083 (XEN) No periodic timer Apr 24 21:18:53.984917 (XEN) UNIT62 affinities: hard={0-95} soft={0-95} Apr 24 21:18:53.985008 (XEN) VCPU62: CPU43 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:53.985061 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:53.996906 (XEN) GICH_LRs (vcpu 62) mask=0 Apr 24 21:18:53.996963 (XEN) VCPU_LR[0]=0 Apr 24 21:18:53.997005 (XEN) VCPU_LR[1]=0 Apr 24 21:18:53.997045 (XEN) VCPU_LR[2]=0 Apr 24 21:18:53.997085 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.008903 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.008959 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.009001 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.009041 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.009081 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.020904 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.020960 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.021003 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.021043 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.021084 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.021124 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.032910 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.032965 (XEN) No periodic timer Apr 24 21:18:54.033008 (XEN) UNIT63 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.033055 (XEN) VCPU63: CPU61 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.044903 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.044962 (XEN) GICH_LRs (vcpu 63) mask=0 Apr 24 21:18:54.045006 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.056918 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.056973 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.057016 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.057056 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.057097 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.057137 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.068904 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.068961 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.069004 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.069044 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.069085 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.069125 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.080908 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.080965 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.081007 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.081048 (XEN) No periodic timer Apr 24 21:18:54.081090 (XEN) UNIT64 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.092941 (XEN) VCPU64: CPU75 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.093005 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.093050 (XEN) GICH_LRs (vcpu 64) mask=0 Apr 24 21:18:54.104918 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.104973 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.105015 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.105055 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.105095 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.105135 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.116902 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.116957 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.116998 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.117038 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.117078 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.117117 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.128915 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.128970 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.129011 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.129052 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.129092 (XEN) No periodic timer Apr 24 21:18:54.140899 (XEN) UNIT65 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.140960 (XEN) VCPU65: CPU93 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.152902 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.152959 (XEN) GICH_LRs (vcpu 65) mask=0 Apr 24 21:18:54.153003 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.153043 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.153083 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.164909 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.164964 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.165005 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.165064 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.165107 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.165147 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.176906 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.176961 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.177003 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.177044 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.177083 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.177123 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.188896 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.188952 (XEN) No periodic timer Apr 24 21:18:54.188994 (XEN) UNIT66 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.189040 (XEN) VCPU66: CPU12 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.200928 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.200985 (XEN) GICH_LRs (vcpu 66) mask=0 Apr 24 21:18:54.201028 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.212908 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.212963 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.213004 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.213043 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.213083 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.213122 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.224906 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.224962 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.225003 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.225043 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.225084 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.225124 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.236908 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.236963 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.237005 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.237045 (XEN) No periodic timer Apr 24 21:18:54.237086 (XEN) UNIT67 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.248912 (XEN) VCPU67: CPU28 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.248976 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.249020 (XEN) GICH_LRs (vcpu 67) mask=0 Apr 24 21:18:54.260910 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.260965 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.261006 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.261047 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.261087 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.272899 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.272954 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.272996 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.273035 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.273075 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.284903 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.284961 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.285003 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.285043 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.285083 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.285123 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.296895 (XEN) No periodic timer Apr 24 21:18:54.296950 (XEN) UNIT68 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.296997 (XEN) VCPU68: CPU44 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.308906 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.308964 (XEN) GICH_LRs (vcpu 68) mask=0 Apr 24 21:18:54.309008 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.309049 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.309089 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.320921 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.320976 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.321017 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.321057 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.321096 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.321136 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.332914 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.332969 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.333011 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.333051 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.333091 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.333132 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.344904 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.344958 (XEN) No periodic timer Apr 24 21:18:54.345001 (XEN) UNIT69 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.345047 (XEN) VCPU69: CPU49 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.356922 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.356980 (XEN) GICH_LRs (vcpu 69) mask=0 Apr 24 21:18:54.357023 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.368933 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.369006 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.369052 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.369092 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.369131 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.369171 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.380906 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.380961 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.381002 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.381042 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.381082 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.381122 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.392898 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.392953 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.392994 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.393034 (XEN) No periodic timer Apr 24 21:18:54.393076 (XEN) UNIT70 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.404915 (XEN) VCPU70: CPU76 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.404978 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.416912 (XEN) GICH_LRs (vcpu 70) mask=0 Apr 24 21:18:54.416969 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.417011 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.417050 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.417090 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.428908 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.428964 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.429005 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.429046 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.429086 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.429126 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.440902 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.440958 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.440999 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.441040 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.441080 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.441120 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.452913 (XEN) No periodic timer Apr 24 21:18:54.452969 (XEN) UNIT71 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.453016 (XEN) VCPU71: CPU80 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.464911 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.464969 (XEN) GICH_LRs (vcpu 71) mask=0 Apr 24 21:18:54.465013 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.465053 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.476899 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.476956 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.476999 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.477039 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.477078 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.477118 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.488900 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.488957 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.488999 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.489039 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.489079 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.489118 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.500907 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.500963 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.501005 (XEN) No periodic timer Apr 24 21:18:54.501046 (XEN) UNIT72 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.501092 (XEN) VCPU72: CPU13 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.512914 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.512971 (XEN) GICH_LRs (vcpu 72) mask=0 Apr 24 21:18:54.513015 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.524902 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.524956 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.524998 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.525038 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.525078 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.536903 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.536959 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.537000 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.537040 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.537080 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.537119 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.548903 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.548958 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.548999 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.549039 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.549079 (XEN) No periodic timer Apr 24 21:18:54.560904 (XEN) UNIT73 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.560966 (XEN) VCPU73: CPU29 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.561036 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.572916 (XEN) GICH_LRs (vcpu 73) mask=0 Apr 24 21:18:54.572973 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.573014 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.573054 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.573093 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.584905 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.584960 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.585002 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.585042 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.585082 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.585121 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.596918 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.596973 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.597015 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.597055 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.597095 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.597135 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.608907 (XEN) No periodic timer Apr 24 21:18:54.608962 (XEN) UNIT74 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.609009 (XEN) VCPU74: CPU45 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.620923 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.620981 (XEN) GICH_LRs (vcpu 74) mask=0 Apr 24 21:18:54.621025 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.621066 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.632903 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.632958 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.632999 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.633039 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.633079 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.633119 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.644895 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.644951 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.644992 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.645032 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.645072 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.656901 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.656956 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.656998 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.657038 (XEN) No periodic timer Apr 24 21:18:54.657079 (XEN) UNIT75 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.668905 (XEN) VCPU75: CPU51 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.668969 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.669013 (XEN) GICH_LRs (vcpu 75) mask=0 Apr 24 21:18:54.680906 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.680961 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.681002 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.681042 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.681081 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.681121 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.692913 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.692967 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.693008 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.693049 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.693089 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.693129 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.704913 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.704968 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.705010 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.705049 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.705089 (XEN) No periodic timer Apr 24 21:18:54.716909 (XEN) UNIT76 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.716970 (XEN) VCPU76: CPU77 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.717020 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.728922 (XEN) GICH_LRs (vcpu 76) mask=0 Apr 24 21:18:54.728980 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.729022 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.729062 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.729102 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.740914 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.740969 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.741010 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.741050 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.741089 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.741129 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.752905 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.752960 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.753001 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.753041 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.753081 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.753121 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.764935 (XEN) No periodic timer Apr 24 21:18:54.764992 (XEN) UNIT77 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.765040 (XEN) VCPU77: CPU81 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.776898 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.776956 (XEN) GICH_LRs (vcpu 77) mask=0 Apr 24 21:18:54.777000 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.788906 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.788962 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.789004 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.789044 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.789084 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.789124 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.800918 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.800973 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.801014 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.801054 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.801094 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.801133 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.812950 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.813005 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.813047 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.813088 (XEN) No periodic timer Apr 24 21:18:54.813129 (XEN) UNIT78 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.824907 (XEN) VCPU78: CPU14 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.824971 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.825015 (XEN) GICH_LRs (vcpu 78) mask=0 Apr 24 21:18:54.836903 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.836959 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.837000 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.837040 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.837080 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.848913 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.848968 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.849010 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.849050 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.849090 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.849130 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.860914 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.860969 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.861010 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.861051 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.861091 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.861130 (XEN) No periodic timer Apr 24 21:18:54.872920 (XEN) UNIT79 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.872980 (XEN) VCPU79: CPU30 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.873031 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.884903 (XEN) GICH_LRs (vcpu 79) mask=0 Apr 24 21:18:54.884960 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.885003 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.885043 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.885082 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.896907 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.896962 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.897003 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.897043 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.897083 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.897122 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.908900 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.908955 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.908997 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.909037 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.909077 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.920912 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.920967 (XEN) No periodic timer Apr 24 21:18:54.921009 (XEN) UNIT80 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.921056 (XEN) VCPU80: CPU46 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.932913 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.932970 (XEN) GICH_LRs (vcpu 80) mask=0 Apr 24 21:18:54.933014 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.944923 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.944977 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.945019 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.945059 (XEN) VCPU_LR[4]=0 Apr 24 21:18:54.945099 (XEN) VCPU_LR[5]=0 Apr 24 21:18:54.945139 (XEN) VCPU_LR[6]=0 Apr 24 21:18:54.956910 (XEN) VCPU_LR[7]=0 Apr 24 21:18:54.956966 (XEN) VCPU_LR[8]=0 Apr 24 21:18:54.957007 (XEN) VCPU_LR[9]=0 Apr 24 21:18:54.957048 (XEN) VCPU_LR[10]=0 Apr 24 21:18:54.957110 (XEN) VCPU_LR[11]=0 Apr 24 21:18:54.957153 (XEN) VCPU_LR[12]=0 Apr 24 21:18:54.968905 (XEN) VCPU_LR[13]=0 Apr 24 21:18:54.968960 (XEN) VCPU_LR[14]=0 Apr 24 21:18:54.969002 (XEN) VCPU_LR[15]=0 Apr 24 21:18:54.969042 (XEN) No periodic timer Apr 24 21:18:54.969082 (XEN) UNIT81 affinities: hard={0-95} soft={0-95} Apr 24 21:18:54.980924 (XEN) VCPU81: CPU52 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:54.980988 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:54.981032 (XEN) GICH_LRs (vcpu 81) mask=0 Apr 24 21:18:54.992908 (XEN) VCPU_LR[0]=0 Apr 24 21:18:54.992963 (XEN) VCPU_LR[1]=0 Apr 24 21:18:54.993004 (XEN) VCPU_LR[2]=0 Apr 24 21:18:54.993045 (XEN) VCPU_LR[3]=0 Apr 24 21:18:54.993085 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.004914 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.004969 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.005011 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.005051 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.005092 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.005132 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.016906 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.016962 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.017005 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.017046 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.017086 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.017126 (XEN) No periodic timer Apr 24 21:18:55.028906 (XEN) UNIT82 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.028967 (XEN) VCPU82: CPU78 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.040910 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.040968 (XEN) GICH_LRs (vcpu 82) mask=0 Apr 24 21:18:55.041013 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.041054 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.041094 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.052916 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.052971 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.053013 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.053053 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.053093 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.053133 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.064759 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.064788 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.064811 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.064833 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.064856 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.076849 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.076905 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.076947 (XEN) No periodic timer Apr 24 21:18:55.076988 (XEN) UNIT83 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.077035 (XEN) VCPU83: CPU82 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.088891 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.088949 (XEN) GICH_LRs (vcpu 83) mask=0 Apr 24 21:18:55.088993 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.100765 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.100795 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.100817 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.100839 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.100861 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.100883 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.112761 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.112791 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.112814 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.112835 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.112857 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.112879 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.124767 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.124797 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.124820 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.124842 (XEN) No periodic timer Apr 24 21:18:55.124865 (XEN) UNIT84 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.136760 (XEN) VCPU84: CPU15 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.136794 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.148758 (XEN) GICH_LRs (vcpu 84) mask=0 Apr 24 21:18:55.148789 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.148813 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.148835 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.148856 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.148878 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.160838 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.160892 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.160952 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.160996 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.161036 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.172904 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.172960 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.173002 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.173042 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.173082 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.173122 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.184897 (XEN) No periodic timer Apr 24 21:18:55.184952 (XEN) UNIT85 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.184999 (XEN) VCPU85: CPU47 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.196912 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.196970 (XEN) GICH_LRs (vcpu 85) mask=0 Apr 24 21:18:55.197015 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.197056 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.208918 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.208974 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.209016 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.209056 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.209095 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.209135 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.220903 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.220958 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.221000 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.221040 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.221080 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.221120 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.232922 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.232978 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.233020 (XEN) No periodic timer Apr 24 21:18:55.233061 (XEN) UNIT86 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.233106 (XEN) VCPU86: CPU31 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.244916 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.244974 (XEN) GICH_LRs (vcpu 86) mask=0 Apr 24 21:18:55.245018 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.256911 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.256966 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.257008 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.257048 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.257087 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.257127 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.268912 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.268967 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.269009 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.269049 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.269089 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.280891 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.280948 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.280990 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.281031 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.281070 (XEN) No periodic timer Apr 24 21:18:55.292902 (XEN) UNIT87 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.292963 (XEN) VCPU87: CPU54 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.293014 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.304918 (XEN) GICH_LRs (vcpu 87) mask=0 Apr 24 21:18:55.304975 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.305017 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.305059 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.305099 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.316918 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.316972 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.317014 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.317054 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.317094 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.317135 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.328914 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.328969 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.329010 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.329051 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.329091 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.329132 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.340909 (XEN) No periodic timer Apr 24 21:18:55.340965 (XEN) UNIT88 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.341012 (XEN) VCPU88: CPU83 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.352922 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.352980 (XEN) GICH_LRs (vcpu 88) mask=0 Apr 24 21:18:55.353024 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.353064 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.364946 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.365003 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.365045 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.365085 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.365125 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.365165 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.376916 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.376971 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.377012 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.377052 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.377093 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.377133 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.388911 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.388967 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.389008 (XEN) No periodic timer Apr 24 21:18:55.389049 (XEN) UNIT89 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.389095 (XEN) VCPU89: CPU79 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.400912 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.400970 (XEN) GICH_LRs (vcpu 89) mask=0 Apr 24 21:18:55.412909 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.412964 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.413005 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.413045 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.413085 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.424905 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.424962 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.425004 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.425044 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.425084 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.425123 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.436903 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.436959 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.437001 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.437041 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.437081 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.437120 (XEN) No periodic timer Apr 24 21:18:55.448915 (XEN) UNIT90 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.448976 (XEN) VCPU90: CPU0 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.449026 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.460912 (XEN) GICH_LRs (vcpu 90) mask=0 Apr 24 21:18:55.460970 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.461011 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.461051 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.461091 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.472903 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.472957 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.472998 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.473038 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.473078 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.473117 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.484920 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.484975 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.485017 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.485057 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.485097 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.485137 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.496844 (XEN) No periodic timer Apr 24 21:18:55.496900 (XEN) UNIT91 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.496947 (XEN) VCPU91: CPU16 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.508862 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.508921 (XEN) GICH_LRs (vcpu 91) mask=0 Apr 24 21:18:55.508965 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.509006 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.520904 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.520959 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.521001 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.521041 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.521081 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.521121 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.532902 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.532957 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.532999 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.533040 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.533080 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.533119 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.544898 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.544953 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.544995 (XEN) No periodic timer Apr 24 21:18:55.545036 (XEN) UNIT92 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.556920 (XEN) VCPU92: CPU32 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.557003 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.557051 (XEN) GICH_LRs (vcpu 92) mask=0 Apr 24 21:18:55.568915 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.568970 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.569012 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.569052 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.569092 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.580910 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.580965 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.581006 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.581047 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.581087 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.581126 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.592906 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.592961 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.593003 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.593043 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.593083 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.593123 (XEN) No periodic timer Apr 24 21:18:55.604920 (XEN) UNIT93 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.604980 (XEN) VCPU93: CPU55 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.605031 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.616910 (XEN) GICH_LRs (vcpu 93) mask=0 Apr 24 21:18:55.616967 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.617009 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.617049 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.617089 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.628920 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.628975 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.629016 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.629056 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.629096 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.629135 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.640914 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.640968 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.641010 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.641050 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.641090 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.652911 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.652966 (XEN) No periodic timer Apr 24 21:18:55.653009 (XEN) UNIT94 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.653055 (XEN) VCPU94: CPU64 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.664903 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.664960 (XEN) GICH_LRs (vcpu 94) mask=0 Apr 24 21:18:55.665004 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.676908 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.676963 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.677004 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.677045 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.677085 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.677125 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.688908 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.688963 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.689004 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.689044 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.689085 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.689125 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.700913 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.700968 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.701012 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.701052 (XEN) No periodic timer Apr 24 21:18:55.701092 (XEN) UNIT95 affinities: hard={0-95} soft={0-95} Apr 24 21:18:55.712913 (XEN) VCPU95: CPU84 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 24 21:18:55.712977 (XEN) pause_count=0 pause_flags=1 Apr 24 21:18:55.724907 (XEN) GICH_LRs (vcpu 95) mask=0 Apr 24 21:18:55.724966 (XEN) VCPU_LR[0]=0 Apr 24 21:18:55.725007 (XEN) VCPU_LR[1]=0 Apr 24 21:18:55.725047 (XEN) VCPU_LR[2]=0 Apr 24 21:18:55.725087 (XEN) VCPU_LR[3]=0 Apr 24 21:18:55.725126 (XEN) VCPU_LR[4]=0 Apr 24 21:18:55.736916 (XEN) VCPU_LR[5]=0 Apr 24 21:18:55.736972 (XEN) VCPU_LR[6]=0 Apr 24 21:18:55.737013 (XEN) VCPU_LR[7]=0 Apr 24 21:18:55.737053 (XEN) VCPU_LR[8]=0 Apr 24 21:18:55.737093 (XEN) VCPU_LR[9]=0 Apr 24 21:18:55.737132 (XEN) VCPU_LR[10]=0 Apr 24 21:18:55.748906 (XEN) VCPU_LR[11]=0 Apr 24 21:18:55.748962 (XEN) VCPU_LR[12]=0 Apr 24 21:18:55.749004 (XEN) VCPU_LR[13]=0 Apr 24 21:18:55.749044 (XEN) VCPU_LR[14]=0 Apr 24 21:18:55.749084 (XEN) VCPU_LR[15]=0 Apr 24 21:18:55.749145 (XEN) No periodic timer Apr 24 21:18:55.760906 (XEN) Notifying guest 0:0 (virq 1, port 0) Apr 24 21:18:55.760966 (XEN) Notifying guest 0:1 (virq 1, port 0) Apr 24 21:18:55.761011 (XEN) Notifying guest 0:2 (virq 1, port 0) Apr 24 21:18:55.772911 (XEN) Notifying guest 0:3 (virq 1, port 0) Apr 24 21:18:55.772971 (XEN) Notifying guest 0:4 (virq 1, port 0) Apr 24 21:18:55.773016 (XEN) Notifying guest 0:5 (virq 1, port 0) Apr 24 21:18:55.784910 (XEN) Notifying guest 0:6 (virq 1, port 0) Apr 24 21:18:55.784969 (XEN) Notifying guest 0:7 (virq 1, port 0) Apr 24 21:18:55.785014 (XEN) Notifying guest 0:8 (virq 1, port 0) Apr 24 21:18:55.785057 (XEN) Notifying guest 0:9 (virq 1, port 0) Apr 24 21:18:55.796899 (XEN) Notifying guest 0:10 (virq 1, port 0) Apr 24 21:18:55.796957 (XEN) Notifying guest 0:11 (virq 1, port 0) Apr 24 21:18:55.808916 (XEN) Notifying guest 0:12 (virq 1, port 0) Apr 24 21:18:55.808975 (XEN) Notifying guest 0:13 (virq 1, port 0) Apr 24 21:18:55.809021 (XEN) Notifying guest 0:14 (virq 1, port 0) Apr 24 21:18:55.820915 (XEN) Notifying guest 0:15 (virq 1, port 0) Apr 24 21:18:55.820974 (XEN) Notifying guest 0:16 (virq 1, port 0) Apr 24 21:18:55.821020 (XEN) Notifying guest 0:17 (virq 1, port 0) Apr 24 21:18:55.832887 (XEN) Notifying guest 0:18 (virq 1, port 0) Apr 24 21:18:55.832947 (XEN) Notifying guest 0:19 (virq 1, port 0) Apr 24 21:18:55.832992 (XEN) Notifying guest 0:20 (virq 1, port 0) Apr 24 21:18:55.844899 (XEN) Notifying guest 0:21 (virq 1, port 0) Apr 24 21:18:55.844958 (XEN) Notifying guest 0:22 (virq 1, port 0) Apr 24 21:18:55.845004 (XEN) Notifying guest 0:23 (virq 1, port 0) Apr 24 21:18:55.856904 (XEN) Notifying guest 0:24 (virq 1, port 0) Apr 24 21:18:55.856963 (XEN) Notifying guest 0:25 (virq 1, port 0) Apr 24 21:18:55.857009 (XEN) Notifying guest 0:26 (virq 1, port 0) Apr 24 21:18:55.857052 (XEN) Notifying guest 0:27 (virq 1, port 0) Apr 24 21:18:55.868915 (XEN) Notifying guest 0:28 (virq 1, port 0) Apr 24 21:18:55.868972 (XEN) Notifying guest 0:29 (virq 1, port 0) Apr 24 21:18:55.869017 (XEN) Notifying guest 0:30 (virq 1, port 0) Apr 24 21:18:55.880921 (XEN) Notifying guest 0:31 (virq 1, port 0) Apr 24 21:18:55.880979 (XEN) Notifying guest 0:32 (virq 1, port 0) Apr 24 21:18:55.881024 (XEN) Notifying guest 0:33 (virq 1, port 0) Apr 24 21:18:55.892920 (XEN) Notifying guest 0:34 (virq 1, port 0) Apr 24 21:18:55.892977 (XEN) Notifying guest 0:35 (virq 1, port 0) Apr 24 21:18:55.893022 (XEN) Notifying guest 0:36 (virq 1, port 0) Apr 24 21:18:55.904907 (XEN) Notifying guest 0:37 (virq 1, port 0) Apr 24 21:18:55.904966 (XEN) Notifying guest 0:38 (virq 1, port 0) Apr 24 21:18:55.905010 (XEN) Notifying guest 0:39 (virq 1, port 0) Apr 24 21:18:55.916902 (XEN) Notifying guest 0:40 (virq 1, port 0) Apr 24 21:18:55.916960 (XEN) Notifying guest 0:41 (virq 1, port 0) Apr 24 21:18:55.928908 (XEN) Notifying guest 0:42 (virq 1, port 0) Apr 24 21:18:55.928968 (XEN) Notifying guest 0:43 (virq 1, port 0) Apr 24 21:18:55.929014 (XEN) Notifying guest 0:44 (virq 1, port 0) Apr 24 21:18:55.929057 (XEN) Notifying guest 0:45 (virq 1, port 0) Apr 24 21:18:55.940903 (XEN) Notifying guest 0:46 (virq 1, port 0) Apr 24 21:18:55.940961 (XEN) Notifying guest 0:47 (virq 1, port 0) Apr 24 21:18:55.941006 (XEN) Notifying guest 0:48 (virq 1, port 0) Apr 24 21:18:55.952925 (XEN) Notifying guest 0:49 (virq 1, port 0) Apr 24 21:18:55.952983 (XEN) Notifying guest 0:50 (virq 1, port 0) Apr 24 21:18:55.953028 (XEN) Notifying guest 0:51 (virq 1, port 0) Apr 24 21:18:55.964910 (XEN) Notifying guest 0:52 (virq 1, port 0) Apr 24 21:18:55.964968 (XEN) Notifying guest 0:53 (virq 1, port 0) Apr 24 21:18:55.965013 (XEN) Notifying guest 0:54 (virq 1, port 0) Apr 24 21:18:55.976912 (XEN) Notifying guest 0:55 (virq 1, port 0) Apr 24 21:18:55.976970 (XEN) Notifying guest 0:56 (virq 1, port 0) Apr 24 21:18:55.977015 (XEN) Notifying guest 0:57 (virq 1, port 0) Apr 24 21:18:55.988921 (XEN) Notifying guest 0:58 (virq 1, port 0) Apr 24 21:18:55.988980 (XEN) Notifying guest 0:59 (virq 1, port 0) Apr 24 21:18:55.989045 (XEN) Notifying guest 0:60 (virq 1, port 0) Apr 24 21:18:56.000909 (XEN) Notifying guest 0:61 (virq 1, port 0) Apr 24 21:18:56.000968 (XEN) Notifying guest 0:62 (virq 1, port 0) Apr 24 21:18:56.001013 (XEN) Notifying guest 0:63 (virq 1, port 0) Apr 24 21:18:56.012908 (XEN) Notifying guest 0:64 (virq 1, port 0) Apr 24 21:18:56.012967 (XEN) Notifying guest 0:65 (virq 1, port 0) Apr 24 21:18:56.013012 (XEN) Notifying guest 0:66 (virq 1, port 0) Apr 24 21:18:56.024913 (XEN) Notifying guest 0:67 (virq 1, port 0) Apr 24 21:18:56.024973 (XEN) Notifying guest 0:68 (virq 1, port 0) Apr 24 21:18:56.025018 (XEN) Notifying guest 0:69 (virq 1, port 0) Apr 24 21:18:56.036909 (XEN) Notifying guest 0:70 (virq 1, port 0) Apr 24 21:18:56.036968 (XEN) Notifying guest 0:71 (virq 1, port 0) Apr 24 21:18:56.037013 (XEN) Notifying guest 0:72 (virq 1, port 0) Apr 24 21:18:56.048890 (XEN) Notifying guest 0:73 (virq 1, port 0) Apr 24 21:18:56.048950 (XEN) Notifying guest 0:74 (virq 1, port 0) Apr 24 21:18:56.048995 (XEN) Notifying guest 0:75 (virq 1, port 0) Apr 24 21:18:56.060924 (XEN) Notifying guest 0:76 (virq 1, port 0) Apr 24 21:18:56.060983 (XEN) Notifying guest 0:77 (virq 1, port 0) Apr 24 21:18:56.061028 (XEN) Notifying guest 0:78 (virq 1, port 0) Apr 24 21:18:56.072913 (XEN) Notifying guest 0:79 (virq 1, port 0) Apr 24 21:18:56.072972 (XEN) Notifying guest 0:80 (virq 1, port 0) Apr 24 21:18:56.073018 (XEN) Notifying guest 0:81 (virq 1, port 0) Apr 24 21:18:56.084914 (XEN) Notifying guest 0:82 (virq 1, port 0) Apr 24 21:18:56.084973 (XEN) Notifying guest 0:83 (virq 1, port 0) Apr 24 21:18:56.085018 (XEN) Notifying guest 0:84 (virq 1, port 0) Apr 24 21:18:56.096909 (XEN) Notifying guest 0:85 (virq 1, port 0) Apr 24 21:18:56.096968 (XEN) Notifying guest 0:86 (virq 1, port 0) Apr 24 21:18:56.097013 (XEN) Notifying guest 0:87 (virq 1, port 0) Apr 24 21:18:56.108922 (XEN) Notifying guest 0:88 (virq 1, port 0) Apr 24 21:18:56.108981 (XEN) Notifying guest 0:89 (virq 1, port 0) Apr 24 21:18:56.109026 (XEN) Notifying guest 0:90 (virq 1, port 0) Apr 24 21:18:56.120908 (XEN) Notifying guest 0:91 (virq 1, port 0) Apr 24 21:18:56.120967 (XEN) Notifying guest 0:92 (virq 1, port 0) Apr 24 21:18:56.121048 (XEN) Notifying guest 0:93 (virq 1, port 0) Apr 24 21:18:56.132892 (XEN) Notifying guest 0:94 (virq 1, port 0) Apr 24 21:18:56.132952 (XEN) Notifying guest 0:95 (virq 1, port 0) Apr 24 21:18:56.132997 Apr 24 21:19:02.641994 (XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input) Apr 24 21:19:02.656875 Apr 24 21:19:02.658240