Apr 26 08:26:11.768627 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:11.768627 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:11.768627 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:11.778981 (XEN) Apr 26 08:26:11.779016 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:11.779041 (XEN) HPFAR_EL2: 0000009010801b00 Apr 26 08:26:11.779078 (XEN) FAR_EL2: ffff8000831b0100 Apr 26 08:26:11.779102 (XEN) Apr 26 08:26:11.779124 (XEN) Xen stack trace from sp=0000800ffe06fe60: Apr 26 08:26:11.791075 (XEN) 0000800ffe06fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:11.791139 (XEN) 000000000000001b 0000000000000000 0000000000000000 000000000000010b Apr 26 08:26:11.803104 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.815086 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.815150 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.827082 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.827144 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.838930 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.838964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.851054 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.851117 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.863106 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.875082 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:11.875145 (XEN) Xen call trace: Apr 26 08:26:11.875188 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:11.887065 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:11.887129 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:11.898932 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:11.898965 (XEN) Apr 26 08:26:11.898987 (XEN) *** Dumping CPU28 host state: *** Apr 26 08:26:11.899012 (XEN) - Apr 26 08:26:11.910069 ---[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:11.911450 (XEN) CPU: 28 Apr 26 08:26:11.911487 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:11.916245 Apr 26 08:26:11.923061 (XEN) LR: 00000a000026d098 Apr 26 08:26:11.923145 (XEN) SP: 0000800ffe067e60 Apr 26 08:26:11.923192 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:11.923241 (XEN) X0: 0000000000000000 X1: 0000760ffdd50000 X2: 0000800ffe078048 Apr 26 08:26:11.935036 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:11.947080 (XEN) X6: 00000a00003625b0 X7: 0000800ffe07ea50 X8: 0000000000000012 Apr 26 08:26:11.947144 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:11.959070 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:11.959133 (XEN) X15: 0000000000000001 X16: 1fffe00005065941 X17: 0000000000000000 Apr 26 08:26:11.971021 (XEN) X18: ffff8000ab90bc58 X19: 00000a00003625b0 X20: 000000000000001c Apr 26 08:26:11.971085 (XEN) X21: 00000a000032ed80 X22: 0000000010000000 X23: 000000000000001c Apr 26 08:26:11.983063 (XEN) X24: 000000000000001c X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:11.983134 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffe067e60 Apr 26 08:26:11.995059 (XEN) Apr 26 08:26:11.995134 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:11.995180 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:12.007052 (XEN) Apr 26 08:26:12.007106 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:12.007151 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:12.007242 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:12.007290 (XEN) Apr 26 08:26:12.019053 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:12.019112 (XEN) HPFAR_EL2: 0000009010802700 Apr 26 08:26:12.019156 (XEN) FAR_EL2: ffff800083270100 Apr 26 08:26:12.019222 (XEN) Apr 26 08:26:12.019261 (XEN) Xen stack trace from sp=0000800ffe067e60: Apr 26 08:26:12.030986 (XEN) 0000800ffe067e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:12.030986 (XEN) 000000000000001c 0000000000000000 0000000000000000 000000000000010c Apr 26 08:26:12.042979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.042979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.054985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.067002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.067002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.079002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.079002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.091008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.091008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.103074 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.103074 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.114997 (XEN) Xen call trace: Apr 26 08:26:12.114997 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:12.127003 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:12.127003 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:12.139009 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:12.139009 (XEN) Apr 26 08:26:12.139009 (XEN) *** Dumping CPU29 host state: *** Apr 26 08:26:12.139009 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:12.151005 (XEN) CPU: 29 Apr 26 08:26:12.151005 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:12.151005 (XEN) LR: 00000a000026d098 Apr 26 08:26:12.162994 (XEN) SP: 0000800ffe017e60 Apr 26 08:26:12.162994 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:12.162994 (XEN) X0: 0000000000000000 X1: 0000760ffdcf6000 X2: 0000800ffe01e048 Apr 26 08:26:12.174998 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:12.174998 (XEN) X6: 00000a00003625b0 X7: 0000800ffe01c010 X8: 0000000000000012 Apr 26 08:26:12.186963 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:12.198994 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:12.198994 (XEN) X15: 00000000000001fe X16: 1fffe0000585ae01 X17: 0000000000000000 Apr 26 08:26:12.210993 (XEN) X18: ffff8000ab9cbc58 X19: 00000a00003625b0 X20: 000000000000001d Apr 26 08:26:12.210993 (XEN) X21: 00000a000032ee00 X22: 0000000020000000 X23: 000000000000001d Apr 26 08:26:12.223140 (XEN) X24: 000000000000001d X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:12.223208 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffe017e60 Apr 26 08:26:12.235000 (XEN) Apr 26 08:26:12.235000 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:12.235000 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:12.247001 (XEN) Apr 26 08:26:12.247001 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:12.247001 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:12.247001 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:12.247001 (XEN) Apr 26 08:26:12.247001 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:12.259006 (XEN) HPFAR_EL2: 0000009010803300 Apr 26 08:26:12.259006 (XEN) FAR_EL2: ffff800083330100 Apr 26 08:26:12.259006 (XEN) Apr 26 08:26:12.259006 (XEN) Xen stack trace from sp=0000800ffe017e60: Apr 26 08:26:12.270995 (XEN) 0000800ffe017e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:12.270995 (XEN) 000000000000001d 0000000000000000 0000000000000000 000000000000010d Apr 26 08:26:12.283001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.283001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.294998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.294998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.306997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.318962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.318962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.331000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.331000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.342998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.342998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.354992 (XEN) Xen call trace: Apr 26 08:26:12.354992 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:12.366974 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:12.366974 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:12.366974 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:12.379000 (XEN) Apr 26 08:26:12.379000 (XEN) *** Dumping CPU30 host state: *** Apr 26 08:26:12.379000 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:12.391000 (XEN) CPU: 30 Apr 26 08:26:12.391000 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:12.391000 (XEN) LR: 00000a000026d098 Apr 26 08:26:12.391000 (XEN) SP: 0000800ffe00fe60 Apr 26 08:26:12.403002 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:12.403002 (XEN) X0: 0000000000000000 X1: 0000760ffdcf2000 X2: 0000800ffe01a048 Apr 26 08:26:12.415001 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:12.415001 (XEN) X6: 00000a00003625b0 X7: 0000800ffe01c410 X8: 0000000000000012 Apr 26 08:26:12.426964 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:12.426964 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:12.439001 (XEN) X15: 0000000000000000 X16: 1fffe00005f07ca1 X17: 0000000000000000 Apr 26 08:26:12.451003 (XEN) X18: ffff8000aac13c58 X19: 00000a00003625b0 X20: 000000000000001e Apr 26 08:26:12.451003 (XEN) X21: 00000a000032ee80 X22: 0000000040000000 X23: 000000000000001e Apr 26 08:26:12.462997 (XEN) X24: 000000000000001e X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:12.462997 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffe00fe60 Apr 26 08:26:12.479023 (XEN) Apr 26 08:26:12.479023 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:12.479023 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:12.479023 (XEN) Apr 26 08:26:12.479023 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:12.479023 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:12.491002 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:12.491002 (XEN) Apr 26 08:26:12.491002 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:12.491002 (XEN) HPFAR_EL2: 0000009010803f00 Apr 26 08:26:12.491002 (XEN) FAR_EL2: ffff8000833f0100 Apr 26 08:26:12.502903 (XEN) Apr 26 08:26:12.502903 (XEN) Xen stack trace from sp=0000800ffe00fe60: Apr 26 08:26:12.502903 (XEN) 0000800ffe00fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:12.514992 (XEN) 000000000000001e 0000000000000000 0000000000000000 000000000000010e Apr 26 08:26:12.514992 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.526984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.526984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.539001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.550986 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.550986 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.563000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.563000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.574990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.574990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.586962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.586962 (XEN) Xen call trace: Apr 26 08:26:12.598970 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:12.598970 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:12.610970 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:12.610970 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:12.610970 (XEN) Apr 26 08:26:12.610970 (XEN) *** Dumping CPU31 host state: *** Apr 26 08:26:12.622969 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:12.622969 (XEN) CPU: 31 Apr 26 08:26:12.622969 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:12.634995 (XEN) LR: 00000a000026d098 Apr 26 08:26:12.634995 (XEN) SP: 0000800ffdd9fe60 Apr 26 08:26:12.634995 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:12.646994 (XEN) X0: 0000000000000000 X1: 0000760ffdcde000 X2: 0000800ffe006048 Apr 26 08:26:12.646994 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:12.659005 (XEN) X6: 00000a00003625b0 X7: 0000800ffe01c8d0 X8: 0000000000000012 Apr 26 08:26:12.659005 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:12.670992 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:12.682992 (XEN) X15: 00000000265e3d61 X16: 000000007f7553b8 X17: ffff8000821e0240 Apr 26 08:26:12.682992 (XEN) X18: ffff8000afaa3a98 X19: 00000a00003625b0 X20: 000000000000001f Apr 26 08:26:12.695000 (XEN) X21: 00000a000032ef00 X22: 0000000080000000 X23: 000000000000001f Apr 26 08:26:12.695000 (XEN) X24: 000000000000001f X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:12.706994 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdd9fe60 Apr 26 08:26:12.706994 (XEN) Apr 26 08:26:12.706994 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:12.718920 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:12.718920 (XEN) Apr 26 08:26:12.718920 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:12.718920 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:12.730997 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:12.730997 (XEN) Apr 26 08:26:12.730997 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:12.730997 (XEN) HPFAR_EL2: 0000009010804d00 Apr 26 08:26:12.730997 (XEN) FAR_EL2: ffff8000834d0100 Apr 26 08:26:12.742997 (XEN) Apr 26 08:26:12.742997 (XEN) Xen stack trace from sp=0000800ffdd9fe60: Apr 26 08:26:12.742997 (XEN) 0000800ffdd9fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:12.754997 (XEN) 000000000000001f 0000000000000000 0000000000000000 000000000000010f Apr 26 08:26:12.754997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.766994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.766994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.778997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.778997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.790996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.803003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.803003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.814994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.814994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.826989 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:12.826989 (XEN) Xen call trace: Apr 26 08:26:12.838986 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:12.838986 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:12.838986 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:12.850996 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:12.850996 (XEN) Apr 26 08:26:12.850996 (XEN) *** Dumping CPU32 host state: *** Apr 26 08:26:12.862985 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:12.862985 (XEN) CPU: 32 Apr 26 08:26:12.862985 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:12.874997 (XEN) LR: 00000a000026d098 Apr 26 08:26:12.874997 (XEN) SP: 0000800ffdd97e60 Apr 26 08:26:12.874997 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:12.886999 (XEN) X0: 0000000000000000 X1: 0000760ffdcdc000 X2: 0000800ffe004048 Apr 26 08:26:12.886999 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:12.899000 (XEN) X6: 00000a00003625b0 X7: 0000800ffe01cd90 X8: 0000000000000012 Apr 26 08:26:12.899000 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:12.911000 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:12.911000 (XEN) X15: 0000000000000001 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:12.922999 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000020 Apr 26 08:26:12.934988 (XEN) X21: 00000a000032ef80 X22: 0000000000000001 X23: 0000000000000020 Apr 26 08:26:12.934988 (XEN) X24: 0000000000000020 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:12.946991 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdd97e60 Apr 26 08:26:12.946991 (XEN) Apr 26 08:26:12.946991 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:12.958920 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:12.958920 (XEN) Apr 26 08:26:12.958920 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:12.958920 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:12.958920 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:12.971010 (XEN) Apr 26 08:26:12.971010 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:12.971010 (XEN) HPFAR_EL2: 0000009010805900 Apr 26 08:26:12.971010 (XEN) FAR_EL2: ffff800083590100 Apr 26 08:26:12.971010 (XEN) Apr 26 08:26:12.982985 (XEN) Xen stack trace from sp=0000800ffdd97e60: Apr 26 08:26:12.982985 (XEN) 0000800ffdd97e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:12.982985 (XEN) 0000000000000020 0000000000000000 0000000000000000 0000000000000200 Apr 26 08:26:12.995010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.007005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.007005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.019011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.019011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.030999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.030999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.042990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.055008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.055008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.066997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.066997 (XEN) Xen call trace: Apr 26 08:26:13.066997 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:13.079003 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:13.079003 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:13.091001 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:13.091001 (XEN) Apr 26 08:26:13.091001 (XEN) *** Dumping CPU33 host state: *** Apr 26 08:26:13.091001 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:13.102984 (XEN) CPU: 33 Apr 26 08:26:13.102984 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:13.114989 (XEN) LR: 00000a000026d098 Apr 26 08:26:13.114989 (XEN) SP: 0000800ffdd87e60 Apr 26 08:26:13.114989 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:13.127001 (XEN) X0: 0000000000000000 X1: 0000760ffdcd8000 X2: 0000800ffe000048 Apr 26 08:26:13.127001 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:13.138942 (XEN) X6: 00000a00003625b0 X7: 0000800ffe002280 X8: 0000000000000012 Apr 26 08:26:13.138942 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:13.150989 (XEN) X12: 0000000000000001 X13: 00000000000001cc X14: 00000000000001cc Apr 26 08:26:13.150989 (XEN) X15: ffff00002fee0800 X16: ffff00002fee0a00 X17: ffff00002fbecc00 Apr 26 08:26:13.162998 (XEN) X18: ffffffffffffffff X19: 00000a00003625b4 X20: 0000000000000021 Apr 26 08:26:13.162998 (XEN) X21: 00000a000032f000 X22: 0000000000000002 X23: 0000000000000021 Apr 26 08:26:13.174993 (XEN) X24: 0000000000000021 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:13.187005 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdd87e60 Apr 26 08:26:13.187005 (XEN) Apr 26 08:26:13.187005 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:13.187005 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:13.199011 (XEN) Apr 26 08:26:13.199011 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:13.199011 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:13.199011 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:13.211055 (XEN) Apr 26 08:26:13.211055 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:13.211055 (XEN) HPFAR_EL2: 0000008010800500 Apr 26 08:26:13.211055 (XEN) FAR_EL2: ffff800082850100 Apr 26 08:26:13.211055 (XEN) Apr 26 08:26:13.211055 (XEN) Xen stack trace from sp=0000800ffdd87e60: Apr 26 08:26:13.223186 (XEN) 0000800ffdd87e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:13.223268 (XEN) 0000000000000021 0000000000000000 0000000000000000 0000000000000201 Apr 26 08:26:13.235124 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.235186 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.247119 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.259127 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.259189 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.271146 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.271210 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.283111 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.283180 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.295119 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.307108 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.307171 (XEN) Xen call trace: Apr 26 08:26:13.307214 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:13.319143 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:13.319206 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:13.331114 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:13.331175 (XEN) Apr 26 08:26:13.331216 (XEN) *** Dumping CPU34 host state: *** Apr 26 08:26:13.331261 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:13.343114 (XEN) CPU: 34 Apr 26 08:26:13.343178 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:13.343228 (XEN) LR: 00000a000026d098 Apr 26 08:26:13.355119 (XEN) SP: 0000800ffda1fe60 Apr 26 08:26:13.355178 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:13.355230 (XEN) X0: 0000000000000000 X1: 0000760ffda64000 X2: 0000800ffdd8c048 Apr 26 08:26:13.367123 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:13.379125 (XEN) X6: 00000a00003625b0 X7: 0000800ffe002740 X8: 0000000000000012 Apr 26 08:26:13.379190 (XEN) X9: 0000000000000080 X10: 0000000000000237 X11: 000000000000004c Apr 26 08:26:13.391104 (XEN) X12: 0000000000000040 X13: 000000000000014a X14: 000000000000014a Apr 26 08:26:13.391169 (XEN) X15: 00003d0900000000 X16: 1fffe0000653da01 X17: 0000000000000000 Apr 26 08:26:13.403108 (XEN) X18: ffff8000b083bc58 X19: 00000a00003625b4 X20: 0000000000000022 Apr 26 08:26:13.403179 (XEN) X21: 00000a000032f080 X22: 0000000000000004 X23: 0000000000000022 Apr 26 08:26:13.415138 (XEN) X24: 0000000000000022 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:13.415202 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffda1fe60 Apr 26 08:26:13.427117 (XEN) Apr 26 08:26:13.427171 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:13.427217 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:13.439116 (XEN) Apr 26 08:26:13.439170 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:13.439215 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:13.439259 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:13.439302 (XEN) Apr 26 08:26:13.439340 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:13.451119 (XEN) HPFAR_EL2: 0000008010801100 Apr 26 08:26:13.451177 (XEN) FAR_EL2: ffff800082910100 Apr 26 08:26:13.451222 (XEN) Apr 26 08:26:13.451260 (XEN) Xen stack trace from sp=0000800ffda1fe60: Apr 26 08:26:13.463102 (XEN) 0000800ffda1fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:13.463167 (XEN) 0000000000000022 0000000000000000 0000000000000000 0000000000000202 Apr 26 08:26:13.475119 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.475182 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.487108 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.487173 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.499134 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.511107 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.511170 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.523112 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.523205 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.535063 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.535126 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.547125 (XEN) Xen call trace: Apr 26 08:26:13.547182 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:13.559006 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:13.559041 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:13.571110 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:13.571171 (XEN) Apr 26 08:26:13.571211 (XEN) *** Dumping CPU35 host state: *** Apr 26 08:26:13.571256 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:13.583110 (XEN) CPU: 35 Apr 26 08:26:13.583166 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:13.583224 (XEN) LR: 00000a000026d098 Apr 26 08:26:13.595109 (XEN) SP: 0000800ffda17e60 Apr 26 08:26:13.595167 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:13.595218 (XEN) X0: 0000000000000000 X1: 0000760ffda62000 X2: 0000800ffdd8a048 Apr 26 08:26:13.607071 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:13.607141 (XEN) X6: 00000a00003625b0 X7: 0000800ffe002c00 X8: 0000000000000012 Apr 26 08:26:13.619041 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000001 Apr 26 08:26:13.631101 (XEN) X12: 0000000000000001 X13: 0000000000000326 X14: ffff000030251140 Apr 26 08:26:13.631165 (XEN) X15: 0000000000000001 X16: 1fffe00006461721 X17: 0000000000000000 Apr 26 08:26:13.643059 (XEN) X18: ffff8000aeaa3c58 X19: 00000a00003625b4 X20: 0000000000000023 Apr 26 08:26:13.643123 (XEN) X21: 00000a000032f100 X22: 0000000000000008 X23: 0000000000000023 Apr 26 08:26:13.655067 (XEN) X24: 0000000000000023 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:13.655130 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffda17e60 Apr 26 08:26:13.667117 (XEN) Apr 26 08:26:13.667170 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:13.667215 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:13.667259 (XEN) Apr 26 08:26:13.667297 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:13.679049 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:13.679081 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:13.679105 (XEN) Apr 26 08:26:13.679126 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:13.691103 (XEN) HPFAR_EL2: 0000008010801d00 Apr 26 08:26:13.691162 (XEN) FAR_EL2: ffff8000829d0100 Apr 26 08:26:13.691206 (XEN) Apr 26 08:26:13.691244 (XEN) Xen stack trace from sp=0000800ffda17e60: Apr 26 08:26:13.703100 (XEN) 0000800ffda17e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:13.703164 (XEN) 0000000000000023 0000000000000000 0000000000000000 0000000000000203 Apr 26 08:26:13.715017 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.715084 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.727050 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.727113 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.739040 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.739074 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.749924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.763115 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.763195 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.775088 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.775173 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:13.787114 (XEN) Xen call trace: Apr 26 08:26:13.787170 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:13.799069 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:13.799105 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:13.799132 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:13.811057 (XEN) Apr 26 08:26:13.811138 (XEN) *** Dumping CPU36 host state: *** Apr 26 08:26:13.811190 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:13.822983 (XEN) CPU: 36 Apr 26 08:26:13.822983 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:13.822983 (XEN) LR: 00000a000026d098 Apr 26 08:26:13.822983 (XEN) SP: 0000800ffda07e60 Apr 26 08:26:13.835097 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:13.835166 (XEN) X0: 0000000000000000 X1: 0000760ffd6e6000 X2: 0000800ffda0e048 Apr 26 08:26:13.847003 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:13.847003 (XEN) X6: 00000a00003625b0 X7: 0000800ffda0d150 X8: 0000000000000012 Apr 26 08:26:13.858663 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:13.858663 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:13.870999 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:13.883077 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000024 Apr 26 08:26:13.883142 (XEN) X21: 00000a000032f180 X22: 0000000000000010 X23: 0000000000000024 Apr 26 08:26:13.895110 (XEN) X24: 0000000000000024 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:13.895174 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffda07e60 Apr 26 08:26:13.907113 (XEN) Apr 26 08:26:13.907168 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:13.907212 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:13.907255 (XEN) Apr 26 08:26:13.907294 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:13.919036 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:13.919087 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:13.919112 (XEN) Apr 26 08:26:13.919134 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:13.919157 (XEN) HPFAR_EL2: 0000008010000200 Apr 26 08:26:13.930889 (XEN) FAR_EL2: ffff800082680090 Apr 26 08:26:13.930889 (XEN) Apr 26 08:26:13.930889 (XEN) Xen stack trace from sp=0000800ffda07e60: Apr 26 08:26:13.930889 (XEN) 0000 Apr 26 08:26:13.934617 800ffda07e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:13.943156 (XEN) 0000000000000024 0000000000000000 0000000000000000 0000000000000 Apr 26 08:26:13.945660 204 Apr 26 08:26:13.954981 (XEN) (XEN) sched_smt_power_savings: disabled Apr 26 08:26:13.955013 0000000000000000(XEN) NOW=1597359250770 Apr 26 08:26:13.955038 0000000000000000(XEN) Online Cpus: 0-95 Apr 26 08:26:13.955062 0000000000000000(XEN) Cpupool 0: Apr 26 08:26:13.967107 0000000000000000(XEN) Cpus: 0-95 Apr 26 08:26:13.967163 Apr 26 08:26:13.967203 (XEN) (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource Apr 26 08:26:13.979002 0000000000000000(XEN) Scheduler: SMP Credit Scheduler rev2 (credit2) Apr 26 08:26:13.979002 0000000000000000(XEN) Active queues: 6 Apr 26 08:26:13.979002 (XEN) default-weight = 256 Apr 26 08:26:13.991002 0000000000000000(XEN) Runqueue 0: Apr 26 08:26:13.991002 (XEN) ncpus = 16 Apr 26 08:26:13.991002 (XEN) cpus = 0-15 Apr 26 08:26:13.991002 (XEN) max_weight = 256 Apr 26 08:26:14.002993 (XEN) pick_bias = 2 Apr 26 08:26:14.002993 (XEN) instload = 0 Apr 26 08:26:14.002993 (XEN) aveload = 0 (~0%) Apr 26 08:26:14.002993 0000000000000000(XEN) idlers: 00000000,00000000,0000fffe Apr 26 08:26:14.014996 (XEN) tickled: 00000000,00000000,00000000 Apr 26 08:26:14.014996 (XEN) fully idle cores: 00000000,00000000,0000fffe Apr 26 08:26:14.014996 Apr 26 08:26:14.014996 (XEN) (XEN) Runqueue 1: Apr 26 08:26:14.026997 (XEN) ncpus = 16 Apr 26 08:26:14.026997 (XEN) cpus = 16-31 Apr 26 08:26:14.026997 (XEN) max_weight = 256 Apr 26 08:26:14.026997 (XEN) pick_bias = 20 Apr 26 08:26:14.039000 (XEN) instload = 0 Apr 26 08:26:14.039000 (XEN) aveload = 1414 (~0%) Apr 26 08:26:14.039000 0000000000000000(XEN) idlers: 00000000,00000000,ffff0000 Apr 26 08:26:14.039000 (XEN) tickled: 00000000,00000000,00000000 Apr 26 08:26:14.050986 (XEN) fully idle cores: 00000000,00000000,ffff0000 Apr 26 08:26:14.050986 0000000000000000(XEN) Runqueue 2: Apr 26 08:26:14.063002 (XEN) ncpus = 16 Apr 26 08:26:14.063002 (XEN) cpus = 32-47 Apr 26 08:26:14.063002 (XEN) max_weight = 256 Apr 26 08:26:14.063002 (XEN) pick_bias = 34 Apr 26 08:26:14.074997 (XEN) instload = 0 Apr 26 08:26:14.074997 (XEN) aveload = 598 (~0%) Apr 26 08:26:14.074997 0000000000000000(XEN) idlers: 00000000,0000ffff,00000000 Apr 26 08:26:14.086988 (XEN) tickled: 00000000,00000000,00000000 Apr 26 08:26:14.086988 (XEN) fully idle cores: 00000000,0000ffff,00000000 Apr 26 08:26:14.086988 0000000000000000(XEN) Runqueue 3: Apr 26 08:26:14.086988 (XEN) ncpus = 16 Apr 26 08:26:14.099000 (XEN) cpus = 48-63 Apr 26 08:26:14.099000 (XEN) max_weight = 256 Apr 26 08:26:14.099000 (XEN) pick_bias = 55 Apr 26 08:26:14.099000 (XEN) instload = 0 Apr 26 08:26:14.110989 (XEN) aveload = 0 (~0%) Apr 26 08:26:14.110989 Apr 26 08:26:14.110989 (XEN) (XEN) idlers: 00000000,ffff0000,00000000 Apr 26 08:26:14.110989 (XEN) tickled: 00000000,00000000,00000000 Apr 26 08:26:14.122999 (XEN) fully idle cores: 00000000,ffff0000,00000000 Apr 26 08:26:14.122999 0000000000000000(XEN) Runqueue 4: Apr 26 08:26:14.122999 (XEN) ncpus = 16 Apr 26 08:26:14.122999 (XEN) cpus = 64-79 Apr 26 08:26:14.135000 (XEN) max_weight = 256 Apr 26 08:26:14.135000 (XEN) pick_bias = 71 Apr 26 08:26:14.135000 (XEN) instload = 0 Apr 26 08:26:14.135000 (XEN) aveload = 702 (~0%) Apr 26 08:26:14.146995 0000000000000000(XEN) idlers: 0000ffff,00000000,00000000 Apr 26 08:26:14.146995 (XEN) tickled: 00000000,00000000,00000000 Apr 26 08:26:14.146995 (XEN) fully idle cores: 0000ffff,00000000,00000000 Apr 26 08:26:14.158999 0000000000000000(XEN) Runqueue 5: Apr 26 08:26:14.158999 (XEN) ncpus = 16 Apr 26 08:26:14.158999 (XEN) cpus = 80-95 Apr 26 08:26:14.170999 (XEN) max_weight = 256 Apr 26 08:26:14.170999 (XEN) pick_bias = 85 Apr 26 08:26:14.170999 (XEN) instload = 0 Apr 26 08:26:14.170999 (XEN) aveload = 0 (~0%) Apr 26 08:26:14.182982 0000000000000000(XEN) idlers: ffff0000,00000000,00000000 Apr 26 08:26:14.182982 (XEN) tickled: 00000000,00000000,00000000 Apr 26 08:26:14.182982 (XEN) fully idle cores: ffff0000,00000000,00000000 Apr 26 08:26:14.194999 Apr 26 08:26:14.194999 (XEN) (XEN) Domain info: Apr 26 08:26:14.194999 0000000000000000(XEN) Domain: 0 w 256 c 0 v 96 Apr 26 08:26:14.194999 0000000000000000(XEN) 1: 0000000000000000[0.0] flags=0 cpu=19 0000000000000000 credit=10394630 [w=256] Apr 26 08:26:14.206996 (XEN) load=28 (~0%) 0000000000000000 Apr 26 08:26:14.219001 0000000000000000(XEN) 2: 0000000000000000[0.1] flags=0 cpu=2 0000000000000000 credit=2877770 [w=256] Apr 26 08:26:14.219001 (XEN) load=288 (~0%) 0000000000000000 Apr 26 08:26:14.230911 0000000000000000(XEN) 3: 0000000000000000[0.2] flags=0 cpu=33 0000000000000000 credit=10500000 [w=256] Apr 26 08:26:14.230911 (XEN) load=10 (~0%) 0000000000000000 Apr 26 08:26:14.242908 0000000000000000(XEN) 4: 0000000000000000[0.3] flags=0 cpu=34 0000000000000000 credit=8256100 [w=256] Apr 26 08:26:14.242908 (XEN) load=612 (~0%) 0000000000000000 Apr 26 08:26:14.254999 0000000000000000(XEN) 5: 0000000000000000[0.4] flags=0 cpu=70 0000000000000000 credit=8793460 [w=256] Apr 26 08:26:14.266973 (XEN) load=504 (~0%) 0000000000000000 Apr 26 08:26:14.266973 0000000000000000(XEN) 6: 0000000000000000[0.5] flags=0 cpu=78 0000000000000000 credit=5435670 [w=256] Apr 26 08:26:14.279002 (XEN) load=796 (~0%) 0000000000000000 Apr 26 08:26:14.279002 0000000000000000(XEN) 7: 0000000000000000[0.6] flags=0 cpu=3 0000000000000000 credit=9578160 [w=256] Apr 26 08:26:14.291000 load=27 (~0%)(XEN) Xen call trace: Apr 26 08:26:14.291000 Apr 26 08:26:14.291000 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:14.291000 (XEN) 8: (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:14.302990 [0.7] flags=0 cpu=25(XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:14.314990 credit=10500000 [w=256](XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:14.314990 load=25 (~0%)(XEN) Apr 26 08:26:14.314990 Apr 26 08:26:14.314990 (XEN) *** Dumping CPU37 host state: *** Apr 26 08:26:14.327001 (XEN) 9: (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:14.327001 [0.8] flags=0 cpu=35(XEN) CPU: 37 Apr 26 08:26:14.339001 credit=10500000 [w=256](XEN) PC: 00000a000026d0b4 load=9 (~0%) domain.c#idle_loop+0x128/0x190 Apr 26 08:26:14.339001 Apr 26 08:26:14.339001 (XEN) 10: (XEN) LR: 00000a000026d098 Apr 26 08:26:14.350994 [0.9] flags=0 cpu=57(XEN) SP: 0000800ffb81fe60 Apr 26 08:26:14.350994 credit=10500000 [w=256](XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:14.363000 load=27 (~0%)(XEN) X0: 0000000000000000 X1: 0000760ffd6e2000 X2: 0000800ffda0a048 Apr 26 08:26:14.363000 Apr 26 08:26:14.363000 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:14.375003 (XEN) 11: (XEN) X6: 00000a00003625b0 X7: 0000800ffda0d590 X8: 0000000000000012 Apr 26 08:26:14.386997 [0.10] flags=0 cpu=74(XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:14.386997 credit=10500000 [w=256](XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:14.398984 load=30 (~0%)(XEN) X15: 0000ffffda576e48 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:14.411001 Apr 26 08:26:14.411001 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000025 Apr 26 08:26:14.411001 (XEN) 12: (XEN) X21: 00000a000032f200 X22: 0000000000000020 X23: 0000000000000025 Apr 26 08:26:14.422983 [0.11] flags=0 cpu=82(XEN) X24: 0000000000000025 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:14.434988 credit=10466240 [w=256](XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb81fe60 Apr 26 08:26:14.434988 load=31 (~0%)(XEN) Apr 26 08:26:14.447006 Apr 26 08:26:14.447006 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:14.447006 (XEN) 13: (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:14.447006 [0.12] flags=0 cpu=4(XEN) Apr 26 08:26:14.447006 credit=10500000 [w=256](XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:14.459002 load=28 (~0%)(XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:14.459002 Apr 26 08:26:14.459002 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:14.470987 (XEN) 14: (XEN) Apr 26 08:26:14.470987 [0.13] flags=0 cpu=26(XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:14.470987 credit=10500000 [w=256](XEN) HPFAR_EL2: 00000000002183a0 Apr 26 08:26:14.482997 load=24 (~0%)(XEN) FAR_EL2: ffff000022576a60 Apr 26 08:26:14.482997 Apr 26 08:26:14.482997 (XEN) Apr 26 08:26:14.482997 (XEN) 15: (XEN) Xen stack trace from sp=0000800ffb81fe60: Apr 26 08:26:14.482997 (XEN) [0.14] flags=0 cpu=39 0000800ffb81fe70 credit=1755220 [w=256] 00000a0000279908 load=353 (~0%) 00000a0000329320 Apr 26 08:26:14.494993 00000a00003625d8(XEN) 16: Apr 26 08:26:14.494993 (XEN) [0.15] flags=0 cpu=51 0000000000000025 credit=5581950 [w=256] 0000000000000000 load=85 (~0%) 0000000000000000 Apr 26 08:26:14.507001 0000000000000205(XEN) 17: Apr 26 08:26:14.518961 (XEN) [0.16] flags=0 cpu=83 0000000000000000 credit=10472710 [w=256] 0000000000000000 load=27 (~0%) 0000000000000000 Apr 26 08:26:14.518961 0000000000000000(XEN) 18: Apr 26 08:26:14.531001 (XEN) [0.17] flags=0 cpu=84 0000000000000000 credit=10437820 [w=256] 0000000000000000 load=13 (~0%) 0000000000000000 Apr 26 08:26:14.542996 0000000000000000(XEN) 19: Apr 26 08:26:14.542996 (XEN) [0.18] flags=0 cpu=5 0000000000000000 credit=10469710 [w=256] 0000000000000000 load=12 (~0%) 0000000000000000 Apr 26 08:26:14.554988 0000000000000000(XEN) 20: Apr 26 08:26:14.554988 (XEN) [0.19] flags=0 cpu=21 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=189 (~0%) 0000000000000000 Apr 26 08:26:14.567001 0000000000000000(XEN) 21: Apr 26 08:26:14.567001 (XEN) [0.20] flags=0 cpu=36 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:14.579000 0000000000000000(XEN) 22: Apr 26 08:26:14.579000 (XEN) [0.21] flags=0 cpu=52 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=29 (~0%) 0000000000000000 Apr 26 08:26:14.590999 0000000000000000(XEN) 23: Apr 26 08:26:14.590999 (XEN) [0.22] flags=0 cpu=76 0000000000000000 credit=9392210 [w=256] 0000000000000000 load=135 (~0%) 0000000000000000 Apr 26 08:26:14.603000 0000000000000000(XEN) 24: Apr 26 08:26:14.603000 (XEN) [0.23] flags=0 cpu=68 0000000000000000 credit=3982220 [w=256] 0000000000000000 load=3498 (~1%) 0000000000000000 Apr 26 08:26:14.614999 0000000000000000(XEN) 25: Apr 26 08:26:14.614999 (XEN) [0.24] flags=0 cpu=6 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=27 (~0%) 0000000000000000 Apr 26 08:26:14.626997 0000000000000000(XEN) 26: Apr 26 08:26:14.638998 (XEN) [0.25] flags=0 cpu=22 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:14.638998 0000000000000000(XEN) 27: Apr 26 08:26:14.650997 (XEN) [0.26] flags=0 cpu=86 0000000000000000 credit=10471600 [w=256] 0000000000000000 load=27 (~0%) 0000000000000000 Apr 26 08:26:14.663001 0000000000000000(XEN) 28: Apr 26 08:26:14.663001 [0.27] flags=0 cpu=56(XEN) Xen call trace: Apr 26 08:26:14.663001 credit=10500000 [w=256](XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:14.675001 load=27 (~0%)(XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:14.675001 Apr 26 08:26:14.675001 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:14.686996 (XEN) 29: (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:14.686996 [0.28] flags=0 cpu=73(XEN) Apr 26 08:26:14.686996 credit=10500000 [w=256](XEN) *** Dumping CPU38 host state: *** Apr 26 08:26:14.699001 load=31 (~0%)(XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:14.699001 Apr 26 08:26:14.699001 (XEN) CPU: 38 Apr 26 08:26:14.710973 (XEN) 30: (XEN) PC: 00000a000026d0b4[0.29] flags=0 cpu=19 domain.c#idle_loop+0x128/0x190 credit=10500000 [w=256] Apr 26 08:26:14.710973 load=2059 (~0%)(XEN) LR: 00000a000026d098 Apr 26 08:26:14.722999 Apr 26 08:26:14.722999 (XEN) SP: 0000800ffb80fe60 Apr 26 08:26:14.722999 (XEN) 31: (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:14.734971 [0.30] flags=0 cpu=8(XEN) X0: 0000000000000000 X1: 0000760ffd6e0000 X2: 0000800ffda08048 Apr 26 08:26:14.734971 credit=10471820 [w=256](XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:14.746996 load=10 (~0%)(XEN) X6: 00000a00003625b0 X7: 0000800ffda0da50 X8: 0000000000000012 Apr 26 08:26:14.759001 Apr 26 08:26:14.759001 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:14.759001 (XEN) 32: (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:14.771002 [0.31] flags=0 cpu=23(XEN) X15: 0000ffffda576e48 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:14.782999 credit=10500000 [w=256](XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000026 Apr 26 08:26:14.782999 load=9 (~0%)(XEN) X21: 00000a000032f280 X22: 0000000000000040 X23: 0000000000000026 Apr 26 08:26:14.794983 Apr 26 08:26:14.794983 (XEN) X24: 0000000000000026 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:14.806989 (XEN) 33: (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb80fe60 Apr 26 08:26:14.806989 [0.32] flags=0 cpu=38(XEN) Apr 26 08:26:14.806989 credit=10500000 [w=256](XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:14.818991 load=28 (~0%)(XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:14.818991 Apr 26 08:26:14.818991 (XEN) Apr 26 08:26:14.818991 (XEN) 34: (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:14.830998 [0.33] flags=0 cpu=54(XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:14.830998 credit=10500000 [w=256](XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:14.842997 load=28 (~0%)(XEN) Apr 26 08:26:14.842997 Apr 26 08:26:14.842997 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:14.842997 (XEN) 35: (XEN) HPFAR_EL2: 0000008010804100 Apr 26 08:26:14.842997 [0.34] flags=0 cpu=18(XEN) FAR_EL2: ffff800082c10100 Apr 26 08:26:14.854995 credit=7826580 [w=256](XEN) Apr 26 08:26:14.854995 load=1526 (~0%)(XEN) Xen stack trace from sp=0000800ffb80fe60: Apr 26 08:26:14.866984 (XEN) Apr 26 08:26:14.866984 0000800ffb80fe70(XEN) 36: 00000a0000279908[0.35] flags=0 cpu=87 00000a0000329320 credit=249990 [w=256] 00000a00003625d8 load=11 (~0%) Apr 26 08:26:14.878997 (XEN) Apr 26 08:26:14.878997 0000000000000026(XEN) 37: 0000000000000000[0.36] flags=0 cpu=7 0000000000000000 credit=10461310 [w=256] 0000000000000206 load=11 (~0%) Apr 26 08:26:14.890997 (XEN) Apr 26 08:26:14.890997 0000000000000000(XEN) 38: 0000000000000000[0.37] flags=0 cpu=24 0000000000000000 credit=9150160 [w=256] 0000000000000000 load=485 (~0%) Apr 26 08:26:14.902994 (XEN) Apr 26 08:26:14.902994 0000000000000000(XEN) 39: 0000000000000000[0.38] flags=0 cpu=40 0000000000000000 credit=6694770 [w=256] 0000000000000000 load=3304 (~1%) Apr 26 08:26:14.915001 (XEN) Apr 26 08:26:14.915001 0000000000000000(XEN) 40: 0000000000000000[0.39] flags=0 cpu=58 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=9 (~0%) Apr 26 08:26:14.926999 (XEN) Apr 26 08:26:14.926999 0000000000000000(XEN) 41: 0000000000000000[0.40] flags=0 cpu=77 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=89 (~0%) Apr 26 08:26:14.938988 (XEN) Apr 26 08:26:14.938988 0000000000000000(XEN) 42: 0000000000000000[0.41] flags=0 cpu=88 0000000000000000 credit=8590290 [w=256] 0000000000000000 load=10 (~0%) Apr 26 08:26:14.950999 (XEN) Apr 26 08:26:14.950999 0000000000000000(XEN) 43: 0000000000000000[0.42] flags=0 cpu=9 0000000000000000 credit=4658070 [w=256] 0000000000000000 load=8 (~0%) Apr 26 08:26:14.962997 (XEN) Apr 26 08:26:14.962997 0000000000000000(XEN) 44: 0000000000000000[0.43] flags=0 cpu=85 0000000000000000 credit=10471370 [w=256] 0000000000000000 load=29 (~0%) Apr 26 08:26:14.975001 (XEN) Apr 26 08:26:14.987008 0000000000000000(XEN) 45: 0000000000000000[0.44] flags=0 cpu=40 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=32 (~0%) Apr 26 08:26:14.999005 (XEN) Apr 26 08:26:14.999005 0000000000000000(XEN) 46: 0000000000000000[0.45] flags=0 cpu=59 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=28 (~0%) Apr 26 08:26:15.011006 (XEN) Apr 26 08:26:15.011006 0000000000000000(XEN) 47: 0000000000000000[0.46] flags=0 cpu=72 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=27 (~0%) Apr 26 08:26:15.022987 (XEN) Apr 26 08:26:15.022987 0000000000000000(XEN) 48: 0000000000000000[0.47] flags=0 cpu=89 0000000000000000 credit=10467060 [w=256] 0000000000000000 load=30 (~0%) Apr 26 08:26:15.034995 Apr 26 08:26:15.034995 (XEN) Xen call trace: Apr 26 08:26:15.034995 (XEN) 49: (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:15.046984 [0.48] flags=0 cpu=10(XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:15.046984 credit=10500000 [w=256](XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:15.059002 load=29 (~0%)(XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:15.059002 Apr 26 08:26:15.059002 (XEN) Apr 26 08:26:15.059002 (XEN) 50: (XEN) *** Dumping CPU39 host state: *** Apr 26 08:26:15.071004 [0.49] flags=0 cpu=27(XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:15.071004 credit=10500000 [w=256](XEN) CPU: 39 Apr 26 08:26:15.083001 load=27 (~0%)(XEN) PC: 00000a000026d0b4 Apr 26 08:26:15.083001 domain.c#idle_loop+0x128/0x190(XEN) 51: Apr 26 08:26:15.083001 [0.50] flags=0 cpu=41(XEN) LR: 00000a000026d098 Apr 26 08:26:15.094997 credit=10500000 [w=256](XEN) SP: 0000800ffb807e60 Apr 26 08:26:15.094997 load=30 (~0%)(XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:15.107012 Apr 26 08:26:15.107012 (XEN) X0: 0000000000000000 X1: 0000760ffb4ec000 X2: 0000800ffb814048 Apr 26 08:26:15.107012 (XEN) 52: (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:15.118982 [0.51] flags=0 cpu=60(XEN) X6: 00000a00003625b0 X7: 0000800ffb813010 X8: 0000000000000012 Apr 26 08:26:15.131000 credit=10500000 [w=256](XEN) X9: 0000000000000080 X10: 0000000000000000 X11: 000000000000004e Apr 26 08:26:15.131000 load=27 (~0%)(XEN) X12: 0000000000000000 X13: 0000000000000156 X14: 000000000000032c Apr 26 08:26:15.142998 Apr 26 08:26:15.142998 (XEN) X15: 0000ffffda576e48 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:15.154998 (XEN) 53: (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000027 Apr 26 08:26:15.154998 [0.52] flags=0 cpu=75(XEN) X21: 00000a000032f300 X22: 0000000000000080 X23: 0000000000000027 Apr 26 08:26:15.167001 credit=10500000 [w=256](XEN) X24: 0000000000000027 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:15.178994 load=24 (~0%)(XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffb807e60 Apr 26 08:26:15.178994 Apr 26 08:26:15.178994 (XEN) Apr 26 08:26:15.178994 (XEN) 54: (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:15.190986 [0.53] flags=0 cpu=92(XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:15.190986 credit=10469560 [w=256](XEN) Apr 26 08:26:15.202992 load=30 (~0%)(XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:15.202992 Apr 26 08:26:15.202992 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:15.202992 (XEN) 55: (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:15.214994 [0.54] flags=0 cpu=11(XEN) Apr 26 08:26:15.214994 credit=10500000 [w=256](XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:15.214994 load=27 (~0%)(XEN) HPFAR_EL2: 0000008010804d00 Apr 26 08:26:15.226997 Apr 26 08:26:15.226997 (XEN) FAR_EL2: ffff800082cd0100 Apr 26 08:26:15.226997 (XEN) 56: (XEN) Apr 26 08:26:15.226997 [0.55] flags=0 cpu=28(XEN) Xen stack trace from sp=0000800ffb807e60: Apr 26 08:26:15.238992 (XEN) credit=10500000 [w=256] 0000800ffb807e70 load=27 (~0%) 00000a0000279908 Apr 26 08:26:15.238992 00000a0000329320(XEN) 57: 00000a00003625d8[0.56] flags=0 cpu=42 Apr 26 08:26:15.250996 (XEN) credit=10500000 [w=256] 0000000000000027 load=31 (~0%) 0000000000000000 Apr 26 08:26:15.250996 0000000000000000(XEN) 58: 0000000000000207[0.57] flags=0 cpu=61 Apr 26 08:26:15.262999 (XEN) credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.262999 0000000000000000(XEN) 59: 0000000000000000[0.58] flags=0 cpu=78 Apr 26 08:26:15.275001 (XEN) credit=10500000 [w=256] 0000000000000000 load=29 (~0%) 0000000000000000 Apr 26 08:26:15.275001 0000000000000000(XEN) 60: 0000000000000000[0.59] flags=0 cpu=90 Apr 26 08:26:15.286998 (XEN) credit=10469940 [w=256] 0000000000000000 load=31 (~0%) 0000000000000000 Apr 26 08:26:15.286998 0000000000000000(XEN) 61: 0000000000000000[0.60] flags=0 cpu=12 Apr 26 08:26:15.298992 (XEN) credit=10500000 [w=256] 0000000000000000 load=31 (~0%) 0000000000000000 Apr 26 08:26:15.310997 0000000000000000(XEN) 62: 0000000000000000[0.61] flags=0 cpu=53 Apr 26 08:26:15.310997 (XEN) credit=10500000 [w=256] 0000000000000000 load=31 (~0%) 0000000000000000 Apr 26 08:26:15.322988 0000000000000000(XEN) 63: 0000000000000000[0.62] flags=0 cpu=43 Apr 26 08:26:15.322988 (XEN) credit=10500000 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:15.334990 0000000000000000(XEN) 64: 0000000000000000[0.63] flags=0 cpu=62 Apr 26 08:26:15.334990 (XEN) credit=10500000 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:15.347000 0000000000000000(XEN) 65: 0000000000000000[0.64] flags=0 cpu=64 Apr 26 08:26:15.363024 (XEN) credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.363024 0000000000000000(XEN) 66: 0000000000000000[0.65] flags=0 cpu=91 Apr 26 08:26:15.363024 (XEN) credit=10466650 [w=256] 0000000000000000 load=29 (~0%) 0000000000000000 Apr 26 08:26:15.375001 0000000000000000(XEN) 67: 0000000000000000[0.66] flags=0 cpu=13 Apr 26 08:26:15.375001 (XEN) credit=10500000 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:15.386997 0000000000000000(XEN) 68: 0000000000000000[0.67] flags=0 cpu=29 Apr 26 08:26:15.386997 (XEN) credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.398999 0000000000000000(XEN) 69: 0000000000000000[0.68] flags=0 cpu=44 Apr 26 08:26:15.410995 credit=10500000 [w=256](XEN) Xen call trace: Apr 26 08:26:15.410995 load=30 (~0%)(XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:15.410995 Apr 26 08:26:15.410995 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:15.422995 (XEN) 70: (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:15.422995 [0.69] flags=0 cpu=63(XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:15.434999 credit=10500000 [w=256](XEN) Apr 26 08:26:15.434999 load=32 (~0%)(XEN) *** Dumping CPU40 host state: *** Apr 26 08:26:15.446999 Apr 26 08:26:15.446999 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:15.446999 (XEN) 71: (XEN) CPU: 40 Apr 26 08:26:15.446999 [0.70] flags=0 cpu=66(XEN) PC: 00000a000026d0b4 credit=10500000 [w=256] domain.c#idle_loop+0x128/0x190 load=30 (~0%) Apr 26 08:26:15.459003 Apr 26 08:26:15.459003 (XEN) LR: 00000a000026d098 Apr 26 08:26:15.471084 (XEN) 72: (XEN) SP: 0000800feb49fe60 Apr 26 08:26:15.471149 [0.71] flags=0 cpu=92(XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:15.483005 credit=10466580 [w=256](XEN) X0: 0000000000000000 X1: 0000760ffb4e8000 X2: 0000800ffb810048 Apr 26 08:26:15.483005 load=31 (~0%)(XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:15.495000 Apr 26 08:26:15.495000 (XEN) X6: 00000a00003625b0 X7: 0000800ffb813410 X8: 0000000000000012 Apr 26 08:26:15.506996 (XEN) 73: (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:15.506996 [0.72] flags=0 cpu=14(XEN) X12: 0000000000000001 X13: 0000000000000179 X14: 0000000000000179 Apr 26 08:26:15.518998 credit=10500000 [w=256](XEN) X15: 0000000000000001 X16: 1fffe00005666d61 X17: 0000000000000000 Apr 26 08:26:15.530999 load=28 (~0%)(XEN) X18: ffff8000b0e6bc58 X19: 00000a00003625b4 X20: 0000000000000028 Apr 26 08:26:15.530999 Apr 26 08:26:15.530999 (XEN) X21: 00000a000032f380 X22: 0000000000000100 X23: 0000000000000028 Apr 26 08:26:15.542986 (XEN) 74: (XEN) X24: 0000000000000028 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:15.542986 [0.73] flags=0 cpu=30(XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb49fe60 Apr 26 08:26:15.555000 credit=10500000 [w=256](XEN) Apr 26 08:26:15.555000 load=25 (~0%)(XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:15.566985 Apr 26 08:26:15.566985 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:15.566985 (XEN) 75: (XEN) Apr 26 08:26:15.566985 [0.74] flags=0 cpu=45(XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:15.578984 credit=10500000 [w=256](XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:15.578984 load=28 (~0%)(XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:15.590999 Apr 26 08:26:15.590999 (XEN) Apr 26 08:26:15.590999 (XEN) 76: (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:15.590999 [0.75] flags=0 cpu=48(XEN) HPFAR_EL2: 0000008010805900 Apr 26 08:26:15.590999 credit=10500000 [w=256](XEN) FAR_EL2: ffff800082d90100 Apr 26 08:26:15.602997 load=30 (~0%)(XEN) Apr 26 08:26:15.602997 Apr 26 08:26:15.602997 (XEN) Xen stack trace from sp=0000800feb49fe60: Apr 26 08:26:15.602997 (XEN) (XEN) 77: 0000800feb49fe70[0.76] flags=0 cpu=70 00000a0000279908 credit=10500000 [w=256] 00000a0000329320 load=27 (~0%) 00000a00003625d8 Apr 26 08:26:15.614998 Apr 26 08:26:15.614998 (XEN) (XEN) 78: 0000000000000028[0.77] flags=0 cpu=93 0000000000000000 credit=10461580 [w=256] 0000000000000000 load=33 (~0%) 0000000000000208 Apr 26 08:26:15.638989 Apr 26 08:26:15.638989 (XEN) (XEN) 79: 0000000000000000[0.78] flags=0 cpu=15 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.650995 Apr 26 08:26:15.650995 (XEN) (XEN) 80: 0000000000000000[0.79] flags=0 cpu=31 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=27 (~0%) 0000000000000000 Apr 26 08:26:15.662996 Apr 26 08:26:15.662996 (XEN) (XEN) 81: 0000000000000000[0.80] flags=0 cpu=46 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.675004 Apr 26 08:26:15.675004 (XEN) (XEN) 82: 0000000000000000[0.81] flags=0 cpu=49 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=27 (~0%) 0000000000000000 Apr 26 08:26:15.686996 Apr 26 08:26:15.686996 (XEN) (XEN) 83: 0000000000000000[0.82] flags=0 cpu=72 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.698987 Apr 26 08:26:15.698987 (XEN) (XEN) 84: 0000000000000000[0.83] flags=0 cpu=94 0000000000000000 credit=10472460 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:15.715022 Apr 26 08:26:15.715050 (XEN) (XEN) 85: 0000000000000000[0.84] flags=0 cpu=0 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=26 (~0%) 0000000000000000 Apr 26 08:26:15.727088 Apr 26 08:26:15.727140 (XEN) (XEN) 86: 0000000000000000[0.85] flags=0 cpu=47 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=32 (~0%) 0000000000000000 Apr 26 08:26:15.739088 Apr 26 08:26:15.739137 (XEN) (XEN) 87: 0000000000000000[0.86] flags=0 cpu=16 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:15.750883 Apr 26 08:26:15.750883 (XEN) (XEN) 88: 0000000000000000[0.87] flags=0 cpu=50 0000000000000000 credit=10500000 [w=256] 0000000000000000 load=28 (~0%) 0000000000000000 Apr 26 08:26:15.762907 Apr 26 08:26:15.762907 (XEN) (XEN) 89: 0000000000000000[0.88] flags=0 cpu=95 0000000000000000 credit=10465610 [w=256] 0000000000000000 load=30 (~0%) 0000000000000000 Apr 26 08:26:15.774965 Apr 26 08:26:15.774965 (XEN) 90: (XEN) Xen call trace: Apr 26 08:26:15.787003 [0.89] flags=0 cpu=73(XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:15.787003 credit=10500000 [w=256](XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:15.798995 load=28 (~0%)(XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:15.798995 Apr 26 08:26:15.798995 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:15.815152 (XEN) 91: (XEN) Apr 26 08:26:15.815214 [0.90] flags=0 cpu=1(XEN) *** Dumping CPU41 host state: *** Apr 26 08:26:15.815264 credit=10500000 [w=256](XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:15.827052 load=27 (~0%)(XEN) CPU: 41 Apr 26 08:26:15.827110 Apr 26 08:26:15.827148 (XEN) PC: 00000a000026d0b4(XEN) 92: domain.c#idle_loop+0x128/0x190[0.91] flags=0 cpu=19 Apr 26 08:26:15.839018 credit=10500000 [w=256](XEN) LR: 00000a000026d098 Apr 26 08:26:15.839079 load=27 (~0%)(XEN) SP: 0000800feb48fe60 Apr 26 08:26:15.850946 Apr 26 08:26:15.850974 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:15.851002 (XEN) 93: (XEN) X0: 0000000000000000 X1: 0000760feb16e000 X2: 0000800feb496048 Apr 26 08:26:15.862931 [0.92] flags=0 cpu=32(XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:15.862968 credit=10500000 [w=256](XEN) X6: 00000a00003625b0 X7: 0000800ffb8138d0 X8: 0000000000000012 Apr 26 08:26:15.874987 load=29 (~0%)(XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:15.886992 Apr 26 08:26:15.886992 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:15.886992 (XEN) 94: (XEN) X15: 0000000000000000 X16: 1fffe00004d9fde1 X17: 0000000000000000 Apr 26 08:26:15.899003 [0.93] flags=0 cpu=52(XEN) X18: ffff8000afee3c58 X19: 00000a00003625b4 X20: 0000000000000029 Apr 26 08:26:15.909939 credit=10500000 [w=256](XEN) X21: 00000a000032f400 X22: 0000000000000200 X23: 0000000000000029 Apr 26 08:26:15.911070 load=24 (~0%)(XEN) X24: 0000000000000029 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:15.922965 Apr 26 08:26:15.922992 (XEN) X27: 0000000000000000 X28: 0000000000000000 Apr 26 08:26:15.927757 FP: 0000800feb48fe60 Apr 26 08:26:15.935015 (XEN) 95: (XEN) Apr 26 08:26:15.935015 [0.94] flags=0 cpu=74(XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:15.935015 credit=10500000 [w=256](XEN) VTTBR_ Apr 26 08:26:15.936280 EL2: 00010107eb700000 Apr 26 08:26:15.946954 load=25 (~0%)(XEN) Apr 26 08:26:15.946954 Apr 26 08:26:15.946954 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:15.946954 (XEN) 96: (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:15.946954 [0.95] flags=0 cpu=80(XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:15.958962 credit=10464780 [w=256](XEN) Apr 26 08:26:15.958962 load=26 (~0%)(XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:15.970973 Apr 26 08:26:15.970973 (XEN) HPFAR_EL2: 0000009010800500 Apr 26 08:26:15.970973 (XEN) Runqueue 0: Apr 26 08:26:15.970973 (XEN) FAR_EL2: ffff800083050100 Apr 26 08:26:15.970973 (XEN) CPU[00] runq=0, sibling={0}, core={0} Apr 26 08:26:15.982969 (XEN) Apr 26 08:26:15.982969 (XEN) CPU[01] runq=0, sibling={1}, core={1} Apr 26 08:26:15.982969 (XEN) Xen stack trace from sp=0000800feb48fe60: Apr 26 08:26:15.982969 (XEN) (XEN) CPU[02] runq=0, sibling={2}, core={2} Apr 26 08:26:15.994997 0000800feb48fe70(XEN) CPU[03] runq=0, sibling={3}, core={3} Apr 26 08:26:15.994997 00000a0000279908(XEN) CPU[04] runq=0, sibling={4}, core={4} Apr 26 08:26:16.007005 00000a0000329320(XEN) CPU[05] runq=0, sibling={5}, core={5} Apr 26 08:26:16.007005 00000a00003625d8(XEN) CPU[06] runq=0, sibling={6}, core={6} Apr 26 08:26:16.007005 Apr 26 08:26:16.007005 (XEN) (XEN) CPU[07] runq=0, sibling={7}, core={7} Apr 26 08:26:16.018998 0000000000000029(XEN) CPU[08] runq=0, sibling={8}, core={8} Apr 26 08:26:16.018998 0000000000000000(XEN) CPU[09] runq=0, sibling={9}, core={9} Apr 26 08:26:16.031003 0000000000000000(XEN) CPU[10] runq=0, sibling={10}, core={10} Apr 26 08:26:16.031003 0000000000000209(XEN) CPU[11] runq=0, sibling={11}, core={11} Apr 26 08:26:16.043000 Apr 26 08:26:16.043000 (XEN) (XEN) CPU[12] runq=0, sibling={12}, core={12} Apr 26 08:26:16.043000 0000000000000000(XEN) CPU[13] runq=0, sibling={13}, core={13} Apr 26 08:26:16.054990 0000000000000000(XEN) CPU[14] runq=0, sibling={14}, core={14} Apr 26 08:26:16.054990 0000000000000000(XEN) CPU[15] runq=0, sibling={15}, core={15} Apr 26 08:26:16.054990 0000000000000000(XEN) RUNQ: Apr 26 08:26:16.067000 Apr 26 08:26:16.067000 (XEN) (XEN) Runqueue 1: Apr 26 08:26:16.067000 0000000000000000(XEN) CPU[16] runq=1, sibling={16}, core={16} Apr 26 08:26:16.067000 0000000000000000(XEN) CPU[17] runq=1, sibling={17}, core={17} Apr 26 08:26:16.078994 0000000000000000(XEN) CPU[18] runq=1, sibling={18}, core={18} Apr 26 08:26:16.078994 0000000000000000(XEN) CPU[19] runq=1, sibling={19}, core={19} Apr 26 08:26:16.090996 Apr 26 08:26:16.090996 (XEN) (XEN) CPU[20] runq=1, sibling={20}, core={20} Apr 26 08:26:16.090996 0000000000000000(XEN) CPU[21] runq=1, sibling={21}, core={21} Apr 26 08:26:16.102999 0000000000000000(XEN) CPU[22] runq=1, sibling={22}, core={22} Apr 26 08:26:16.102999 0000000000000000(XEN) CPU[23] runq=1, sibling={23}, core={23} Apr 26 08:26:16.114999 0000000000000000(XEN) CPU[24] runq=1, sibling={24}, core={24} Apr 26 08:26:16.114999 Apr 26 08:26:16.114999 (XEN) (XEN) CPU[25] runq=1, sibling={25}, core={25} Apr 26 08:26:16.127002 0000000000000000(XEN) CPU[26] runq=1, sibling={26}, core={26} Apr 26 08:26:16.127002 0000000000000000(XEN) CPU[27] runq=1, sibling={27}, core={27} Apr 26 08:26:16.127002 0000000000000000(XEN) CPU[28] runq=1, sibling={28}, core={28} Apr 26 08:26:16.138998 0000000000000000(XEN) CPU[29] runq=1, sibling={29}, core={29} Apr 26 08:26:16.138998 Apr 26 08:26:16.138998 (XEN) (XEN) CPU[30] runq=1, sibling={30}, core={30} Apr 26 08:26:16.150999 0000000000000000(XEN) CPU[31] runq=1, sibling={31}, core={31} Apr 26 08:26:16.150999 0000000000000000(XEN) RUNQ: Apr 26 08:26:16.150999 0000000000000000(XEN) Runqueue 2: Apr 26 08:26:16.162999 0000000000000000(XEN) CPU[32] runq=2, sibling={32}, core={32} Apr 26 08:26:16.162999 Apr 26 08:26:16.162999 (XEN) (XEN) CPU[33] runq=2, sibling={33}, core={33} Apr 26 08:26:16.174999 0000000000000000(XEN) CPU[34] runq=2, sibling={34}, core={34} Apr 26 08:26:16.174999 0000000000000000(XEN) CPU[35] runq=2, sibling={35}, core={35} Apr 26 08:26:16.186997 0000000000000000(XEN) CPU[36] runq=2, sibling={36}, core={36} Apr 26 08:26:16.186997 0000000000000000(XEN) CPU[37] runq=2, sibling={37}, core={37} Apr 26 08:26:16.186997 Apr 26 08:26:16.186997 (XEN) (XEN) CPU[38] runq=2, sibling={38}, core={38} Apr 26 08:26:16.198999 0000000000000000(XEN) CPU[39] runq=2, sibling={39}, core={39} Apr 26 08:26:16.198999 0000000000000000(XEN) CPU[40] runq=2, sibling={40}, core={40} Apr 26 08:26:16.210969 0000000000000000(XEN) CPU[41] runq=2, sibling={41}, core={41} Apr 26 08:26:16.210969 0000000000000000(XEN) CPU[42] runq=2, sibling={42}, core={42} Apr 26 08:26:16.222993 Apr 26 08:26:16.222993 (XEN) (XEN) CPU[43] runq=2, sibling={43}, core={43} Apr 26 08:26:16.222993 0000000000000000(XEN) CPU[44] runq=2, sibling={44}, core={44} Apr 26 08:26:16.234953 0000000000000000(XEN) CPU[45] runq=2, sibling={45}, core={45} Apr 26 08:26:16.234953 0000000000000000(XEN) CPU[46] runq=2, sibling={46}, core={46} Apr 26 08:26:16.247132 0000000000000000(XEN) CPU[47] runq=2, sibling={47}, core={47} Apr 26 08:26:16.247198 Apr 26 08:26:16.247236 (XEN) (XEN) RUNQ: Apr 26 08:26:16.247277 0000000000000000(XEN) Runqueue 3: Apr 26 08:26:16.259108 0000000000000000(XEN) CPU[48] runq=3, sibling={48}, core={48} Apr 26 08:26:16.259171 0000000000000000(XEN) CPU[49] runq=3, sibling={49}, core={49} Apr 26 08:26:16.259218 0000000000000000(XEN) CPU[50] runq=3, sibling={50}, core={50} Apr 26 08:26:16.271104 Apr 26 08:26:16.271155 (XEN) (XEN) CPU[51] runq=3, sibling={51}, core={51} Apr 26 08:26:16.271202 0000000000000000(XEN) CPU[52] runq=3, sibling={52}, core={52} Apr 26 08:26:16.283113 0000000000000000(XEN) CPU[53] runq=3, sibling={53}, core={53} Apr 26 08:26:16.283174 0000000000000000(XEN) CPU[54] runq=3, sibling={54}, core={54} Apr 26 08:26:16.295075 0000000000000000(XEN) CPU[55] runq=3, sibling={55}, core={55} Apr 26 08:26:16.295130 Apr 26 08:26:16.295168 (XEN) (XEN) CPU[56] runq=3, sibling={56}, core={56} Apr 26 08:26:16.307124 0000000000000000(XEN) CPU[57] runq=3, sibling={57}, core={57} Apr 26 08:26:16.307185 0000000000000000(XEN) CPU[58] runq=3, sibling={58}, core={58} Apr 26 08:26:16.319112 0000000000000000(XEN) CPU[59] runq=3, sibling={59}, core={59} Apr 26 08:26:16.319175 0000000000000000(XEN) CPU[60] runq=3, sibling={60}, core={60} Apr 26 08:26:16.319223 Apr 26 08:26:16.319260 (XEN) CPU[61] runq=3, sibling={61}, core={61} Apr 26 08:26:16.331117 (XEN) Xen call trace: Apr 26 08:26:16.331173 (XEN) CPU[62] runq=3, sibling={62}, core={62} Apr 26 08:26:16.331219 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:16.343116 (XEN) CPU[63] runq=3, sibling={63}, core={63} Apr 26 08:26:16.343177 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:16.355113 (XEN) RUNQ: Apr 26 08:26:16.355167 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:16.355216 (XEN) Runqueue 4: Apr 26 08:26:16.355257 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:16.367108 (XEN) CPU[64] runq=4, sibling={64}, core={64} Apr 26 08:26:16.367169 (XEN) Apr 26 08:26:16.367209 (XEN) CPU[65] runq=4, sibling={65}, core={65} Apr 26 08:26:16.367254 (XEN) *** Dumping CPU42 host state: *** Apr 26 08:26:16.379123 (XEN) CPU[66] runq=4, sibling={66}, core={66} Apr 26 08:26:16.379183 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:16.391109 (XEN) CPU[67] runq=4, sibling={67}, core={67} Apr 26 08:26:16.391169 (XEN) CPU: 42 Apr 26 08:26:16.391211 (XEN) CPU[68] runq=4, sibling={68}, core={68} Apr 26 08:26:16.391257 (XEN) PC: 00000a000026d0b4(XEN) CPU[69] runq=4, sibling={69}, core={69} Apr 26 08:26:16.403112 domain.c#idle_loop+0x128/0x190(XEN) CPU[70] runq=4, sibling={70}, core={70} Apr 26 08:26:16.403178 Apr 26 08:26:16.403217 (XEN) CPU[71] runq=4, sibling={71}, core={71} Apr 26 08:26:16.415111 (XEN) LR: 00000a000026d098 Apr 26 08:26:16.415167 (XEN) CPU[72] runq=4, sibling={72}, core={72} Apr 26 08:26:16.415213 (XEN) SP: 0000800feb487e60 Apr 26 08:26:16.427104 (XEN) CPU[73] runq=4, sibling={73}, core={73} Apr 26 08:26:16.427164 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:16.427216 (XEN) CPU[74] runq=4, sibling={74}, core={74} Apr 26 08:26:16.439133 (XEN) X0: 0000000000000000 X1: 0000760feb16a000 X2: 0000800feb492048 Apr 26 08:26:16.439212 (XEN) CPU[75] runq=4, sibling={75}, core={75} Apr 26 08:26:16.451113 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:16.451177 (XEN) CPU[76] runq=4, sibling={76}, core={76} Apr 26 08:26:16.463090 (XEN) X6: 00000a00003625b0 X7: 0000800ffb813d90 X8: 0000000000000012 Apr 26 08:26:16.463154 (XEN) CPU[77] runq=4, sibling={77}, core={77} Apr 26 08:26:16.475036 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:16.475099 (XEN) CPU[78] runq=4, sibling={78}, core={78} Apr 26 08:26:16.486969 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:16.486969 (XEN) CPU[79] runq=4, sibling={79}, core={79} Apr 26 08:26:16.486969 (XEN) X15: 0000000000000245 X16: 1fffe00005e8e681 X17: 0000000000000000 Apr 26 08:26:16.498905 (XEN) RUNQ: Apr 26 08:26:16.498905 (XEN) X18: ffff8000aff03c58 X19: 00000a00003625b4 X20: 000000000000002a Apr 26 08:26:16.510995 (XEN) Runqueue 5: Apr 26 08:26:16.510995 (XEN) X21: 00000a000032f480 X22: 0000000000000400 X23: 000000000000002a Apr 26 08:26:16.510995 (XEN) CPU[80] runq=5, sibling={80}, core={80} Apr 26 08:26:16.522993 (XEN) X24: 000000000000002a X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:16.522993 (XEN) CPU[81] runq=5, sibling={81}, core={81} Apr 26 08:26:16.534992 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb487e60 Apr 26 08:26:16.534992 (XEN) CPU[82] runq=5, sibling={82}, core={82} Apr 26 08:26:16.534992 (XEN) Apr 26 08:26:16.546983 (XEN) CPU[83] runq=5, sibling={83}, core={83} Apr 26 08:26:16.546983 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:16.546983 (XEN) CPU[84] runq=5, sibling={84}, core={84} Apr 26 08:26:16.546983 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:16.559002 (XEN) CPU[85] runq=5, sibling={85}, core={85} Apr 26 08:26:16.559002 (XEN) Apr 26 08:26:16.559002 (XEN) CPU[86] runq=5, sibling={86}, core={86} Apr 26 08:26:16.559002 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:16.570999 (XEN) CPU[87] runq=5, sibling={87}, core={87} Apr 26 08:26:16.570999 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:16.570999 (XEN) CPU[88] runq=5, sibling={88}, core={88} Apr 26 08:26:16.582985 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:16.582985 (XEN) CPU[89] runq=5, sibling={89}, core={89} Apr 26 08:26:16.582985 (XEN) Apr 26 08:26:16.582985 (XEN) CPU[90] runq=5, sibling={90}, core={90} Apr 26 08:26:16.594997 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:16.594997 (XEN) CPU[91] runq=5, sibling={91}, core={91} Apr 26 08:26:16.594997 (XEN) HPFAR_EL2: 0000009010801100 Apr 26 08:26:16.607001 (XEN) CPU[92] runq=5, sibling={92}, core={92} Apr 26 08:26:16.607001 (XEN) FAR_EL2: ffff800083110100 Apr 26 08:26:16.607001 (XEN) CPU[93] runq=5, sibling={93}, core={93} Apr 26 08:26:16.607001 (XEN) Apr 26 08:26:16.618989 (XEN) CPU[94] runq=5, sibling={94}, core={94} Apr 26 08:26:16.618989 (XEN) Xen stack trace from sp=0000800feb487e60: Apr 26 08:26:16.618989 (XEN) (XEN) CPU[95] runq=5, sibling={95}, core={95} Apr 26 08:26:16.631002 0000800feb487e70(XEN) RUNQ: Apr 26 08:26:16.631002 00000a0000279908(XEN) CPUs info: Apr 26 08:26:16.631002 00000a0000329320(XEN) CPU[00] current=d[IDLE]v0, curr=d[IDLE]v0, prev=NULL Apr 26 08:26:16.642998 00000a00003625d8(XEN) CPU[01] current=d[IDLE]v1, curr=d[IDLE]v1, prev=NULL Apr 26 08:26:16.642998 Apr 26 08:26:16.642998 (XEN) (XEN) CPU[02] current=d0v1, curr=d0v1, prev=NULL Apr 26 08:26:16.654998 000000000000002a(XEN) CPU[03] current=d0v6, curr=d[IDLE]v3, prev=d0v6 Apr 26 08:26:16.654998 0000000000000000(XEN) CPU[04] current=d[IDLE]v4, curr=d[IDLE]v4, prev=NULL Apr 26 08:26:16.666996 0000000000000000(XEN) CPU[05] current=d[IDLE]v5, curr=d[IDLE]v5, prev=NULL Apr 26 08:26:16.666996 000000000000020a(XEN) CPU[06] current=d[IDLE]v6, curr=d[IDLE]v6, prev=NULL Apr 26 08:26:16.678986 Apr 26 08:26:16.678986 (XEN) (XEN) CPU[07] current=d[IDLE]v7, curr=d[IDLE]v7, prev=NULL Apr 26 08:26:16.678986 0000000000000000(XEN) CPU[08] current=d[IDLE]v8, curr=d[IDLE]v8, prev=NULL Apr 26 08:26:16.690996 0000000000000000(XEN) CPU[09] current=d[IDLE]v9, curr=d[IDLE]v9, prev=NULL Apr 26 08:26:16.690996 0000000000000000(XEN) CPU[10] current=d[IDLE]v10, curr=d[IDLE]v10, prev=NULL Apr 26 08:26:16.703003 0000000000000000(XEN) CPU[11] current=d[IDLE]v11, curr=d[IDLE]v11, prev=NULL Apr 26 08:26:16.714987 Apr 26 08:26:16.714987 (XEN) (XEN) CPU[12] current=d[IDLE]v12, curr=d[IDLE]v12, prev=NULL Apr 26 08:26:16.714987 0000000000000000(XEN) CPU[13] current=d[IDLE]v13, curr=d[IDLE]v13, prev=NULL Apr 26 08:26:16.727002 0000000000000000(XEN) CPU[14] current=d[IDLE]v14, curr=d[IDLE]v14, prev=NULL Apr 26 08:26:16.727002 0000000000000000(XEN) CPU[15] current=d[IDLE]v15, curr=d[IDLE]v15, prev=NULL Apr 26 08:26:16.739139 0000000000000000(XEN) CPU[16] current=d[IDLE]v16, curr=d[IDLE]v16, prev=NULL Apr 26 08:26:16.751000 Apr 26 08:26:16.751000 (XEN) (XEN) CPU[17] current=d[IDLE]v17, curr=d[IDLE]v17, prev=NULL Apr 26 08:26:16.751000 0000000000000000(XEN) CPU[18] current=d[IDLE]v18, curr=d[IDLE]v18, prev=NULL Apr 26 08:26:16.763001 0000000000000000(XEN) CPU[19] current=d[IDLE]v19, curr=d[IDLE]v19, prev=NULL Apr 26 08:26:16.763001 0000000000000000(XEN) CPU[20] current=d[IDLE]v20, curr=d[IDLE]v20, prev=NULL Apr 26 08:26:16.775001 0000000000000000(XEN) CPU[21] current=d[IDLE]v21, curr=d[IDLE]v21, prev=NULL Apr 26 08:26:16.775001 Apr 26 08:26:16.775001 (XEN) (XEN) CPU[22] current=d[IDLE]v22, curr=d[IDLE]v22, prev=NULL Apr 26 08:26:16.786996 0000000000000000(XEN) CPU[23] current=d[IDLE]v23, curr=d[IDLE]v23, prev=NULL Apr 26 08:26:16.786996 0000000000000000(XEN) CPU[24] current=d[IDLE]v24, curr=d[IDLE]v24, prev=NULL Apr 26 08:26:16.799089 0000000000000000(XEN) CPU[25] current=d[IDLE]v25, curr=d[IDLE]v25, prev=NULL Apr 26 08:26:16.811004 0000000000000000(XEN) CPU[26] current=d[IDLE]v26, curr=d[IDLE]v26, prev=NULL Apr 26 08:26:16.811004 Apr 26 08:26:16.811004 (XEN) (XEN) CPU[27] current=d[IDLE]v27, curr=d[IDLE]v27, prev=NULL Apr 26 08:26:16.822980 0000000000000000(XEN) CPU[28] current=d[IDLE]v28, curr=d[IDLE]v28, prev=NULL Apr 26 08:26:16.822980 0000000000000000(XEN) CPU[29] current=d[IDLE]v29, curr=d[IDLE]v29, prev=NULL Apr 26 08:26:16.834920 0000000000000000(XEN) CPU[30] current=d[IDLE]v30, curr=d[IDLE]v30, prev=NULL Apr 26 08:26:16.834920 0000000000000000(XEN) CPU[31] current=d[IDLE]v31, curr=d[IDLE]v31, prev=NULL Apr 26 08:26:16.846983 Apr 26 08:26:16.846983 (XEN) (XEN) CPU[32] current=d[IDLE]v32, curr=d[IDLE]v32, prev=NULL Apr 26 08:26:16.858984 0000000000000000(XEN) CPU[33] current=d[IDLE]v33, curr=d[IDLE]v33, prev=NULL Apr 26 08:26:16.858984 0000000000000000(XEN) CPU[34] current=d[IDLE]v34, curr=d[IDLE]v34, prev=NULL Apr 26 08:26:16.871096 0000000000000000(XEN) CPU[35] current=d[IDLE]v35, curr=d[IDLE]v35, prev=NULL Apr 26 08:26:16.871165 0000000000000000(XEN) CPU[36] current=d[IDLE]v36, curr=d[IDLE]v36, prev=NULL Apr 26 08:26:16.883001 Apr 26 08:26:16.883001 (XEN) (XEN) CPU[37] current=d[IDLE]v37, curr=d[IDLE]v37, prev=NULL Apr 26 08:26:16.883001 0000000000000000(XEN) CPU[38] current=d[IDLE]v38, curr=d[IDLE]v38, prev=NULL Apr 26 08:26:16.894987 0000000000000000(XEN) CPU[39] current=d[IDLE]v39, curr=d[IDLE]v39, prev=NULL Apr 26 08:26:16.906995 0000000000000000(XEN) CPU[40] current=d[IDLE]v40, curr=d[IDLE]v40, prev=NULL Apr 26 08:26:16.906995 0000000000000000(XEN) CPU[41] current=d[IDLE]v41, curr=d[IDLE]v41, prev=NULL Apr 26 08:26:16.918997 Apr 26 08:26:16.918997 (XEN) (XEN) CPU[42] current=d[IDLE]v42, curr=d[IDLE]v42, prev=NULL Apr 26 08:26:16.918997 0000000000000000(XEN) CPU[43] current=d[IDLE]v43, curr=d[IDLE]v43, prev=NULL Apr 26 08:26:16.930997 0000000000000000(XEN) CPU[44] current=d[IDLE]v44, curr=d[IDLE]v44, prev=NULL Apr 26 08:26:16.930997 0000000000000000(XEN) CPU[45] current=d[IDLE]v45, curr=d[IDLE]v45, prev=NULL Apr 26 08:26:16.942996 0000000000000000(XEN) CPU[46] current=d[IDLE]v46, curr=d[IDLE]v46, prev=NULL Apr 26 08:26:16.954995 Apr 26 08:26:16.954995 (XEN) (XEN) CPU[47] current=d[IDLE]v47, curr=d[IDLE]v47, prev=NULL Apr 26 08:26:16.954995 0000000000000000(XEN) CPU[48] current=d[IDLE]v48, curr=d[IDLE]v48, prev=NULL Apr 26 08:26:16.967004 0000000000000000(XEN) CPU[49] current=d[IDLE]v49, curr=d[IDLE]v49, prev=NULL Apr 26 08:26:16.967004 0000000000000000(XEN) CPU[50] current=d[IDLE]v50, curr=d[IDLE]v50, prev=NULL Apr 26 08:26:16.978985 0000000000000000(XEN) CPU[51] current=d[IDLE]v51, curr=d[IDLE]v51, prev=NULL Apr 26 08:26:16.978985 Apr 26 08:26:16.978985 (XEN) (XEN) CPU[52] current=d[IDLE]v52, curr=d[IDLE]v52, prev=NULL Apr 26 08:26:16.991006 0000000000000000(XEN) CPU[53] current=d[IDLE]v53, curr=d[IDLE]v53, prev=NULL Apr 26 08:26:17.003001 0000000000000000(XEN) CPU[54] current=d[IDLE]v54, curr=d[IDLE]v54, prev=NULL Apr 26 08:26:17.003001 0000000000000000(XEN) CPU[55] current=d[IDLE]v55, curr=d[IDLE]v55, prev=NULL Apr 26 08:26:17.014988 0000000000000000(XEN) CPU[56] current=d[IDLE]v56, curr=d[IDLE]v56, prev=NULL Apr 26 08:26:17.014988 Apr 26 08:26:17.014988 (XEN) (XEN) CPU[57] current=d[IDLE]v57, curr=d[IDLE]v57, prev=NULL Apr 26 08:26:17.026994 0000000000000000(XEN) CPU[58] current=d[IDLE]v58, curr=d[IDLE]v58, prev=NULL Apr 26 08:26:17.026994 0000000000000000(XEN) CPU[59] current=d[IDLE]v59, curr=d[IDLE]v59, prev=NULL Apr 26 08:26:17.038999 0000000000000000(XEN) CPU[60] current=d[IDLE]v60, curr=d[IDLE]v60, prev=NULL Apr 26 08:26:17.051000 0000000000000000(XEN) CPU[61] current=d[IDLE]v61, curr=d[IDLE]v61, prev=NULL Apr 26 08:26:17.051000 Apr 26 08:26:17.051000 (XEN) CPU[62] current=d[IDLE]v62, curr=d[IDLE]v62, prev=NULL Apr 26 08:26:17.062996 (XEN) Xen call trace: Apr 26 08:26:17.062996 (XEN) CPU[63] current=d[IDLE]v63, curr=d[IDLE]v63, prev=NULL Apr 26 08:26:17.062996 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:17.074997 (XEN) CPU[64] current=d[IDLE]v64, curr=d[IDLE]v64, prev=NULL Apr 26 08:26:17.074997 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:17.086993 (XEN) CPU[65] current=d[IDLE]v65, curr=d[IDLE]v65, prev=NULL Apr 26 08:26:17.086993 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:17.086993 (XEN) CPU[66] current=d[IDLE]v66, curr=d[IDLE]v66, prev=NULL Apr 26 08:26:17.098997 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:17.098997 (XEN) CPU[67] current=d[IDLE]v67, curr=d[IDLE]v67, prev=NULL Apr 26 08:26:17.110937 (XEN) Apr 26 08:26:17.110937 (XEN) CPU[68] current=d0v23, curr=d0v23, prev=NULL Apr 26 08:26:17.110937 (XEN) *** Dumping CPU43 host state: *** Apr 26 08:26:17.110937 (XEN) CPU[69] current=d[IDLE]v69, curr=d[IDLE]v69, prev=NULL Apr 26 08:26:17.122995 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:17.122995 (XEN) CPU[70] current=d0v4, curr=d0v4, prev=NULL Apr 26 08:26:17.134990 (XEN) CPU: 43 Apr 26 08:26:17.134990 (XEN) CPU[71] current=d[IDLE]v71, curr=d[IDLE]v71, prev=NULL Apr 26 08:26:17.134990 (XEN) PC: 00000a000026d0b4(XEN) CPU[72] current=d[IDLE]v72, curr=d[IDLE]v72, prev=NULL Apr 26 08:26:17.146993 domain.c#idle_loop+0x128/0x190(XEN) CPU[73] current=d[IDLE]v73, curr=d[IDLE]v73, prev=NULL Apr 26 08:26:17.158996 Apr 26 08:26:17.158996 (XEN) CPU[74] current=d[IDLE]v74, curr=d[IDLE]v74, prev=NULL Apr 26 08:26:17.158996 (XEN) LR: 00000a000026d098 Apr 26 08:26:17.158996 (XEN) CPU[75] current=d[IDLE]v75, curr=d[IDLE]v75, prev=NULL Apr 26 08:26:17.170961 (XEN) SP: 0000800feb3b7e60 Apr 26 08:26:17.170961 (XEN) CPU[76] current=d0v22, curr=d0v22, prev=NULL Apr 26 08:26:17.170961 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:17.182913 (XEN) CPU[77] current=d0v40, curr=d[IDLE]v77, prev=d0v40 Apr 26 08:26:17.182913 (XEN) X0: 0000000000000000 X1: 0000760feb096000 X2: 0000800feb3be048 Apr 26 08:26:17.194965 (XEN) CPU[78] current=d[IDLE]v78, curr=d[IDLE]v78, prev=NULL Apr 26 08:26:17.194965 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:17.206980 (XEN) CPU[79] current=d[IDLE]v79, curr=d[IDLE]v79, prev=NULL Apr 26 08:26:17.206980 (XEN) X6: 00000a00003625b0 X7: 0000800feb491280 X8: 0000000000000012 Apr 26 08:26:17.219001 (XEN) CPU[80] current=d[IDLE]v80, curr=d[IDLE]v80, prev=NULL Apr 26 08:26:17.219001 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:17.230995 (XEN) CPU[81] current=d[IDLE]v81, curr=d[IDLE]v81, prev=NULL Apr 26 08:26:17.230995 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:17.242996 (XEN) CPU[82] current=d[IDLE]v82, curr=d[IDLE]v82, prev=NULL Apr 26 08:26:17.242996 (XEN) X15: 0000000000000001 X16: 1fffe0000561dd01 X17: 0000000000000000 Apr 26 08:26:17.254999 (XEN) CPU[83] current=d[IDLE]v83, curr=d[IDLE]v83, prev=NULL Apr 26 08:26:17.254999 (XEN) X18: ffff8000ae1d3c58 X19: 00000a00003625b4 X20: 000000000000002b Apr 26 08:26:17.266997 (XEN) CPU[84] current=d[IDLE]v84, curr=d[IDLE]v84, prev=NULL Apr 26 08:26:17.266997 (XEN) X21: 00000a000032f500 X22: 0000000000000800 X23: 000000000000002b Apr 26 08:26:17.278996 (XEN) CPU[85] current=d[IDLE]v85, curr=d[IDLE]v85, prev=NULL Apr 26 08:26:17.278996 (XEN) X24: 000000000000002b X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:17.291000 (XEN) CPU[86] current=d[IDLE]v86, curr=d[IDLE]v86, prev=NULL Apr 26 08:26:17.291000 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb3b7e60 Apr 26 08:26:17.303001 (XEN) CPU[87] current=d[IDLE]v87, curr=d[IDLE]v87, prev=NULL Apr 26 08:26:17.303001 (XEN) Apr 26 08:26:17.303001 (XEN) CPU[88] current=d[IDLE]v88, curr=d[IDLE]v88, prev=NULL Apr 26 08:26:17.314996 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:17.314996 (XEN) CPU[89] current=d[IDLE]v89, curr=d[IDLE]v89, prev=NULL Apr 26 08:26:17.326997 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:17.326997 (XEN) CPU[90] current=d[IDLE]v90, curr=d[IDLE]v90, prev=NULL Apr 26 08:26:17.326997 (XEN) Apr 26 08:26:17.326997 (XEN) CPU[91] current=d[IDLE]v91, curr=d[IDLE]v91, prev=NULL Apr 26 08:26:17.339001 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:17.339001 (XEN) CPU[92] current=d[IDLE]v92, curr=d[IDLE]v92, prev=NULL Apr 26 08:26:17.351000 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:17.351000 (XEN) CPU[93] current=d[IDLE]v93, curr=d[IDLE]v93, prev=NULL Apr 26 08:26:17.351000 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:17.351000 (XEN) CPU[94] current=d[IDLE]v94, curr=d[IDLE]v94, prev=NULL Apr 26 08:26:17.362992 (XEN) Apr 26 08:26:17.362992 (XEN) CPU[95] current=d[IDLE]v95, curr=d[IDLE]v95, prev=NULL Apr 26 08:26:17.362992 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:17.374999 (XEN) HPFAR_EL2: 0000009010801d00 Apr 26 08:26:17.374999 (XEN) FAR_EL2: ffff8000831d0100 Apr 26 08:26:17.374999 (XEN) Apr 26 08:26:17.374999 (XEN) Xen stack trace from sp=0000800feb3b7e60: Apr 26 08:26:17.386976 (XEN) 0000800feb3b7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:17.386976 (XEN) 000000000000002b 0000000000000000 0000000000000000 000000000000020b Apr 26 08:26:17.399002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.399002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.411001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.411001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.422999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.435004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.435004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.447189 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.447256 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.456895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.468888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.468951 (XEN) Xen call trace: Apr 26 08:26:17.468994 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:17.480911 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:17.480975 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:17.492891 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:17.492951 (XEN) Apr 26 08:26:17.492992 (XEN) *** Dumping CPU44 host state: *** Apr 26 08:26:17.493038 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:17.504916 (XEN) CPU: 44 Apr 26 08:26:17.504972 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:17.505022 (XEN) LR: 00000a000026d098 Apr 26 08:26:17.516904 (XEN) SP: 0000800feb3afe60 Apr 26 08:26:17.516962 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:17.517014 (XEN) X0: 0000000000000000 X1: 0000760feb094000 X2: 0000800feb3bc048 Apr 26 08:26:17.528909 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:17.540893 (XEN) X6: 00000a00003625b0 X7: 0000800feb491740 X8: 0000000000000012 Apr 26 08:26:17.540958 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:17.552896 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:17.552986 (XEN) X15: 0000000000000001 X16: 1fffe00005fcd161 X17: 0000000000000000 Apr 26 08:26:17.564871 (XEN) X18: ffff8000aac0bc58 X19: 00000a00003625b4 X20: 000000000000002c Apr 26 08:26:17.564929 (XEN) X21: 00000a000032f580 X22: 0000000000001000 X23: 000000000000002c Apr 26 08:26:17.576922 (XEN) X24: 000000000000002c X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:17.576985 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb3afe60 Apr 26 08:26:17.588909 (XEN) Apr 26 08:26:17.588964 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:17.589010 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:17.600897 (XEN) Apr 26 08:26:17.600950 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:17.600996 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:17.601040 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:17.601084 (XEN) Apr 26 08:26:17.601122 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:17.612897 (XEN) HPFAR_EL2: 0000009010802900 Apr 26 08:26:17.612955 (XEN) FAR_EL2: ffff800083290100 Apr 26 08:26:17.613001 (XEN) Apr 26 08:26:17.613041 (XEN) Xen stack trace from sp=0000800feb3afe60: Apr 26 08:26:17.624895 (XEN) 0000800feb3afe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:17.624958 (XEN) 000000000000002c 0000000000000000 0000000000000000 000000000000020c Apr 26 08:26:17.636910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.636974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.648899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.660892 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.660956 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.672900 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.672962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.684899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.684964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.696902 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.696966 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.708909 (XEN) Xen call trace: Apr 26 08:26:17.708967 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:17.724868 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:17.724932 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:17.724981 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:17.740793 (XEN) Apr 26 08:26:17.740823 (XEN) *** Dumping CPU45 host state: *** Apr 26 08:26:17.740849 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:17.740876 (XEN) CPU: 45 Apr 26 08:26:17.740898 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:17.752748 (XEN) LR: 00000a000026d098 Apr 26 08:26:17.752777 (XEN) SP: 0000800feb3a7e60 Apr 26 08:26:17.752801 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:17.764845 (XEN) X0: 0000000000000000 X1: 0000760feb090000 X2: 0000800feb3b8048 Apr 26 08:26:17.764912 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:17.776845 (XEN) X6: 00000a00003625b0 X7: 0000800feb491c00 X8: 0000000000000012 Apr 26 08:26:17.776910 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:17.788901 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:17.788965 (XEN) X15: 00000000e68f4dc2 X16: 0000000004266c69 X17: ffff8000821e0240 Apr 26 08:26:17.800912 (XEN) X18: ffff80009857bc38 X19: 00000a00003625b4 X20: 000000000000002d Apr 26 08:26:17.812801 (XEN) X21: 00000a000032f600 X22: 0000000000002000 X23: 000000000000002d Apr 26 08:26:17.812867 (XEN) X24: 000000000000002d X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:17.824842 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb3a7e60 Apr 26 08:26:17.824907 (XEN) Apr 26 08:26:17.824949 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:17.836769 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:17.836806 (XEN) Apr 26 08:26:17.836848 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:17.836892 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:17.836936 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:17.848806 (XEN) Apr 26 08:26:17.848815 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:17.848861 (XEN) HPFAR_EL2: 0000009010803500 Apr 26 08:26:17.848906 (XEN) FAR_EL2: ffff800083350100 Apr 26 08:26:17.848949 (XEN) Apr 26 08:26:17.860723 (XEN) Xen stack trace from sp=0000800feb3a7e60: Apr 26 08:26:17.860732 (XEN) 0000800feb3a7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:17.860760 (XEN) 000000000000002d 0000000000000000 0000000000000000 000000000000020d Apr 26 08:26:17.872893 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.884886 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.884950 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.896899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.896963 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.912701 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.912734 (XEN) 0000000000000000 0000000000000000 00000000000000 Apr 26 08:26:17.915120 00 0000000000000000 Apr 26 08:26:17.928934 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.928998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.929047 (XEN) Apr 26 08:26:17.932091 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.944870 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:17.944928 (XEN) Xen call trace: Apr 26 08:26:17.944971 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:17.960867 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:17.960929 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:17.960977 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:17.972842 (XEN) Apr 26 08:26:17.972895 (XEN) *** Dumping CPU46 host state: *** Apr 26 08:26:17.972941 (XEN) Synced stime skew: max=2270ns avg=2270ns samples=1 current=2270ns Apr 26 08:26:17.988871 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:17.988936 (XEN) Synced cycles skew: max=182 avg=182 samples=1 current=182 Apr 26 08:26:17.988985 (XEN) CPU: 46 Apr 26 08:26:18.003020 (XEN) PC: 00000a0000218a34 keyhandler.c#read_clocks_slave+0xf8/0x128 Apr 26 08:26:18.003020 (XEN) LR: 00000a0000218a30 Apr 26 08:26:18.003020 (XEN) SP: 0000800f1e237c80 Apr 26 08:26:18.003020 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:18.015000 (XEN) X0: 0000000000004000 X1: 00000a000032b084 X2: 0000000000000000 Apr 26 08:26:18.015000 (XEN) X3: 000000000000bdd9 X4: 00000000d9b5600e X5: 00000a00003625a8 Apr 26 08:26:18.027005 (XEN) X6: 00000a00003625b0 X7: 0000800f1e23c150 X8: 0000000000000012 Apr 26 08:26:18.038995 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:18.038995 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:18.050998 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:18.050998 (XEN) X18: 0000000000000000 X19: 000000000000002e X20: 00000a0000328030 Apr 26 08:26:18.062997 (XEN) X21: 00000a0000362188 X22: 00000a0000328030 X23: 000000000000002e Apr 26 08:26:18.062997 (XEN) X24: 0000760f1df16000 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:18.075126 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e237c80 Apr 26 08:26:18.075199 (XEN) Apr 26 08:26:18.086996 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:18.086996 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:18.086996 (XEN) Apr 26 08:26:18.086996 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:18.086996 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:18.098998 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:18.098998 (XEN) Apr 26 08:26:18.098998 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:18.098998 (XEN) HPFAR_EL2: 0000009010804100 Apr 26 08:26:18.098998 (XEN) FAR_EL2: ffff800083410100 Apr 26 08:26:18.111099 (XEN) Apr 26 08:26:18.111157 (XEN) Xen stack trace from sp=0000800f1e237c80: Apr 26 08:26:18.111204 (XEN) 0000800f1e237cc0 00000a0000224558 000000000000002e 00000a000021893c Apr 26 08:26:18.123009 (XEN) 0000000000000000 0000000000000000 0000000000001fff 0000800f1e23e400 Apr 26 08:26:18.123009 (XEN) 0000800f1e237cf0 00000a000026eee8 0000000000000002 00000a0000342000 Apr 26 08:26:18.134998 (XEN) 0000800f1e237d40 0000800feb707ae8 0000800f1e237d30 00000a000027cb88 Apr 26 08:26:18.134998 (XEN) 00000a00003625b4 000000000000002e 0000800f1e237e48 0000000080000249 Apr 26 08:26:18.146995 (XEN) 0000000007e00000 000000000000002e 0000800f1e237e60 00000a000026332c Apr 26 08:26:18.158999 (XEN) 0000000000000000 0000760f1df16000 0000800f1e23e048 ffffffffffffff9e Apr 26 08:26:18.158999 (XEN) 0000000000000000 00000a00003625a8 00000a00003625b0 0000800f1e23c150 Apr 26 08:26:18.170998 (XEN) 0000000000000012 0000000000000080 7f7f7f7f7f7f7f7f 0101010101010101 Apr 26 08:26:18.170998 (XEN) 0000000000000008 0000000000000020 0000000000000000 0000000000000000 Apr 26 08:26:18.182987 (XEN) 0000000000000000 0000000000000000 0000000000000000 00000a00003625b4 Apr 26 08:26:18.182987 (XEN) 000000000000002e 00000a000032f680 0000000000004000 000000000000002e Apr 26 08:26:18.194999 (XEN) 000000000000002e 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.194999 (XEN) 0000000000000000 0000800f1e237e60 00000a000026d098 0000800f1e237e60 Apr 26 08:26:18.207122 (XEN) 00000a000026d0b4 0000000080000249 0000000007e00000 00000a000026d098 Apr 26 08:26:18.219004 (XEN) 0000800f1e237e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:18.219004 (XEN) 000000000000002e 0000000000000000 0000000000000000 000000000000020e Apr 26 08:26:18.231011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.231011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.242996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.242996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.255003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.267007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.267007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.278991 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.278991 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.291000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.291000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.302997 (XEN) Xen call trace: Apr 26 08:26:18.302997 (XEN) [<00000a0000218a34>] keyhandler.c#read_clocks_slave+0xf8/0x128 (PC) Apr 26 08:26:18.315001 (XEN) [<00000a0000218a30>] keyhandler.c#read_clocks_slave+0xf4/0x128 (LR) Apr 26 08:26:18.315001 (XEN) [<00000a0000224558>] smp_call_function_interrupt+0x15c/0x164 Apr 26 08:26:18.327002 (XEN) [<00000a000026eee8>] gic_interrupt+0x10c/0x110 Apr 26 08:26:18.327002 (XEN) [<00000a000027cb88>] do_trap_irq+0x10/0x18 Apr 26 08:26:18.339011 (XEN) [<00000a000026332c>] entry.o#hyp_irq+0x80/0x84 Apr 26 08:26:18.339011 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:18.339011 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:18.351004 (XEN) Apr 26 08:26:18.351004 (XEN) *** Dumping CPU47 host state: *** Apr 26 08:26:18.351004 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:18.363098 (XEN) CPU: 47 Apr 26 08:26:18.363160 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:18.363210 (XEN) LR: 00000a000026d098 Apr 26 08:26:18.363254 (XEN) SP: 0000800f1e22fe60 Apr 26 08:26:18.375008 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:18.375008 (XEN) X0: 0000000000000000 X1: 0000760f1df12000 X2: 0000800f1e23a048 Apr 26 08:26:18.387009 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:18.387009 (XEN) X6: 00000a00003625b0 X7: 0000800f1e23c590 X8: 0000000000000012 Apr 26 08:26:18.399005 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:18.399005 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:18.410999 (XEN) X15: 00000000d70d8e09 X16: 000000008c35bdef X17: ffff8000821e0240 Apr 26 08:26:18.410999 (XEN) X18: ffff8000985d3c38 X19: 00000a00003625b4 X20: 000000000000002f Apr 26 08:26:18.423003 (XEN) X21: 00000a000032f700 X22: 0000000000008000 X23: 000000000000002f Apr 26 08:26:18.435007 (XEN) X24: 000000000000002f X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:18.435007 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f1e22fe60 Apr 26 08:26:18.447004 (XEN) Apr 26 08:26:18.447004 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:18.447004 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:18.447004 (XEN) Apr 26 08:26:18.447004 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:18.459005 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:18.459005 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:18.459005 (XEN) Apr 26 08:26:18.459005 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:18.459005 (XEN) HPFAR_EL2: 0000009010804b00 Apr 26 08:26:18.471003 (XEN) FAR_EL2: ffff8000834b0100 Apr 26 08:26:18.471003 (XEN) Apr 26 08:26:18.471003 (XEN) Xen stack trace from sp=0000800f1e22fe60: Apr 26 08:26:18.471003 (XEN) 0000800f1e22fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:18.483001 (XEN) 000000000000002f 0000000000000000 0000000000000000 000000000000020f Apr 26 08:26:18.483001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.495005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.506997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.506997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.518964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.518964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.531008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.531008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.543008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.555088 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.555155 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.567115 (XEN) Xen call trace: Apr 26 08:26:18.567204 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:18.567258 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:18.579110 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:18.579172 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:18.591099 (XEN) Apr 26 08:26:18.591152 (XEN) *** Dumping CPU48 host state: *** Apr 26 08:26:18.591198 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:18.591246 (XEN) CPU: 48 Apr 26 08:26:18.603110 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:18.603174 (XEN) LR: 00000a000026d098 Apr 26 08:26:18.603218 (XEN) SP: 0000800f227bfe60 Apr 26 08:26:18.603261 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:18.615128 (XEN) X0: 0000000000000000 X1: 0000760f1defe000 X2: 0000800f1e226048 Apr 26 08:26:18.627108 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:18.627174 (XEN) X6: 00000a00003625b0 X7: 0000800f1e23ca50 X8: 0000000000000012 Apr 26 08:26:18.639118 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:18.639182 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:18.651123 (XEN) X15: 000000000000000b X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:18.651187 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000030 Apr 26 08:26:18.663117 (XEN) X21: 00000a000032f780 X22: 0000000000010000 X23: 0000000000000030 Apr 26 08:26:18.663182 (XEN) X24: 0000000000000030 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:18.675123 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f227bfe60 Apr 26 08:26:18.687119 (XEN) Apr 26 08:26:18.687174 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:18.687219 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:18.687262 (XEN) Apr 26 08:26:18.687301 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:18.687344 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:18.699121 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:18.699180 (XEN) Apr 26 08:26:18.699222 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:18.699266 (XEN) HPFAR_EL2: 0000009010805b00 Apr 26 08:26:18.711105 (XEN) FAR_EL2: ffff8000835b0100 Apr 26 08:26:18.711164 (XEN) Apr 26 08:26:18.711206 (XEN) Xen stack trace from sp=0000800f227bfe60: Apr 26 08:26:18.711252 (XEN) 0000800f227bfe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:18.723128 (XEN) 0000000000000030 0000000000000000 0000000000000000 0000000000010000 Apr 26 08:26:18.723194 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.735115 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.735178 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.747126 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.759119 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.759183 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.771119 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.771182 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.783120 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.783184 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.795120 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.807129 (XEN) Xen call trace: Apr 26 08:26:18.807186 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:18.807238 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:18.819113 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:18.819195 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:18.819244 (XEN) Apr 26 08:26:18.831124 (XEN) *** Dumping CPU49 host state: *** Apr 26 08:26:18.831186 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:18.831237 (XEN) CPU: 49 Apr 26 08:26:18.831279 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:18.843151 (XEN) LR: 00000a000026d098 Apr 26 08:26:18.843208 (XEN) SP: 0000800f227b7e60 Apr 26 08:26:18.843252 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:18.855132 (XEN) X0: 0000000000000000 X1: 0000760f1defc000 X2: 0000800f1e224048 Apr 26 08:26:18.855198 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:18.867130 (XEN) X6: 00000a00003625b0 X7: 0000800f1e222010 X8: 0000000000000012 Apr 26 08:26:18.879112 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:18.879177 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:18.891129 (XEN) X15: 000000000000000d X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:18.891193 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000031 Apr 26 08:26:18.903106 (XEN) X21: 00000a000032f800 X22: 0000000000020000 X23: 0000000000000031 Apr 26 08:26:18.903169 (XEN) X24: 0000000000000031 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:18.915128 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f227b7e60 Apr 26 08:26:18.915193 (XEN) Apr 26 08:26:18.927117 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:18.927177 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:18.927222 (XEN) Apr 26 08:26:18.927262 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:18.927305 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:18.939132 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:18.939191 (XEN) Apr 26 08:26:18.939232 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:18.939276 (XEN) HPFAR_EL2: 0000008010000000 Apr 26 08:26:18.939319 (XEN) FAR_EL2: ffff800082620104 Apr 26 08:26:18.951156 (XEN) Apr 26 08:26:18.951210 (XEN) Xen stack trace from sp=0000800f227b7e60: Apr 26 08:26:18.951257 (XEN) 0000800f227b7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:18.963016 (XEN) 0000000000000031 0000000000000000 0000000000000000 0000000000010001 Apr 26 08:26:18.963016 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.975007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.975007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.987010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.999012 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:18.999012 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.011022 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.011022 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.023014 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.023014 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.035000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.035000 (XEN) Xen call trace: Apr 26 08:26:19.047002 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:19.047002 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:19.059011 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:19.059011 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:19.059011 (XEN) Apr 26 08:26:19.059011 (XEN) *** Dumping CPU50 host state: *** Apr 26 08:26:19.071008 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:19.071008 (XEN) CPU: 50 Apr 26 08:26:19.071008 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:19.082999 (XEN) LR: 00000a000026d098 Apr 26 08:26:19.082999 (XEN) SP: 0000800f227a7e60 Apr 26 08:26:19.082999 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:19.095104 (XEN) X0: 0000000000000000 X1: 0000760f1def8000 X2: 0000800f1e220048 Apr 26 08:26:19.095104 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:19.106985 (XEN) X6: 00000a00003625b0 X7: 0000800f1e222410 X8: 0000000000000012 Apr 26 08:26:19.106985 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:19.119016 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:19.131006 (XEN) X15: 0000000068c31028 X16: 00000000ddae3e5c X17: ffff8000821e0240 Apr 26 08:26:19.131006 (XEN) X18: ffff8000985e3c38 X19: 00000a00003625b4 X20: 0000000000000032 Apr 26 08:26:19.143010 (XEN) X21: 00000a000032f880 X22: 0000000000040000 X23: 0000000000000032 Apr 26 08:26:19.143010 (XEN) X24: 0000000000000032 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:19.155069 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f227a7e60 Apr 26 08:26:19.155111 (XEN) Apr 26 08:26:19.155136 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:19.167131 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:19.167190 (XEN) Apr 26 08:26:19.167231 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:19.167275 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:19.167319 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:19.179131 (XEN) Apr 26 08:26:19.179185 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:19.179230 (XEN) HPFAR_EL2: 0000008010801300 Apr 26 08:26:19.179274 (XEN) FAR_EL2: ffff800082930100 Apr 26 08:26:19.191024 (XEN) Apr 26 08:26:19.191024 (XEN) Xen stack trace from sp=0000800f227a7e60: Apr 26 08:26:19.191024 (XEN) 0000800f227a7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:19.203001 (XEN) 0000000000000032 0000000000000000 0000000000000000 0000000000010002 Apr 26 08:26:19.203001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.214962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.214962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.226979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.226979 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.239004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.251010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.251010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.263003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.263003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.275007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.275007 (XEN) Xen call trace: Apr 26 08:26:19.275007 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:19.287005 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:19.287005 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:19.299000 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:19.299000 (XEN) Apr 26 08:26:19.299000 (XEN) *** Dumping CPU51 host state: *** Apr 26 08:26:19.311002 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:19.311002 (XEN) CPU: 51 Apr 26 08:26:19.311002 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:19.322914 (XEN) LR: 00000a000026d098 Apr 26 08:26:19.322914 (XEN) SP: 0000800f2273fe60 Apr 26 08:26:19.322914 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:19.335003 (XEN) X0: 0000000000000000 X1: 0000760f22484000 X2: 0000800f227ac048 Apr 26 08:26:19.335003 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:19.347001 (XEN) X6: 00000a00003625b0 X7: 0000800f1e2228d0 X8: 0000000000000012 Apr 26 08:26:19.347001 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:19.359000 (XEN) X12: 0000000000000001 X13: 000000000000029b X14: 000000000000029b Apr 26 08:26:19.359000 (XEN) X15: 00003d0900000000 X16: 000000004ab8ae2a X17: ffff8000821e0240 Apr 26 08:26:19.371020 (XEN) X18: ffff8000838c3b78 X19: 00000a00003625b4 X20: 0000000000000033 Apr 26 08:26:19.383004 (XEN) X21: 00000a000032f900 X22: 0000000000080000 X23: 0000000000000033 Apr 26 08:26:19.383004 (XEN) X24: 0000000000000033 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:19.395008 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f2273fe60 Apr 26 08:26:19.395008 (XEN) Apr 26 08:26:19.395008 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:19.407001 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:19.407001 (XEN) Apr 26 08:26:19.407001 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:19.407001 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:19.407001 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:19.419012 (XEN) Apr 26 08:26:19.419012 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:19.419012 (XEN) HPFAR_EL2: 0000008010801f00 Apr 26 08:26:19.419012 (XEN) FAR_EL2: ffff8000829f0100 Apr 26 08:26:19.419012 (XEN) Apr 26 08:26:19.431020 (XEN) Xen stack trace from sp=0000800f2273fe60: Apr 26 08:26:19.431020 (XEN) 0000800f2273fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:19.431020 (XEN) 0000000000000033 0000000000000000 0000000000000000 0000000000010003 Apr 26 08:26:19.443009 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.455011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.455011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.467005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.467005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.479012 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.479012 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.491019 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.503006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.503006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.515003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.515003 (XEN) Xen call trace: Apr 26 08:26:19.515003 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:19.527002 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:19.527002 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:19.539004 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:19.539004 (XEN) Apr 26 08:26:19.539004 (XEN) *** Dumping CPU52 host state: *** Apr 26 08:26:19.539004 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:19.550998 (XEN) CPU: 52 Apr 26 08:26:19.550998 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:19.563003 (XEN) LR: 00000a000026d098 Apr 26 08:26:19.563003 (XEN) SP: 0000800f22737e60 Apr 26 08:26:19.563003 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:19.575001 (XEN) X0: 0000000000000000 X1: 0000760f22482000 X2: 0000800f227aa048 Apr 26 08:26:19.575001 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:19.587016 (XEN) X6: 00000a00003625b0 X7: 0000800f1e222d90 X8: 0000000000000012 Apr 26 08:26:19.587016 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:19.599008 (XEN) X12: 0000000000000001 X13: 000000000000017b X14: 000000000000017b Apr 26 08:26:19.599008 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:19.611004 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000034 Apr 26 08:26:19.611004 (XEN) X21: 00000a000032f980 X22: 0000000000100000 X23: 0000000000000034 Apr 26 08:26:19.623005 (XEN) X24: 0000000000000034 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:19.635023 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f22737e60 Apr 26 08:26:19.635023 (XEN) Apr 26 08:26:19.635023 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:19.635023 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:19.647014 (XEN) Apr 26 08:26:19.647014 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:19.647014 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:19.647014 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:19.647014 (XEN) Apr 26 08:26:19.659003 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:19.659003 (XEN) HPFAR_EL2: 0000008010000200 Apr 26 08:26:19.659003 (XEN) FAR_EL2: ffff800082680090 Apr 26 08:26:19.659003 (XEN) Apr 26 08:26:19.659003 (XEN) Xen stack trace from sp=0000800f22737e60: Apr 26 08:26:19.671007 (XEN) 0000800f22737e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:19.671007 (XEN) 0000000000000034 0000000000000000 0000000000000000 0000000000010004 Apr 26 08:26:19.683026 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.683026 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.694995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.706996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.706996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.719097 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.719169 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.731094 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.731156 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.743107 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.755094 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.755157 (XEN) Xen call trace: Apr 26 08:26:19.755200 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:19.767054 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:19.767118 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:19.778984 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:19.778984 (XEN) Apr 26 08:26:19.778984 (XEN) *** Dumping CPU53 host state: *** Apr 26 08:26:19.778984 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:19.791000 (XEN) CPU: 53 Apr 26 08:26:19.791000 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:19.791000 (XEN) LR: 00000a000026d098 Apr 26 08:26:19.802998 (XEN) SP: 0000800f22727e60 Apr 26 08:26:19.802998 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:19.802998 (XEN) X0: 0000000000000000 X1: 0000760f22406000 X2: 0000800f2272e048 Apr 26 08:26:19.814998 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:19.824758 (XEN) X6: 00000a00003625b0 X7: 0000800f227a8280 X8: 0000000000000012 Apr 26 08:26:19.824810 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:19.838955 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:19.838955 (XEN) X15: 0000000000000001 X16: 1fffe00004817fe1 X17: 0000000000000000 Apr 26 08:26:19.851063 (XEN) X18: ffff8000ae183c58 X19: 00000a00003625b4 X20: 0000000000000035 Apr 26 08:26:19.851104 (XEN) X21: 00000a000032fa00 X22: 0000000000200000 X23: 0000000000000035 Apr 26 08:26:19.862939 (XEN) X24: 0000000000000035 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:19.862973 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800f22727e60 Apr 26 08:26:19.874943 (XEN) Apr 26 08:26:19.874971 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:19.874996 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:19.886969 (XEN) Apr 26 08:26:19.886969 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:19.886969 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:19.886969 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:19.886969 (XEN) Apr 26 08:26:19.886969 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:19.898981 (XEN) HPFAR_EL2: 0000008010000200 Apr 26 08:26:19.898981 (XEN) FAR_EL2: ffff800082680090 Apr 26 08:26:19.898981 (XEN) Apr 26 08:26:19.898981 (XEN) Xen stack trace from sp=0000800f22727e60: Apr 26 08:26:19.911005 (XEN) 0000800f22727e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:19.911005 (XEN) 0000000000000035 0000000000000000 0000000000000000 0000000000010005 Apr 26 08:26:19.927025 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.927025 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.937531 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.937531 (XEN) 0000000000000000 0000000000000000 0000000000 Apr 26 08:26:19.942476 000000 0000000000000000 Apr 26 08:26:19.950985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.950985 (XEN) 0000000000000000 000000000 Apr 26 08:26:19.952562 0000000 0000000000000000 0000000000000000 Apr 26 08:26:19.963066 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.963133 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.975089 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.975152 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.986995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:19.998974 (XEN) Xen call trace: Apr 26 08:26:19.998974 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:19.998974 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:20.011006 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:20.011006 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:20.022998 (XEN) Apr 26 08:26:20.022998 (XEN) *** Dumping CPU54 host state: *** Apr 26 08:26:20.022998 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:20.022998 (XEN) CPU: 54 Apr 26 08:26:20.022998 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:20.035003 (XEN) LR: 00000a000026d098 Apr 26 08:26:20.035003 (XEN) SP: 0000800fffdbfe60 Apr 26 08:26:20.035003 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:20.047000 (XEN) X0: 0000000000000000 X1: 0000760f22402000 X2: 0000800f2272a048 Apr 26 08:26:20.047000 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:20.058999 (XEN) X6: 00000a00003625b0 X7: 0000800f227a8740 X8: 0000000000000012 Apr 26 08:26:20.071001 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:20.071001 (XEN) X12: 0000000000000001 X13: 00000000000002ad X14: 00000000000002ad Apr 26 08:26:20.082998 (XEN) X15: 0000000000000001 X16: 1fffe00006ded5e1 X17: 0000000000000000 Apr 26 08:26:20.082998 (XEN) X18: ffff8000b0e4bc58 X19: 00000a00003625b4 X20: 0000000000000036 Apr 26 08:26:20.095004 (XEN) X21: 00000a000032fa80 X22: 0000000000400000 X23: 0000000000000036 Apr 26 08:26:20.095004 (XEN) X24: 0000000000000036 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:20.106973 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffdbfe60 Apr 26 08:26:20.106973 (XEN) Apr 26 08:26:20.118943 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:20.118943 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:20.118943 (XEN) Apr 26 08:26:20.118943 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:20.118943 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:20.130939 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:20.130939 (XEN) Apr 26 08:26:20.130939 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:20.130939 (XEN) HPFAR_EL2: 0000008010804300 Apr 26 08:26:20.130939 (XEN) FAR_EL2: ffff800082c30100 Apr 26 08:26:20.142939 (XEN) Apr 26 08:26:20.142939 (XEN) Xen stack trace from sp=0000800fffdbfe60: Apr 26 08:26:20.142939 (XEN) 0000800fffdbfe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:20.154899 (XEN) 0000000000000036 0000000000000000 0000000000000000 0000000000010006 Apr 26 08:26:20.154899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.166941 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.166941 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.178922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.190923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.190923 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.202916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.202916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.214884 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.214884 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.226967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.238913 (XEN) Xen call trace: Apr 26 08:26:20.238913 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:20.238913 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:20.250968 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:20.250968 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:20.250968 (XEN) Apr 26 08:26:20.250968 (XEN) *** Dumping CPU55 host state: *** Apr 26 08:26:20.263006 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:20.263006 (XEN) CPU: 55 Apr 26 08:26:20.263006 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:20.275007 (XEN) LR: 00000a000026d098 Apr 26 08:26:20.275007 (XEN) SP: 0000800fffdafe60 Apr 26 08:26:20.275007 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:20.286998 (XEN) X0: 0000000000000000 X1: 0000760f22400000 X2: 0000800f22728048 Apr 26 08:26:20.286998 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:20.299000 (XEN) X6: 00000a00003625b0 X7: 0000800f227a8c00 X8: 0000000000000012 Apr 26 08:26:20.299000 (XEN) X9: 0000000000000000 X10: ffff80008202a0e8 X11: 0000000000000137 Apr 26 08:26:20.310998 (XEN) X12: 00000000000003a5 X13: ffff800081fd20e8 X14: 0000000000000000 Apr 26 08:26:20.322995 (XEN) X15: ffff80008000b720 X16: 000000000000001d X17: 0000000000000000 Apr 26 08:26:20.322995 (XEN) X18: 0000000000000006 X19: 00000a00003625b4 X20: 0000000000000037 Apr 26 08:26:20.334998 (XEN) X21: 00000a000032fb00 X22: 0000000000800000 X23: 0000000000000037 Apr 26 08:26:20.334998 (XEN) X24: 0000000000000037 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:20.346999 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffdafe60 Apr 26 08:26:20.346999 (XEN) Apr 26 08:26:20.346999 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:20.358996 (XEN) VTTBR_EL2: 0002010720494000 Apr 26 08:26:20.358996 (XEN) Apr 26 08:26:20.358996 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:20.358996 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:20.371000 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:20.371000 (XEN) Apr 26 08:26:20.371000 (XEN) ESR_EL2: 000000005a000ea1 Apr 26 08:26:20.371000 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:20.371000 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:20.382995 (XEN) Apr 26 08:26:20.382995 (XEN) Xen stack trace from sp=0000800fffdafe60: Apr 26 08:26:20.382995 (XEN) 0000800fffdafe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:20.395001 (XEN) 0000000000000037 0000000000000000 0000000000000000 0000000000010007 Apr 26 08:26:20.395001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.407016 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.407016 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.418997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.418997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.430999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.442994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.442994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.455001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.455001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.466969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.466969 (XEN) Xen call trace: Apr 26 08:26:20.478971 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:20.478971 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:20.491000 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:20.491000 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:20.491000 (XEN) Apr 26 08:26:20.491000 (XEN) *** Dumping CPU56 host state: *** Apr 26 08:26:20.502927 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:20.502927 (XEN) CPU: 56 Apr 26 08:26:20.502927 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:20.515001 (XEN) LR: 00000a000026d098 Apr 26 08:26:20.515001 (XEN) SP: 0000800fffda7e60 Apr 26 08:26:20.515001 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:20.526995 (XEN) X0: 0000000000000000 X1: 0000760fffa8c000 X2: 0000800fffdb4048 Apr 26 08:26:20.526995 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:20.539002 (XEN) X6: 00000a00003625b0 X7: 0000800fffdb3150 X8: 0000000000000012 Apr 26 08:26:20.539002 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:20.550939 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:20.550939 (XEN) X15: 0000000000000200 X16: 1fffe00004e3bf21 X17: 0000000000000000 Apr 26 08:26:20.562940 (XEN) X18: ffff8000b0aabc58 X19: 00000a00003625b4 X20: 0000000000000038 Apr 26 08:26:20.574937 (XEN) X21: 00000a000032fb80 X22: 0000000001000000 X23: 0000000000000038 Apr 26 08:26:20.574937 (XEN) X24: 0000000000000038 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:20.586997 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffda7e60 Apr 26 08:26:20.586997 (XEN) Apr 26 08:26:20.586997 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:20.598997 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:20.598997 (XEN) Apr 26 08:26:20.598997 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:20.598997 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:20.598997 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:20.610997 (XEN) Apr 26 08:26:20.610997 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:20.610997 (XEN) HPFAR_EL2: 0000008010805b00 Apr 26 08:26:20.610997 (XEN) FAR_EL2: ffff800082db0100 Apr 26 08:26:20.622997 (XEN) Apr 26 08:26:20.622997 (XEN) Xen stack trace from sp=0000800fffda7e60: Apr 26 08:26:20.622997 (XEN) 0000800fffda7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:20.622997 (XEN) 0000000000000038 0000000000000000 0000000000000000 0000000000010008 Apr 26 08:26:20.635000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.647000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.647000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.658921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.658921 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.670995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.670995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.683002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.695010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.695010 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.707001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.707001 (XEN) Xen call trace: Apr 26 08:26:20.707001 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:20.718996 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:20.718996 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:20.731002 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:20.731002 (XEN) Apr 26 08:26:20.731002 (XEN) *** Dumping CPU57 host state: *** Apr 26 08:26:20.743008 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:20.743008 (XEN) CPU: 57 Apr 26 08:26:20.743008 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:20.754995 (XEN) LR: 00000a000026d098 Apr 26 08:26:20.754995 (XEN) SP: 0000800fffd3fe60 Apr 26 08:26:20.754995 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:20.767005 (XEN) X0: 0000000000000000 X1: 0000760fffa88000 X2: 0000800fffdb0048 Apr 26 08:26:20.767005 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:20.779001 (XEN) X6: 00000a00003625b0 X7: 0000800fffdb3590 X8: 0000000000000012 Apr 26 08:26:20.779001 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:20.791001 (XEN) X12: 0000000000000001 X13: 00000000000002f5 X14: 00000000000002f5 Apr 26 08:26:20.791001 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:20.803009 (XEN) X18: 0000000000000000 X19: 00000a00003625b4 X20: 0000000000000039 Apr 26 08:26:20.803009 (XEN) X21: 00000a000032fc00 X22: 0000000002000000 X23: 0000000000000039 Apr 26 08:26:20.815002 (XEN) X24: 0000000000000039 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:20.826992 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd3fe60 Apr 26 08:26:20.826992 (XEN) Apr 26 08:26:20.826992 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:20.826992 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:20.839004 (XEN) Apr 26 08:26:20.839004 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:20.839004 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:20.839004 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:20.851001 (XEN) Apr 26 08:26:20.851001 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:20.851001 (XEN) HPFAR_EL2: 0000009010800700 Apr 26 08:26:20.851001 (XEN) FAR_EL2: ffff800083070100 Apr 26 08:26:20.851001 (XEN) Apr 26 08:26:20.851001 (XEN) Xen stack trace from sp=0000800fffd3fe60: Apr 26 08:26:20.863006 (XEN) 0000800fffd3fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:20.863006 (XEN) 0000000000000039 0000000000000000 0000000000000000 0000000000010009 Apr 26 08:26:20.874993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.874993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.886993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.899005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.899005 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.911004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.911004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.923006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.923006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.935002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.947007 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:20.947007 (XEN) Xen call trace: Apr 26 08:26:20.947007 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:20.958990 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:20.958990 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:20.971007 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:20.971007 (XEN) Apr 26 08:26:20.971007 (XEN) *** Dumping CPU58 host state: *** Apr 26 08:26:20.971007 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:20.983016 (XEN) CPU: 58 Apr 26 08:26:20.983016 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:20.983016 (XEN) LR: 00000a000026d098 Apr 26 08:26:20.995003 (XEN) SP: 0000800fffd2fe60 Apr 26 08:26:20.995003 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:20.995003 (XEN) X0: 0000000000000000 X1: 0000760fffa0e000 X2: 0000800fffd36048 Apr 26 08:26:21.006990 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:21.019003 (XEN) X6: 00000a00003625b0 X7: 0000800fffdb3a50 X8: 0000000000000012 Apr 26 08:26:21.019003 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:21.030992 (XEN) X12: 0000000000000001 X13: 00000000000002cd X14: 00000000000002cd Apr 26 08:26:21.030992 (XEN) X15: 0000000000000001 X16: 1fffe0000585fd81 X17: 0000000000000000 Apr 26 08:26:21.043009 (XEN) X18: ffff8000b0e83c58 X19: 00000a00003625b4 X20: 000000000000003a Apr 26 08:26:21.043009 (XEN) X21: 00000a000032fc80 X22: 0000000004000000 X23: 000000000000003a Apr 26 08:26:21.055006 (XEN) X24: 000000000000003a X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:21.055006 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd2fe60 Apr 26 08:26:21.067014 (XEN) Apr 26 08:26:21.067014 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:21.067014 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:21.079000 (XEN) Apr 26 08:26:21.079000 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:21.079000 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:21.079000 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:21.079000 (XEN) Apr 26 08:26:21.079000 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:21.090988 (XEN) HPFAR_EL2: 0000009010801300 Apr 26 08:26:21.090988 (XEN) FAR_EL2: ffff800083130100 Apr 26 08:26:21.090988 (XEN) Apr 26 08:26:21.090988 (XEN) Xen stack trace from sp=0000800fffd2fe60: Apr 26 08:26:21.103001 (XEN) 0000800fffd2fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:21.103001 (XEN) 000000000000003a 0000000000000000 0000000000000000 000000000001000a Apr 26 08:26:21.114987 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.114987 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.126999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.126999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.138994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.151003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.151003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.163001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.163001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.175004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.175004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.186990 (XEN) Xen call trace: Apr 26 08:26:21.186990 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:21.199005 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:21.199005 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:21.211003 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:21.211003 (XEN) Apr 26 08:26:21.211003 (XEN) *** Dumping CPU59 host state: *** Apr 26 08:26:21.211003 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:21.223000 (XEN) CPU: 59 Apr 26 08:26:21.223000 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:21.223000 (XEN) LR: 00000a000026d098 Apr 26 08:26:21.234986 (XEN) SP: 0000800fffd27e60 Apr 26 08:26:21.234986 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:21.234986 (XEN) X0: 0000000000000000 X1: 0000760fffa0a000 X2: 0000800fffd32048 Apr 26 08:26:21.247006 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:21.247006 (XEN) X6: 00000a00003625b0 X7: 0000800fffd31010 X8: 0000000000000012 Apr 26 08:26:21.258999 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:21.270998 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:21.270998 (XEN) X15: 000000000000002b X16: 1fffe00004dbfe41 X17: 0000000000000000 Apr 26 08:26:21.283000 (XEN) X18: ffff8000b0c2bc58 X19: 00000a00003625b4 X20: 000000000000003b Apr 26 08:26:21.283000 (XEN) X21: 00000a000032fd00 X22: 0000000008000000 X23: 000000000000003b Apr 26 08:26:21.295001 (XEN) X24: 000000000000003b X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:21.295001 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffd27e60 Apr 26 08:26:21.306998 (XEN) Apr 26 08:26:21.306998 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:21.306998 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:21.306998 (XEN) Apr 26 08:26:21.318997 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:21.318997 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:21.318997 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:21.318997 (XEN) Apr 26 08:26:21.318997 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:21.330998 (XEN) HPFAR_EL2: 0000009010801f00 Apr 26 08:26:21.330998 (XEN) FAR_EL2: ffff8000831f0100 Apr 26 08:26:21.330998 (XEN) Apr 26 08:26:21.330998 (XEN) Xen stack trace from sp=0000800fffd27e60: Apr 26 08:26:21.342984 (XEN) 0000800fffd27e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:21.342984 (XEN) 000000000000003b 0000000000000000 0000000000000000 000000000001000b Apr 26 08:26:21.355000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.355000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.366943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.366943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.378996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.390999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.390999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.402995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.402995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.414996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.414996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.427002 (XEN) Xen call trace: Apr 26 08:26:21.427002 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:21.438995 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:21.439179 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:21.464727 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:21.464866 (XEN) Apr 26 08:26:21.464866 (XEN) *** Dumping CPU60 host state: *** Apr 26 08:26:21.464866 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:21.464866 (XEN) CPU: 60 Apr 26 08:26:21.464866 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:21.464866 (XEN) LR: 00000a000026d098 Apr 26 08:26:21.464866 (XEN) SP: 0000800fffcd7e60 Apr 26 08:26:21.474981 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:21.474981 (XEN) X0: 0000000000000000 X1: 0000760fff9b6000 X2: 0000800fffcde048 Apr 26 08:26:21.486972 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:21.486972 (XEN) X6: 00000a00003625b0 X7: 0000800fffd31410 X8: 0000000000000012 Apr 26 08:26:21.498998 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:21.498998 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:21.511012 (XEN) X15: 0000000000000202 X16: 1fffe00006138bc1 X17: 0000000000000000 Apr 26 08:26:21.523004 (XEN) X18: ffff8000aff23c58 X19: 00000a00003625b4 X20: 000000000000003c Apr 26 08:26:21.523004 (XEN) X21: 00000a000032fd80 X22: 0000000010000000 X23: 000000000000003c Apr 26 08:26:21.535014 (XEN) X24: 000000000000003c X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:21.535014 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffcd7e60 Apr 26 08:26:21.547001 (XEN) Apr 26 08:26:21.547001 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:21.547001 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:21.547001 (XEN) Apr 26 08:26:21.547001 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:21.558988 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:21.558988 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:21.558988 (XEN) Apr 26 08:26:21.559237 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:21.559272 (XEN) HPFAR_EL2: 0000009010802b00 Apr 26 08:26:21.570998 (XEN) FAR_EL2: ffff8000832b0100 Apr 26 08:26:21.570998 (XEN) Apr 26 08:26:21.570998 (XEN) Xen stack trace from sp=0000800fffcd7e60: Apr 26 08:26:21.570998 (XEN) 0000800fffcd7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:21.583001 (XEN) 000000000000003c 0000000000000000 0000000000000000 000000000001000c Apr 26 08:26:21.595001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.595001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.607008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.607008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.618998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.618998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.631002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.642997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.642997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.655003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.655003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.667001 (XEN) Xen call trace: Apr 26 08:26:21.667001 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:21.667001 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:21.679000 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:21.679000 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:21.690997 (XEN) Apr 26 08:26:21.690997 (XEN) *** Dumping CPU61 host state: *** Apr 26 08:26:21.690997 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:21.702995 (XEN) CPU: 61 Apr 26 08:26:21.702995 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:21.702995 (XEN) LR: 00000a000026d098 Apr 26 08:26:21.702995 (XEN) SP: 0000800fffccfe60 Apr 26 08:26:21.714980 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:21.714980 (XEN) X0: 0000000000000000 X1: 0000760fff9b4000 X2: 0000800fffcdc048 Apr 26 08:26:21.724844 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:21.724908 (XEN) X6: 00000a00003625b0 X7: 0000800fffd318d0 X8: 0000000000000012 Apr 26 08:26:21.738968 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:21.739026 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:21.751065 (XEN) X15: 0000000000000000 X16: 1fffe00005fd1fe1 X17: 0000000000000000 Apr 26 08:26:21.751129 (XEN) X18: ffff8000ae23bc58 X19: 00000a00003625b4 X20: 000000000000003d Apr 26 08:26:21.763065 (XEN) X21: 00000a000032fe00 X22: 0000000020000000 X23: 000000000000003d Apr 26 08:26:21.775000 (XEN) X24: 000000000000003d X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:21.775000 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffccfe60 Apr 26 08:26:21.787004 (XEN) Apr 26 08:26:21.787004 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:21.787004 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:21.787004 (XEN) Apr 26 08:26:21.787004 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:21.799003 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:21.799003 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:21.799003 (XEN) Apr 26 08:26:21.799003 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:21.799003 (XEN) HPFAR_EL2: 0000009010803700 Apr 26 08:26:21.810978 (XEN) FAR_EL2: ffff800083370100 Apr 26 08:26:21.810978 (XEN) Apr 26 08:26:21.810978 (XEN) Xen stack trace from sp=0000800fffccfe60: Apr 26 08:26:21.810978 (XEN) 0000800fffccfe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:21.822976 (XEN) 000000000000003d 0000000000000000 0000000000000000 000000000001000d Apr 26 08:26:21.822976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.833778 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.846963 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.846997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.858994 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.859028 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.871104 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.871167 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.883111 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.899135 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.899198 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:21.899247 (XEN) Xen call trace: Apr 26 08:26:21.899289 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:21.915096 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:21.915160 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:21.925510 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:21.925510 (XEN) Apr 26 08:26:21.925510 (XEN) *** Dumping CPU62 host state: *** Apr 26 08:26:21.925510 (XEN) ----[ Xen-4.19-unstable arm64 Apr 26 08:26:21.933421 debug=y Not tainted ]---- Apr 26 08:26:21.938985 (XEN) CPU: 62 Apr 26 08:26:21.938985 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:21.938985 (XEN) LR: 00000a000026d Apr 26 08:26:21.940218 098 Apr 26 08:26:21.950955 (XEN) SP: 0000800fffcc7e60 Apr 26 08:26:21.950955 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:21.950955 (XEN) X0: 0000000000000000 X1: 0000760fff9b0000 X2: 0000800fffcd8048 Apr 26 08:26:21.962984 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:21.962984 (XEN) X6: 00000a00003625b0 X7: 0000800fffd31d90 X8: 0000000000000012 Apr 26 08:26:21.975003 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:21.987006 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:21.987006 (XEN) X15: 0000000000000216 X16: 1fffe00005af6281 X17: 0000000000000000 Apr 26 08:26:21.999004 (XEN) X18: ffff8000ae1e3c58 X19: 00000a00003625b4 X20: 000000000000003e Apr 26 08:26:21.999004 (XEN) X21: 00000a000032fe80 X22: 0000000040000000 X23: 000000000000003e Apr 26 08:26:22.010993 (XEN) X24: 000000000000003e X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:22.010993 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffcc7e60 Apr 26 08:26:22.022997 (XEN) Apr 26 08:26:22.022997 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:22.022997 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:22.022997 (XEN) Apr 26 08:26:22.022997 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:22.035013 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:22.035013 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:22.035013 (XEN) Apr 26 08:26:22.035013 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:22.047004 (XEN) HPFAR_EL2: 0000009010804300 Apr 26 08:26:22.047004 (XEN) FAR_EL2: ffff800083430100 Apr 26 08:26:22.047004 (XEN) Apr 26 08:26:22.047004 (XEN) Xen stack trace from sp=0000800fffcc7e60: Apr 26 08:26:22.058999 (XEN) 0000800fffcc7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:22.058999 (XEN) 000000000000003e 0000000000000000 0000000000000000 000000000001000e Apr 26 08:26:22.070999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.070999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.082996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.082996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.094997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.094997 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.107004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.118998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.118998 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.130996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.130996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.142998 (XEN) Xen call trace: Apr 26 08:26:22.142998 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:22.154999 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:22.154999 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:22.154999 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:22.167001 (XEN) Apr 26 08:26:22.167001 (XEN) *** Dumping CPU63 host state: *** Apr 26 08:26:22.167001 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:22.179003 (XEN) CPU: 63 Apr 26 08:26:22.179003 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:22.179003 (XEN) LR: 00000a000026d098 Apr 26 08:26:22.179003 (XEN) SP: 0000800fffc57e60 Apr 26 08:26:22.190998 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:22.190998 (XEN) X0: 0000000000000000 X1: 0000760fff934000 X2: 0000800fffc5c048 Apr 26 08:26:22.203002 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:22.203002 (XEN) X6: 00000a00003625b0 X7: 0000800fffc5f280 X8: 0000000000000012 Apr 26 08:26:22.214996 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:22.214996 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:22.226997 (XEN) X15: 0000000000000000 X16: 1fffe00005003fc1 X17: 0000000000000000 Apr 26 08:26:22.226997 (XEN) X18: ffffffffffffffff X19: 00000a00003625b4 X20: 000000000000003f Apr 26 08:26:22.238986 (XEN) X21: 00000a000032ff00 X22: 0000000080000000 X23: 000000000000003f Apr 26 08:26:22.250999 (XEN) X24: 000000000000003f X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:22.250999 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc57e60 Apr 26 08:26:22.263005 (XEN) Apr 26 08:26:22.263005 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:22.263005 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:22.263005 (XEN) Apr 26 08:26:22.263005 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:22.275001 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:22.275001 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:22.275001 (XEN) Apr 26 08:26:22.275001 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:22.275001 (XEN) HPFAR_EL2: 0000009010804f00 Apr 26 08:26:22.286998 (XEN) FAR_EL2: ffff8000834f0100 Apr 26 08:26:22.286998 (XEN) Apr 26 08:26:22.286998 (XEN) Xen stack trace from sp=0000800fffc57e60: Apr 26 08:26:22.286998 (XEN) 0000800fffc57e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:22.299002 (XEN) 000000000000003f 0000000000000000 0000000000000000 000000000001000f Apr 26 08:26:22.311000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.311000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.322996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.322996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.334999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.334999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.347001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.347001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.359002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.370996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.370996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.383001 (XEN) Xen call trace: Apr 26 08:26:22.383001 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:22.383001 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:22.395002 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:22.395002 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:22.407000 (XEN) Apr 26 08:26:22.407000 (XEN) *** Dumping CPU64 host state: *** Apr 26 08:26:22.407000 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:22.407000 (XEN) CPU: 64 Apr 26 08:26:22.419004 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:22.419004 (XEN) LR: 00000a000026d098 Apr 26 08:26:22.419004 (XEN) SP: 0000800fffc4fe60 Apr 26 08:26:22.430998 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:22.430998 (XEN) X0: 0000000000000000 X1: 0000760fff932000 X2: 0000800fffc5a048 Apr 26 08:26:22.442998 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:22.442998 (XEN) X6: 00000a00003625b0 X7: 0000800fffc5f740 X8: 0000000000000012 Apr 26 08:26:22.455006 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:22.455006 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:22.466999 (XEN) X15: 0000000000000000 X16: 1fffe0000600ea21 X17: 0000000000000000 Apr 26 08:26:22.466999 (XEN) X18: ffff8000add03c58 X19: 00000a00003625b8 X20: 0000000000000040 Apr 26 08:26:22.478999 (XEN) X21: 00000a000032ff80 X22: 0000000000000001 X23: 0000000000000040 Apr 26 08:26:22.478999 (XEN) X24: 0000000000000040 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:22.490999 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800fffc4fe60 Apr 26 08:26:22.502996 (XEN) Apr 26 08:26:22.502996 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:22.502996 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:22.502996 (XEN) Apr 26 08:26:22.502996 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:22.502996 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:22.514996 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:22.514996 (XEN) Apr 26 08:26:22.514996 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:22.514996 (XEN) HPFAR_EL2: 0000009010805d00 Apr 26 08:26:22.526996 (XEN) FAR_EL2: ffff8000835d0100 Apr 26 08:26:22.526996 (XEN) Apr 26 08:26:22.526996 (XEN) Xen stack trace from sp=0000800fffc4fe60: Apr 26 08:26:22.526996 (XEN) 0000800fffc4fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:22.539002 (XEN) 0000000000000040 0000000000000000 0000000000000000 0000000000010100 Apr 26 08:26:22.539002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.551002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.563003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.563003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.574993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.574993 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.587000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.587000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.598999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.598999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.611000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.622997 (XEN) Xen call trace: Apr 26 08:26:22.622997 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:22.622997 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:22.634999 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:22.634999 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:22.647000 (XEN) Apr 26 08:26:22.647000 (XEN) *** Dumping CPU65 host state: *** Apr 26 08:26:22.647000 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:22.647000 (XEN) CPU: 65 Apr 26 08:26:22.647000 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:22.658999 (XEN) LR: 00000a000026d098 Apr 26 08:26:22.658999 (XEN) SP: 0000800ffdfdfe60 Apr 26 08:26:22.658999 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:22.671001 (XEN) X0: 0000000000000000 X1: 0000760fff91e000 X2: 0000800fffc46048 Apr 26 08:26:22.671001 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:22.683001 (XEN) X6: 00000a00003625b0 X7: 0000800fffc5fc00 X8: 0000000000000012 Apr 26 08:26:22.694999 (XEN) X9: 0000000000000000 X10: ffff80008202a0e8 X11: 0000000000000138 Apr 26 08:26:22.694999 (XEN) X12: 00000000000003a8 X13: ffff800081fd20e8 X14: 0000000000000000 Apr 26 08:26:22.707001 (XEN) X15: ffff80008000b720 X16: 000000000000001d X17: 0000000000000000 Apr 26 08:26:22.707001 (XEN) X18: 0000000000000006 X19: 00000a00003625b8 X20: 0000000000000041 Apr 26 08:26:22.718988 (XEN) X21: 00000a0000330000 X22: 0000000000000002 X23: 0000000000000041 Apr 26 08:26:22.718988 (XEN) X24: 0000000000000041 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:22.731002 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdfdfe60 Apr 26 08:26:22.731002 (XEN) Apr 26 08:26:22.743006 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:22.743006 (XEN) VTTBR_EL2: 000201071e518000 Apr 26 08:26:22.743006 (XEN) Apr 26 08:26:22.743006 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:22.743006 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:22.754998 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:22.754998 (XEN) Apr 26 08:26:22.754998 (XEN) ESR_EL2: 000000005a000ea1 Apr 26 08:26:22.754998 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:22.754998 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:22.766998 (XEN) Apr 26 08:26:22.766998 (XEN) Xen stack trace from sp=0000800ffdfdfe60: Apr 26 08:26:22.766998 (XEN) 0000800ffdfdfe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:22.779002 (XEN) 0000000000000041 0000000000000000 0000000000000000 0000000000010101 Apr 26 08:26:22.779002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.790958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.790958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.802872 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.814999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.814999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.826891 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.826891 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.838958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.838958 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.850888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:22.850888 (XEN) Xen call trace: Apr 26 08:26:22.862893 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:22.862893 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:22.874966 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:22.874966 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:22.874966 (XEN) Apr 26 08:26:22.874966 (XEN) *** Dumping CPU66 host state: *** Apr 26 08:26:22.886990 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:22.886990 (XEN) CPU: 66 Apr 26 08:26:22.886990 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:22.898997 (XEN) LR: 00000a000026d098 Apr 26 08:26:22.898997 (XEN) SP: 0000800ffdfd7e60 Apr 26 08:26:22.898997 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:22.910994 (XEN) X0: 0000000000000000 X1: 0000760fff91c000 X2: 0000800fffc44048 Apr 26 08:26:22.910994 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:22.923013 (XEN) X6: 00000a00003625b0 X7: 0000800fffc42150 X8: 0000000000000012 Apr 26 08:26:22.923013 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:22.934997 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:22.947001 (XEN) X15: 0000000000000001 X16: 1fffe00005e59b01 X17: 0000000000000000 Apr 26 08:26:22.947001 (XEN) X18: ffff800098553c58 X19: 00000a00003625b8 X20: 0000000000000042 Apr 26 08:26:22.958988 (XEN) X21: 00000a0000330080 X22: 0000000000000004 X23: 0000000000000042 Apr 26 08:26:22.958988 (XEN) X24: 0000000000000042 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:22.971000 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdfd7e60 Apr 26 08:26:22.971000 (XEN) Apr 26 08:26:22.971000 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:22.983018 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:22.983018 (XEN) Apr 26 08:26:22.983018 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:22.983018 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:22.994967 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:22.994967 (XEN) Apr 26 08:26:22.994967 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:22.994967 (XEN) HPFAR_EL2: 0000008010801500 Apr 26 08:26:22.994967 (XEN) FAR_EL2: ffff800082950100 Apr 26 08:26:23.006995 (XEN) Apr 26 08:26:23.006995 (XEN) Xen stack trace from sp=0000800ffdfd7e60: Apr 26 08:26:23.006995 (XEN) 0000800ffdfd7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:23.019018 (XEN) 0000000000000042 0000000000000000 0000000000000000 0000000000010102 Apr 26 08:26:23.019018 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.030996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.030996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.043023 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.043023 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.055008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.067000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.067000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.078996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.078996 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.091003 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.091003 (XEN) Xen call trace: Apr 26 08:26:23.103017 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:23.103017 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:23.103017 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:23.114986 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:23.114986 (XEN) Apr 26 08:26:23.114986 (XEN) *** Dumping CPU67 host state: *** Apr 26 08:26:23.126998 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:23.126998 (XEN) CPU: 67 Apr 26 08:26:23.126998 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:23.138984 (XEN) LR: 00000a000026d098 Apr 26 08:26:23.138984 (XEN) SP: 0000800ffdfc7e60 Apr 26 08:26:23.138984 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:23.151000 (XEN) X0: 0000000000000000 X1: 0000760fff918000 X2: 0000800fffc40048 Apr 26 08:26:23.151000 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:23.163004 (XEN) X6: 00000a00003625b0 X7: 0000800fffc42590 X8: 0000000000000012 Apr 26 08:26:23.163004 (XEN) X9: 0000000000000000 X10: ffff80008202a0e8 X11: 0000000000000135 Apr 26 08:26:23.174998 (XEN) X12: 000000000000039f X13: ffff800081fd20e8 X14: 0000000000000000 Apr 26 08:26:23.174998 (XEN) X15: ffff80008000b720 X16: 000000000000001d X17: 0000000000000000 Apr 26 08:26:23.186995 (XEN) X18: 0000000000000006 X19: 00000a00003625b8 X20: 0000000000000043 Apr 26 08:26:23.199006 (XEN) X21: 00000a0000330100 X22: 0000000000000008 X23: 0000000000000043 Apr 26 08:26:23.199006 (XEN) X24: 0000000000000043 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:23.210999 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdfc7e60 Apr 26 08:26:23.210999 (XEN) Apr 26 08:26:23.210999 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:23.222959 (XEN) VTTBR_EL2: 000201071e58a000 Apr 26 08:26:23.222959 (XEN) Apr 26 08:26:23.222959 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:23.222959 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:23.222959 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:23.234997 (XEN) Apr 26 08:26:23.234997 (XEN) ESR_EL2: 000000005a000ea1 Apr 26 08:26:23.234997 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:23.234997 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:23.234997 (XEN) Apr 26 08:26:23.247002 (XEN) Xen stack trace from sp=0000800ffdfc7e60: Apr 26 08:26:23.247002 (XEN) 0000800ffdfc7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:23.247002 (XEN) 0000000000000043 0000000000000000 0000000000000000 0000000000010103 Apr 26 08:26:23.259004 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.271001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.271001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.282941 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.282941 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.294960 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.294960 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.306999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.319001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.319001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.330942 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.330942 (XEN) Xen call trace: Apr 26 08:26:23.330942 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:23.342943 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:23.342943 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:23.354962 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:23.354962 (XEN) Apr 26 08:26:23.354962 (XEN) *** Dumping CPU68 host state: *** Apr 26 08:26:23.354962 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:23.367027 (XEN) CPU: 68 Apr 26 08:26:23.367027 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:23.378987 (XEN) LR: 00000a000026d098 Apr 26 08:26:23.378987 (XEN) SP: 0000800ffdf5fe60 Apr 26 08:26:23.378987 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:23.391078 (XEN) X0: 0000000000000000 X1: 0000760ffdca4000 X2: 0000800ffdfcc048 Apr 26 08:26:23.391147 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:23.403079 (XEN) X6: 00000a00003625b0 X7: 0000800fffc42a50 X8: 0000000000000012 Apr 26 08:26:23.403143 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:23.415106 (XEN) X12: 0000000000000001 X13: 000000000000009a X14: 000000000000009a Apr 26 08:26:23.415169 (XEN) X15: 00003d0900000000 X16: 000000000a083459 X17: ffff8000821e0240 Apr 26 08:26:23.427115 (XEN) X18: ffff800083a0bb78 X19: 00000a00003625b8 X20: 0000000000000044 Apr 26 08:26:23.427179 (XEN) X21: 00000a0000330180 X22: 0000000000000010 X23: 0000000000000044 Apr 26 08:26:23.439118 (XEN) X24: 0000000000000044 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:23.451121 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf5fe60 Apr 26 08:26:23.451185 (XEN) Apr 26 08:26:23.451225 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:23.451269 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:23.463024 (XEN) Apr 26 08:26:23.463053 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:23.463078 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:23.463101 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:23.479116 (XEN) Apr 26 08:26:23.479170 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:23.479215 (XEN) HPFAR_EL2: 0000008010000200 Apr 26 08:26:23.479259 (XEN) FAR_EL2: ffff800082680090 Apr 26 08:26:23.479302 (XEN) Apr 26 08:26:23.479341 (XEN) Xen stack trace from sp=0000800ffdf5fe60: Apr 26 08:26:23.479387 (XEN) 0000800ffdf5fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:23.491123 (XEN) 0000000000000044 0000000000000000 0000000000000000 0000000000010104 Apr 26 08:26:23.503107 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.503169 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.515120 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.515182 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.527113 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.527175 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.539120 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.551109 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.551171 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.563108 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.563172 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.575104 (XEN) Xen call trace: Apr 26 08:26:23.575162 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:23.575213 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:23.587111 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:23.587197 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:23.599114 (XEN) Apr 26 08:26:23.599168 (XEN) *** Dumping CPU69 host state: *** Apr 26 08:26:23.599214 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:23.611110 (XEN) CPU: 69 Apr 26 08:26:23.611167 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:23.611217 (XEN) LR: 00000a000026d098 Apr 26 08:26:23.611260 (XEN) SP: 0000800ffdf57e60 Apr 26 08:26:23.623114 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:23.623180 (XEN) X0: 0000000000000000 X1: 0000760ffdca2000 X2: 0000800ffdfca048 Apr 26 08:26:23.635123 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:23.635188 (XEN) X6: 00000a00003625b0 X7: 0000800ffdfc8010 X8: 0000000000000012 Apr 26 08:26:23.647123 (XEN) X9: 0000000000000000 X10: ffff80008202a0e8 X11: 0000000000000135 Apr 26 08:26:23.647188 (XEN) X12: 000000000000039f X13: ffff800081fd20e8 X14: 0000000000000000 Apr 26 08:26:23.659118 (XEN) X15: ffff80008000b720 X16: 000000000000001d X17: 0000000000000000 Apr 26 08:26:23.659182 (XEN) X18: 0000000000000006 X19: 00000a00003625b8 X20: 0000000000000045 Apr 26 08:26:23.671115 (XEN) X21: 00000a0000330200 X22: 0000000000000020 X23: 0000000000000045 Apr 26 08:26:23.683107 (XEN) X24: 0000000000000045 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:23.683169 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf57e60 Apr 26 08:26:23.695070 (XEN) Apr 26 08:26:23.695123 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:23.695168 (XEN) VTTBR_EL2: 000201072260e000 Apr 26 08:26:23.695212 (XEN) Apr 26 08:26:23.695251 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:23.707026 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:23.707058 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:23.707082 (XEN) Apr 26 08:26:23.707104 (XEN) ESR_EL2: 000000005a000ea1 Apr 26 08:26:23.707127 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:23.719066 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:23.719125 (XEN) Apr 26 08:26:23.719165 (XEN) Xen stack trace from sp=0000800ffdf57e60: Apr 26 08:26:23.719212 (XEN) 0000800ffdf57e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:23.728784 (XEN) 0000000000000045 0000000000000000 0000000000000000 0000000000010105 Apr 26 08:26:23.728827 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.741995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.755054 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.755121 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.766974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.766974 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.778999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.778999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.791001 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.802991 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.802991 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.812867 (XEN) Xen call trace: Apr 26 08:26:23.812948 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:23.813004 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:23.825255 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:23.825323 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:23.839031 (XEN) Apr 26 08:26:23.839085 (XEN) *** Dumping CPU70 host state: *** Apr 26 08:26:23.839132 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:23.839202 (XEN) CPU: 70 Apr 26 08:26:23.850952 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:23.850988 (XEN) LR: 00000a000026d098 Apr 26 08:26:23.851012 (XEN) SP: 0000800ffdf47e60 Apr 26 08:26:23.851036 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:23.862933 (XEN) X0: 0000000000000000 X1: 0000760ffdc26000 X2: 0000800ffdf4e048 Apr 26 08:26:23.874983 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:23.874983 (XEN) X6: 00000a00003625b0 X7: 0000800ffdfc8410 X8: 0000000000000012 Apr 26 08:26:23.886986 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:23.886986 (XEN) X12: 0000000000000001 X13: 00000000000001d2 X14: 00000000000001d2 Apr 26 08:26:23.898992 (XEN) X15: 0000000000000000 X16: 00000000c8745058 X17: 0000000088e2e67c Apr 26 08:26:23.898992 (XEN) X18: 0000000000000014 X19: 00000a00003625b8 X20: 0000000000000046 Apr 26 08:26:23.910067 (XEN) X21: 00000a0000330280 X22: 0000000000000040 X23: 0000000000000046 Apr 26 08:26:23.910067 (XEN) X24: 0000000000000046 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:23.922960 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdf47e Apr 26 08:26:23.926008 60 Apr 26 08:26:23.935086 (XEN) Apr 26 08:26:23.935086 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:23.935086 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:23.935086 (XEN) Apr 26 08:26:23.935086 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:23.935086 (XEN) H Apr 26 08:26:23.937432 CR_EL2: 00000000807c663f Apr 26 08:26:23.946887 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:23.946887 (XEN) Apr 26 08:26:23.946887 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:23.946887 (XEN) HPFAR_EL2: 0000008010804500 Apr 26 08:26:23.958966 (XEN) FAR_EL2: ffff800082c50100 Apr 26 08:26:23.958966 (XEN) Apr 26 08:26:23.958966 (XEN) Xen stack trace from sp=0000800ffdf47e60: Apr 26 08:26:23.958966 (XEN) 0000800ffdf47e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:23.970977 (XEN) 0000000000000046 0000000000000000 0000000000000000 0000000000010106 Apr 26 08:26:23.970977 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.987008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.987008 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.999011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:23.999011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.010972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.010972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.022995 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.035000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.035000 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.046985 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.046985 (XEN) Xen call trace: Apr 26 08:26:24.046985 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:24.059002 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:24.059002 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:24.071003 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:24.071003 (XEN) Apr 26 08:26:24.071003 (XEN) *** Dumping CPU71 host state: *** Apr 26 08:26:24.071003 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:24.082997 (XEN) CPU: 71 Apr 26 08:26:24.082997 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:24.095000 (XEN) LR: 00000a000026d098 Apr 26 08:26:24.095000 (XEN) SP: 0000800ffdedfe60 Apr 26 08:26:24.095000 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:24.106994 (XEN) X0: 0000000000000000 X1: 0000760ffdc22000 X2: 0000800ffdf4a048 Apr 26 08:26:24.106994 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:24.118995 (XEN) X6: 00000a00003625b0 X7: 0000800ffdfc88d0 X8: 0000000000000012 Apr 26 08:26:24.118995 (XEN) X9: 0000000000000000 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:24.131153 (XEN) X12: 0000000000000000 X13: 0000000000000088 X14: 0000000000000084 Apr 26 08:26:24.131220 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:24.142997 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000047 Apr 26 08:26:24.142997 (XEN) X21: 00000a0000330300 X22: 0000000000000080 X23: 0000000000000047 Apr 26 08:26:24.154953 (XEN) X24: 0000000000000047 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:24.166918 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdedfe60 Apr 26 08:26:24.166918 (XEN) Apr 26 08:26:24.166918 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:24.166918 (XEN) VTTBR_EL2: 000201071e518000 Apr 26 08:26:24.178931 (XEN) Apr 26 08:26:24.178931 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:24.178931 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:24.178931 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:24.178931 (XEN) Apr 26 08:26:24.190937 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:24.190937 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:24.190937 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:24.190937 (XEN) Apr 26 08:26:24.190937 (XEN) Xen stack trace from sp=0000800ffdedfe60: Apr 26 08:26:24.202942 (XEN) 0000800ffdedfe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:24.202942 (XEN) 0000000000000047 0000000000000000 0000000000000000 0000000000010107 Apr 26 08:26:24.215011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.215011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.226938 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.238955 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.238955 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.250954 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.250954 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.262992 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.262992 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.274933 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.286984 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.286984 (XEN) Xen call trace: Apr 26 08:26:24.286984 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:24.298982 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:24.298982 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:24.310943 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:24.310943 (XEN) Apr 26 08:26:24.310943 (XEN) *** Dumping CPU72 host state: *** Apr 26 08:26:24.310943 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:24.322957 (XEN) CPU: 72 Apr 26 08:26:24.322957 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:24.322957 (XEN) LR: 00000a000026d098 Apr 26 08:26:24.334959 (XEN) SP: 0000800ffdecfe60 Apr 26 08:26:24.334959 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:24.334959 (XEN) X0: 0000000000000000 X1: 0000760ffdc20000 X2: 0000800ffdf48048 Apr 26 08:26:24.346899 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:24.346899 (XEN) X6: 00000a00003625b0 X7: 0000800ffdfc8d90 X8: 0000000000000012 Apr 26 08:26:24.358926 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:24.370916 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:24.371003 (XEN) X15: 000000000000003d X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:24.382903 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000048 Apr 26 08:26:24.382903 (XEN) X21: 00000a0000330380 X22: 0000000000000100 X23: 0000000000000048 Apr 26 08:26:24.394926 (XEN) X24: 0000000000000048 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:24.394926 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdecfe60 Apr 26 08:26:24.406952 (XEN) Apr 26 08:26:24.406952 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:24.406952 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:24.418957 (XEN) Apr 26 08:26:24.418957 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:24.418957 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:24.418957 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:24.418957 (XEN) Apr 26 08:26:24.418957 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:24.430952 (XEN) HPFAR_EL2: 0000008010805d00 Apr 26 08:26:24.430952 (XEN) FAR_EL2: ffff800082dd0100 Apr 26 08:26:24.430952 (XEN) Apr 26 08:26:24.430952 (XEN) Xen stack trace from sp=0000800ffdecfe60: Apr 26 08:26:24.442933 (XEN) 0000800ffdecfe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:24.442933 (XEN) 0000000000000048 0000000000000000 0000000000000000 0000000000010108 Apr 26 08:26:24.454943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.454943 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.466932 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.466932 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.478948 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.490949 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.490949 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.502913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.502913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.514924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.514924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.526944 (XEN) Xen call trace: Apr 26 08:26:24.526944 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:24.538905 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:24.538905 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:24.550921 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:24.550921 (XEN) Apr 26 08:26:24.550921 (XEN) *** Dumping CPU73 host state: *** Apr 26 08:26:24.550921 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:24.562934 (XEN) CPU: 73 Apr 26 08:26:24.562934 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:24.562934 (XEN) LR: 00000a000026d098 Apr 26 08:26:24.574926 (XEN) SP: 0000800ffdec7e60 Apr 26 08:26:24.574926 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:24.574926 (XEN) X0: 0000000000000000 X1: 0000760ffdbac000 X2: 0000800ffded4048 Apr 26 08:26:24.586924 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:24.586924 (XEN) X6: 00000a00003625b0 X7: 0000800ffded6280 X8: 0000000000000012 Apr 26 08:26:24.598924 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:24.598924 (XEN) X12: 0000000000000002 X13: 0000000000000000 X14: ffff800081a1ef00 Apr 26 08:26:24.610916 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:24.622918 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000049 Apr 26 08:26:24.622918 (XEN) X21: 00000a0000330400 X22: 0000000000000200 X23: 0000000000000049 Apr 26 08:26:24.634904 (XEN) X24: 0000000000000049 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:24.634904 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffdec7e60 Apr 26 08:26:24.646928 (XEN) Apr 26 08:26:24.646928 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:24.646928 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:24.646928 (XEN) Apr 26 08:26:24.646928 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:24.658916 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:24.658916 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:24.658916 (XEN) Apr 26 08:26:24.658916 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:24.670929 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:24.670929 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:24.670929 (XEN) Apr 26 08:26:24.670929 (XEN) Xen stack trace from sp=0000800ffdec7e60: Apr 26 08:26:24.670929 (XEN) 0000800ffdec7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:24.682960 (XEN) 0000000000000049 0000000000000000 0000000000000000 0000000000010109 Apr 26 08:26:24.694940 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.694940 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.706973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.706973 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.718964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.718964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.730931 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.742937 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.742937 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.754942 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.754942 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.766961 (XEN) Xen call trace: Apr 26 08:26:24.766961 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:24.766961 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:24.778976 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:24.778976 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:24.790937 (XEN) Apr 26 08:26:24.790937 (XEN) *** Dumping CPU74 host state: *** Apr 26 08:26:24.790937 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:24.802944 (XEN) CPU: 74 Apr 26 08:26:24.802944 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:24.802944 (XEN) LR: 00000a000026d098 Apr 26 08:26:24.802944 (XEN) SP: 0000800ffde5fe60 Apr 26 08:26:24.814958 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:24.814958 (XEN) X0: 0000000000000000 X1: 0000760ffdba8000 X2: 0000800ffded0048 Apr 26 08:26:24.826991 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:24.826991 (XEN) X6: 00000a00003625b0 X7: 0000800ffded6740 X8: 0000000000000012 Apr 26 08:26:24.837877 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:24.837877 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:24.850934 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:24.850934 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000004a Apr 26 08:26:24.862923 (XEN) X21: 00000a0000330480 X22: 0000000000000400 X23: 000000000000004a Apr 26 08:26:24.874925 (XEN) X24: 000000000000004a X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:24.874925 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde5fe60 Apr 26 08:26:24.887004 (XEN) Apr 26 08:26:24.887004 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:24.887004 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:24.887004 (XEN) Apr 26 08:26:24.887004 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:24.898959 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:24.898959 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:24.898959 (XEN) Apr 26 08:26:24.898959 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:24.898959 (XEN) HPFAR_EL2: 0000009010801500 Apr 26 08:26:24.910936 (XEN) FAR_EL2: ffff800083150100 Apr 26 08:26:24.910936 (XEN) Apr 26 08:26:24.910936 (XEN) Xen stack trace from sp=0000800ffde5fe60: Apr 26 08:26:24.910936 (XEN) 0000800ffde5fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:24.922936 (XEN) 000000000000004a 0000000000000000 0000000000000000 000000000001010a Apr 26 08:26:24.922936 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.934966 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.946924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.946924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.959002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.959002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.970948 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.970948 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.982939 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.994953 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:24.994953 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.006968 (XEN) Xen call trace: Apr 26 08:26:25.006968 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:25.006968 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:25.018946 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:25.018946 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:25.030887 (XEN) Apr 26 08:26:25.030887 (XEN) *** Dumping CPU75 host state: *** Apr 26 08:26:25.030887 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:25.030887 (XEN) CPU: 75 Apr 26 08:26:25.042900 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:25.042900 (XEN) LR: 00000a000026d098 Apr 26 08:26:25.042900 (XEN) SP: 0000800ffde4fe60 Apr 26 08:26:25.042900 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:25.054895 (XEN) X0: 0000000000000000 X1: 0000760ffdb2e000 X2: 0000800ffde56048 Apr 26 08:26:25.066892 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:25.066892 (XEN) X6: 00000a00003625b0 X7: 0000800ffded6c00 X8: 0000000000000012 Apr 26 08:26:25.078916 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:25.078916 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:25.090901 (XEN) X15: 0000ffffda593978 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:25.090901 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000004b Apr 26 08:26:25.102902 (XEN) X21: 00000a0000330500 X22: 0000000000000800 X23: 000000000000004b Apr 26 08:26:25.102902 (XEN) X24: 000000000000004b X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:25.114909 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde4fe60 Apr 26 08:26:25.126922 (XEN) Apr 26 08:26:25.126922 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:25.126922 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:25.126922 (XEN) Apr 26 08:26:25.126922 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:25.126922 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:25.138908 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:25.138908 (XEN) Apr 26 08:26:25.138908 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:25.138908 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:25.150914 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:25.150914 (XEN) Apr 26 08:26:25.150914 (XEN) Xen stack trace from sp=0000800ffde4fe60: Apr 26 08:26:25.150914 (XEN) 0000800ffde4fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:25.162910 (XEN) 000000000000004b 0000000000000000 0000000000000000 000000000001010b Apr 26 08:26:25.162910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.174915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.186880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.186880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.198879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.198879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.210915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.210915 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.222889 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.222889 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.234912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.246878 (XEN) Xen call trace: Apr 26 08:26:25.246878 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:25.246878 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:25.258917 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:25.258917 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:25.258917 (XEN) Apr 26 08:26:25.270898 (XEN) *** Dumping CPU76 host state: *** Apr 26 08:26:25.270898 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:25.270898 (XEN) CPU: 76 Apr 26 08:26:25.270898 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:25.282911 (XEN) LR: 00000a000026d098 Apr 26 08:26:25.282911 (XEN) SP: 0000800ffde47e60 Apr 26 08:26:25.282911 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:25.294917 (XEN) X0: 0000000000000000 X1: 0000760ffdb2a000 X2: 0000800ffde52048 Apr 26 08:26:25.294917 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:25.306900 (XEN) X6: 00000a00003625b0 X7: 0000800ffde51150 X8: 0000000000000012 Apr 26 08:26:25.318893 (XEN) X9: 0000000000000080 X10: 0000000000000000 X11: 000000000000006c Apr 26 08:26:25.318893 (XEN) X12: 0000000000000000 X13: 000000000000005f X14: ffff800088193c90 Apr 26 08:26:25.330892 (XEN) X15: 0000ffffda593978 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:25.330892 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000004c Apr 26 08:26:25.342888 (XEN) X21: 00000a0000330580 X22: 0000000000001000 X23: 000000000000004c Apr 26 08:26:25.342888 (XEN) X24: 000000000000004c X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:25.354910 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffde47e60 Apr 26 08:26:25.354910 (XEN) Apr 26 08:26:25.366897 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:25.366897 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:25.366897 (XEN) Apr 26 08:26:25.366897 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:25.366897 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:25.378889 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:25.378889 (XEN) Apr 26 08:26:25.378889 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:25.378889 (XEN) HPFAR_EL2: 0000009010802d00 Apr 26 08:26:25.378889 (XEN) FAR_EL2: ffff8000832d0100 Apr 26 08:26:25.390906 (XEN) Apr 26 08:26:25.390906 (XEN) Xen stack trace from sp=0000800ffde47e60: Apr 26 08:26:25.390906 (XEN) 0000800ffde47e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:25.402909 (XEN) 000000000000004c 0000000000000000 0000000000000000 000000000001010c Apr 26 08:26:25.402909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.414911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.414911 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.426920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.438924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.438924 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.450976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.450976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.462910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.462910 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.478952 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.478952 (XEN) Xen call trace: Apr 26 08:26:25.478952 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:25.490920 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:25.490920 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:25.502889 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:25.502889 (XEN) Apr 26 08:26:25.502889 (XEN) *** Dumping CPU77 host state: *** Apr 26 08:26:25.502889 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:25.514886 (XEN) CPU: 77 Apr 26 08:26:25.514886 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:25.514886 (XEN) LR: 00000a000026d098 Apr 26 08:26:25.526895 (XEN) SP: 0000800ffd9f7e60 Apr 26 08:26:25.526895 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:25.526895 (XEN) X0: 0000000000000000 X1: 0000760ffd6d6000 X2: 0000800ffd9fe048 Apr 26 08:26:25.538929 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:25.550913 (XEN) X6: 00000a00003625b0 X7: 0000800ffde51590 X8: 0000000000000012 Apr 26 08:26:25.550913 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:25.562923 (XEN) X12: 0000000000000001 X13: 000000000000012c X14: 000000000000012c Apr 26 08:26:25.562923 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:25.574929 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000004d Apr 26 08:26:25.574929 (XEN) X21: 00000a0000330600 X22: 0000000000002000 X23: 000000000000004d Apr 26 08:26:25.587080 (XEN) X24: 000000000000004d X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:25.587153 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd9f7e60 Apr 26 08:26:25.598932 (XEN) Apr 26 08:26:25.598932 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:25.598932 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:25.610930 (XEN) Apr 26 08:26:25.610930 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:25.610930 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:25.610930 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:25.610930 (XEN) Apr 26 08:26:25.610930 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:25.622977 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:25.623021 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:25.623056 (XEN) Apr 26 08:26:25.623090 (XEN) Xen stack trace from sp=0000800ffd9f7e60: Apr 26 08:26:25.634974 (XEN) 0000800ffd9f7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:25.635019 (XEN) 000000000000004d 0000000000000000 0000000000000000 000000000001010d Apr 26 08:26:25.647036 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.647079 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.658968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.659012 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.671039 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.683020 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.683063 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.695030 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.695075 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.707006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.707053 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.719036 (XEN) Xen call trace: Apr 26 08:26:25.719077 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:25.730971 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:25.731015 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:25.742951 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:25.742991 (XEN) Apr 26 08:26:25.743020 (XEN) *** Dumping CPU78 host state: *** Apr 26 08:26:25.743057 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:25.755025 (XEN) CPU: 78 Apr 26 08:26:25.755061 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:25.755101 (XEN) LR: 00000a000026d098 Apr 26 08:26:25.767012 (XEN) SP: 0000800ffd9efe60 Apr 26 08:26:25.767054 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:25.767098 (XEN) X0: 0000000000000000 X1: 0000760ffd6d4000 X2: 0000800ffd9fc048 Apr 26 08:26:25.779027 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:25.779070 (XEN) X6: 00000a00003625b0 X7: 0000800ffde51a50 X8: 0000000000000012 Apr 26 08:26:25.791028 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000001 Apr 26 08:26:25.803020 (XEN) X12: 0000000000000000 X13: 0000000000000000 X14: 0000000000000310 Apr 26 08:26:25.803066 (XEN) X15: 0000000000000000 X16: 00000000d1834e70 X17: ffff8000821e0240 Apr 26 08:26:25.815003 (XEN) X18: ffff800083733b78 X19: 00000a00003625b8 X20: 000000000000004e Apr 26 08:26:25.815047 (XEN) X21: 00000a0000330680 X22: 0000000000004000 X23: 000000000000004e Apr 26 08:26:25.827014 (XEN) X24: 000000000000004e X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:25.827060 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd9efe60 Apr 26 08:26:25.838978 (XEN) Apr 26 08:26:25.839013 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:25.839048 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:25.839082 (XEN) Apr 26 08:26:25.851061 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:25.851104 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:25.851167 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:25.851203 (XEN) Apr 26 08:26:25.851232 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:25.863028 (XEN) HPFAR_EL2: 0000009010804500 Apr 26 08:26:25.863069 (XEN) FAR_EL2: ffff800083450100 Apr 26 08:26:25.863104 (XEN) Apr 26 08:26:25.863134 (XEN) Xen stack trace from sp=0000800ffd9efe60: Apr 26 08:26:25.875019 (XEN) 0000800ffd9efe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:25.875060 (XEN) 000000000000004e 0000000000000000 0000000000000000 000000000001010e Apr 26 08:26:25.887009 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.887056 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.899029 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.899072 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.911016 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.911058 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.923006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.935017 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.935060 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.946988 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.947031 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:25.958975 (XEN) Xen call trace: Apr 26 08:26:25.959011 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:25.970967 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:25.971010 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:25.971047 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:25.982974 (XEN) Apr 26 08:26:25.983008 (XEN) *** Dumping CPU79 host state: *** Apr 26 08:26:25.983044 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:25.994967 (XEN) CPU: 79 Apr 26 08:26:25.995002 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:25.995040 (XEN) LR: 00000a000026d098 Apr 26 08:26:25.995072 (XEN) SP: 0000800ffd9e7e60 Apr 26 08:26:26.007020 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:26.007069 (XEN) X0: 0000000000000000 X1: 0000760ffd6d0000 X2: 0000800ffd9f8048 Apr 26 08:26:26.018991 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:26.019034 (XEN) X6: 00000a00003625b0 X7: 0000800ffd97f010 X8: 0000000000000012 Apr 26 08:26:26.031011 (XEN) X9: 0000000000000000 X10: ffff80008202a0e8 X11: 0000000000000136 Apr 26 08:26:26.031050 (XEN) X12: 00000000000003a2 X13: ffff800081fd20e8 X14: 0000000000000000 Apr 26 08:26:26.042975 (XEN) X15: ffff80008000b720 X16: 000000000000001d X17: 0000000000000000 Apr 26 08:26:26.055087 (XEN) X18: 0000000000000006 X19: 00000a00003625b8 X20: 000000000000004f Apr 26 08:26:26.055146 (XEN) X21: 00000a0000330700 X22: 0000000000008000 X23: 000000000000004f Apr 26 08:26:26.067048 (XEN) X24: 000000000000004f X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:26.067090 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd9e7e60 Apr 26 08:26:26.079070 (XEN) Apr 26 08:26:26.079116 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:26.079161 (XEN) VTTBR_EL2: 00020107fc543000 Apr 26 08:26:26.079205 (XEN) Apr 26 08:26:26.079243 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:26.091000 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:26.091050 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:26.091094 (XEN) Apr 26 08:26:26.091133 (XEN) ESR_EL2: 000000005a000ea1 Apr 26 08:26:26.091175 (XEN) HPFAR_EL2: 0000000000030300 Apr 26 08:26:26.103034 (XEN) FAR_EL2: ffff800083010100 Apr 26 08:26:26.103105 (XEN) Apr 26 08:26:26.103142 (XEN) Xen stack trace from sp=0000800ffd9e7e60: Apr 26 08:26:26.103185 (XEN) 0000800ffd9e7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:26.115102 (XEN) 000000000000004f 0000000000000000 0000000000000000 000000000001010f Apr 26 08:26:26.127056 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.127112 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.138972 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.139014 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.150990 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.151031 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.163019 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.163060 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.175073 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.187040 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.187079 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.199065 (XEN) Xen call trace: Apr 26 08:26:26.199115 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:26.199166 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:26.211063 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:26.211122 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:26.223082 (XEN) Apr 26 08:26:26.223117 (XEN) *** Dumping CPU80 host state: *** Apr 26 08:26:26.223149 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:26.223188 (XEN) CPU: 80 Apr 26 08:26:26.235056 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:26.235123 (XEN) LR: 00000a000026d098 Apr 26 08:26:26.235157 (XEN) SP: 0000800ffd977e60 Apr 26 08:26:26.247047 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:26.247107 (XEN) X0: 0000000000000000 X1: 0000760ffd654000 X2: 0000800ffd97c048 Apr 26 08:26:26.259054 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:26.259111 (XEN) X6: 00000a00003625b0 X7: 0000800ffd97f410 X8: 0000000000000012 Apr 26 08:26:26.271051 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:26.271107 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:26.283054 (XEN) X15: 00000000000002c1 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:26.283109 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000050 Apr 26 08:26:26.295088 (XEN) X21: 00000a0000330780 X22: 0000000000010000 X23: 0000000000000050 Apr 26 08:26:26.307090 (XEN) X24: 0000000000000050 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:26.307155 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd977e60 Apr 26 08:26:26.319106 (XEN) Apr 26 08:26:26.319159 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:26.319204 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:26.319248 (XEN) Apr 26 08:26:26.319287 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:26.331091 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:26.331150 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:26.331194 (XEN) Apr 26 08:26:26.331233 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:26.331275 (XEN) HPFAR_EL2: 0000009010805f00 Apr 26 08:26:26.343077 (XEN) FAR_EL2: ffff8000835f0100 Apr 26 08:26:26.343135 (XEN) Apr 26 08:26:26.343175 (XEN) Xen stack trace from sp=0000800ffd977e60: Apr 26 08:26:26.343222 (XEN) 0000800ffd977e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:26.355156 (XEN) 0000000000000050 0000000000000000 0000000000000000 0000000000010200 Apr 26 08:26:26.355220 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.367091 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.379094 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.379157 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.391054 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.391105 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.403146 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.403219 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.415060 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.427052 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.427104 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.439059 (XEN) Xen call trace: Apr 26 08:26:26.439126 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:26.439173 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:26.451113 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:26.451177 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:26.463123 (XEN) Apr 26 08:26:26.463180 (XEN) *** Dumping CPU81 host state: *** Apr 26 08:26:26.463226 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:26.463275 (XEN) CPU: 81 Apr 26 08:26:26.474992 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:26.475035 (XEN) LR: 00000a000026d098 Apr 26 08:26:26.475067 (XEN) SP: 0000800ffd96fe60 Apr 26 08:26:26.475100 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:26.486994 (XEN) X0: 0000000000000000 X1: 0000760ffd652000 X2: 0000800ffd97a048 Apr 26 08:26:26.487040 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:26.499012 (XEN) X6: 00000a00003625b0 X7: 0000800ffd97f8d0 X8: 0000000000000012 Apr 26 08:26:26.511024 (XEN) X9: 0000000000000000 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:26.511068 (XEN) X12: 0000000000000001 X13: 00000000000000f5 X14: 00000000000000f5 Apr 26 08:26:26.523023 (XEN) X15: 0000000000000000 X16: 0000000099c64f72 X17: 00000000070e5e9f Apr 26 08:26:26.523067 (XEN) X18: 0000000000000014 X19: 00000a00003625b8 X20: 0000000000000051 Apr 26 08:26:26.535015 (XEN) X21: 00000a0000330800 X22: 0000000000020000 X23: 0000000000000051 Apr 26 08:26:26.535058 (XEN) X24: 0000000000000051 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:26.546972 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd96fe60 Apr 26 08:26:26.559016 (XEN) Apr 26 08:26:26.559050 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:26.559086 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:26.559119 (XEN) Apr 26 08:26:26.559153 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:26.559187 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:26.571023 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:26.571062 (XEN) Apr 26 08:26:26.571092 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:26.571125 (XEN) HPFAR_EL2: 0000008010800b00 Apr 26 08:26:26.571158 (XEN) FAR_EL2: ffff8000828b0100 Apr 26 08:26:26.583012 (XEN) Apr 26 08:26:26.583047 (XEN) Xen stack trace from sp=0000800ffd96fe60: Apr 26 08:26:26.583083 (XEN) 0000800ffd96fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:26.595011 (XEN) 0000000000000051 0000000000000000 0000000000000000 0000000000010201 Apr 26 08:26:26.595053 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.607038 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.607083 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.619006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.631029 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.631072 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.643015 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.643061 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.655028 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.655073 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.667017 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.678977 (XEN) Xen call trace: Apr 26 08:26:26.679014 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:26.679054 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:26.691021 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:26.691064 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:26.691100 (XEN) Apr 26 08:26:26.691130 (XEN) *** Dumping CPU82 host state: *** Apr 26 08:26:26.703022 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:26.703066 (XEN) CPU: 82 Apr 26 08:26:26.703099 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:26.715027 (XEN) LR: 00000a000026d098 Apr 26 08:26:26.715069 (XEN) SP: 0000800ffd8ffe60 Apr 26 08:26:26.715104 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:26.727024 (XEN) X0: 0000000000000000 X1: 0000760ffd63e000 X2: 0000800ffd966048 Apr 26 08:26:26.727068 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:26.739024 (XEN) X6: 00000a00003625b0 X7: 0000800ffd97fd90 X8: 0000000000000012 Apr 26 08:26:26.739067 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:26.750971 (XEN) X12: 0000000000000001 X13: 00000000000002a1 X14: 00000000000002a1 Apr 26 08:26:26.763025 (XEN) X15: 0000000000000068 X16: 1fffe00004fba421 X17: 0000000000000000 Apr 26 08:26:26.763069 (XEN) X18: ffff8000b0dc3c58 X19: 00000a00003625b8 X20: 0000000000000052 Apr 26 08:26:26.775009 (XEN) X21: 00000a0000330880 X22: 0000000000040000 X23: 0000000000000052 Apr 26 08:26:26.775053 (XEN) X24: 0000000000000052 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:26.787028 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8ffe60 Apr 26 08:26:26.787072 (XEN) Apr 26 08:26:26.787101 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:26.799025 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:26.799066 (XEN) Apr 26 08:26:26.799099 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:26.799138 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:26.811012 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:26.811052 (XEN) Apr 26 08:26:26.811082 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:26.811114 (XEN) HPFAR_EL2: 0000008010801700 Apr 26 08:26:26.811147 (XEN) FAR_EL2: ffff800082970100 Apr 26 08:26:26.823023 (XEN) Apr 26 08:26:26.823057 (XEN) Xen stack trace from sp=0000800ffd8ffe60: Apr 26 08:26:26.823095 (XEN) 0000800ffd8ffe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:26.835006 (XEN) 0000000000000052 0000000000000000 0000000000000000 0000000000010202 Apr 26 08:26:26.835048 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.847002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.847002 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.859073 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.859124 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.871024 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.883006 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.883048 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.895022 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.895065 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.907033 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:26.907076 (XEN) Xen call trace: Apr 26 08:26:26.919027 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:26.919072 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:26.931022 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:26.931064 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:26.931099 (XEN) Apr 26 08:26:26.931128 (XEN) *** Dumping CPU83 host state: *** Apr 26 08:26:26.943135 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:26.943170 (XEN) CPU: 83 Apr 26 08:26:26.943193 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:26.955099 (XEN) LR: 00000a000026d098 Apr 26 08:26:26.955128 (XEN) SP: 0000800ffd8f7e60 Apr 26 08:26:26.955152 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:26.967111 (XEN) X0: 0000000000000000 X1: 0000760ffd63a000 X2: 0000800ffd962048 Apr 26 08:26:26.967146 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:26.979097 (XEN) X6: 00000a00003625b0 X7: 0000800ffd965280 X8: 0000000000000012 Apr 26 08:26:26.979132 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:26.991115 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:26.991149 (XEN) X15: 0000000000000019 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:27.003115 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000053 Apr 26 08:26:27.015101 (XEN) X21: 00000a0000330900 X22: 0000000000080000 X23: 0000000000000053 Apr 26 08:26:27.015136 (XEN) X24: 0000000000000053 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:27.027136 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8f7e60 Apr 26 08:26:27.027171 (XEN) Apr 26 08:26:27.027193 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:27.039110 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:27.039142 (XEN) Apr 26 08:26:27.039164 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:27.039188 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:27.039211 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:27.051117 (XEN) Apr 26 08:26:27.051146 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:27.051170 (XEN) HPFAR_EL2: 0000008010802300 Apr 26 08:26:27.051194 (XEN) FAR_EL2: ffff800082a30100 Apr 26 08:26:27.063090 (XEN) Apr 26 08:26:27.063120 (XEN) Xen stack trace from sp=0000800ffd8f7e60: Apr 26 08:26:27.063146 (XEN) 0000800ffd8f7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:27.063174 (XEN) 0000000000000053 0000000000000000 0000000000000000 0000000000010203 Apr 26 08:26:27.075113 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.087102 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.087136 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.099099 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.099134 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.111133 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.111168 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.123094 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.135132 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.135166 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.147108 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.147143 (XEN) Xen call trace: Apr 26 08:26:27.147167 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:27.159139 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:27.159202 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:27.171174 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:27.171234 (XEN) Apr 26 08:26:27.171274 (XEN) *** Dumping CPU84 host state: *** Apr 26 08:26:27.183126 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:27.183191 (XEN) CPU: 84 Apr 26 08:26:27.183233 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:27.195065 (XEN) LR: 00000a000026d098 Apr 26 08:26:27.195092 (XEN) SP: 0000800ffd8e7e60 Apr 26 08:26:27.195116 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:27.207137 (XEN) X0: 0000000000000000 X1: 0000760ffd638000 X2: 0000800ffd960048 Apr 26 08:26:27.207172 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:27.219161 (XEN) X6: 00000a00003625b0 X7: 0000800ffd965740 X8: 0000000000000012 Apr 26 08:26:27.219226 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000001 Apr 26 08:26:27.231145 (XEN) X12: 0000000000000001 X13: 00000000000001ae X14: 00000000000001ae Apr 26 08:26:27.231202 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:27.243167 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000054 Apr 26 08:26:27.243231 (XEN) X21: 00000a0000330980 X22: 0000000000100000 X23: 0000000000000054 Apr 26 08:26:27.255219 (XEN) X24: 0000000000000054 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:27.267189 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd8e7e60 Apr 26 08:26:27.267253 (XEN) Apr 26 08:26:27.267293 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:27.267338 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:27.279126 (XEN) Apr 26 08:26:27.279179 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:27.279225 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:27.279269 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:27.291170 (XEN) Apr 26 08:26:27.291223 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:27.291268 (XEN) HPFAR_EL2: 0000008010000200 Apr 26 08:26:27.291311 (XEN) FAR_EL2: ffff800082680090 Apr 26 08:26:27.291354 (XEN) Apr 26 08:26:27.291392 (XEN) Xen stack trace from sp=0000800ffd8e7e60: Apr 26 08:26:27.303176 (XEN) 0000800ffd8e7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:27.303240 (XEN) 0000000000000054 0000000000000000 0000000000000000 0000000000010204 Apr 26 08:26:27.315132 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.315188 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.327191 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.339156 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.339219 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.351187 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.351256 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.363172 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.363229 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.375146 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.387090 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.387143 (XEN) Xen call trace: Apr 26 08:26:27.387185 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:27.399147 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:27.399210 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:27.411094 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:27.411145 (XEN) Apr 26 08:26:27.411184 (XEN) *** Dumping CPU85 host state: *** Apr 26 08:26:27.411229 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:27.423144 (XEN) CPU: 85 Apr 26 08:26:27.423199 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:27.423248 (XEN) LR: 00000a000026d098 Apr 26 08:26:27.435135 (XEN) SP: 0000800ffd87fe60 Apr 26 08:26:27.435183 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:27.435232 (XEN) X0: 0000000000000000 X1: 0000760ffd5c4000 X2: 0000800ffd8ec048 Apr 26 08:26:27.447192 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:27.459165 (XEN) X6: 00000a00003625b0 X7: 0000800ffd965c00 X8: 0000000000000012 Apr 26 08:26:27.459229 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:27.471187 (XEN) X12: 0000000000000001 X13: 0000000000000333 X14: 0000000000000333 Apr 26 08:26:27.471250 (XEN) X15: 0000000000000001 X16: 1fffe00005adff21 X17: 0000000000000000 Apr 26 08:26:27.483199 (XEN) X18: ffff8000b0d9bc58 X19: 00000a00003625b8 X20: 0000000000000055 Apr 26 08:26:27.483264 (XEN) X21: 00000a0000330a00 X22: 0000000000200000 X23: 0000000000000055 Apr 26 08:26:27.495149 (XEN) X24: 0000000000000055 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:27.495212 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd87fe60 Apr 26 08:26:27.507131 (XEN) Apr 26 08:26:27.507177 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:27.507221 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:27.519211 (XEN) Apr 26 08:26:27.519264 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:27.519309 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:27.519352 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:27.519395 (XEN) Apr 26 08:26:27.519434 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:27.531151 (XEN) HPFAR_EL2: 0000008010803b00 Apr 26 08:26:27.531208 (XEN) FAR_EL2: ffff800082bb0100 Apr 26 08:26:27.531252 (XEN) Apr 26 08:26:27.531292 (XEN) Xen stack trace from sp=0000800ffd87fe60: Apr 26 08:26:27.543109 (XEN) 0000800ffd87fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:27.543163 (XEN) 0000000000000055 0000000000000000 0000000000000000 0000000000010205 Apr 26 08:26:27.555185 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.555248 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.567167 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.579162 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.579226 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.591115 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.591171 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.603179 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.603241 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.615169 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.615250 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.627171 (XEN) Xen call trace: Apr 26 08:26:27.627228 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:27.639202 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:27.639266 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:27.651190 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:27.651253 (XEN) Apr 26 08:26:27.651294 (XEN) *** Dumping CPU86 host state: *** Apr 26 08:26:27.651344 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:27.663113 (XEN) CPU: 86 Apr 26 08:26:27.663160 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:27.663209 (XEN) LR: 00000a000026d098 Apr 26 08:26:27.675116 (XEN) SP: 0000800ffd877e60 Apr 26 08:26:27.675163 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:27.675212 (XEN) X0: 0000000000000000 X1: 0000760ffd5c2000 X2: 0000800ffd8ea048 Apr 26 08:26:27.687194 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:27.687261 (XEN) X6: 00000a00003625b0 X7: 0000800ffd8e8150 X8: 0000000000000012 Apr 26 08:26:27.699126 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:27.711099 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:27.711153 (XEN) X15: 0000000000000001 X16: 00000000deadbeef X17: 0000000000000000 Apr 26 08:26:27.723179 (XEN) X18: ffff8000b0b03c58 X19: 00000a00003625b8 X20: 0000000000000056 Apr 26 08:26:27.723243 (XEN) X21: 00000a0000330a80 X22: 0000000000400000 X23: 0000000000000056 Apr 26 08:26:27.735215 (XEN) X24: 0000000000000056 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:27.735279 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd877e60 Apr 26 08:26:27.747162 (XEN) Apr 26 08:26:27.747215 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:27.747260 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:27.747304 (XEN) Apr 26 08:26:27.759101 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:27.759150 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:27.759193 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:27.759236 (XEN) Apr 26 08:26:27.759275 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:27.771147 (XEN) HPFAR_EL2: 0000008010804700 Apr 26 08:26:27.771197 (XEN) FAR_EL2: ffff800082c70100 Apr 26 08:26:27.771241 (XEN) Apr 26 08:26:27.771280 (XEN) Xen stack trace from sp=0000800ffd877e60: Apr 26 08:26:27.783179 (XEN) 0000800ffd877e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:27.783243 (XEN) 0000000000000056 0000000000000000 0000000000000000 0000000000010206 Apr 26 08:26:27.795106 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.795160 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.807190 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.807254 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.819190 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.831126 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.831181 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.843149 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.843212 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.855049 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.855049 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:27.867007 (XEN) Xen call trace: Apr 26 08:26:27.867007 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:27.879042 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:27.879042 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:27.879042 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:27.891139 (XEN) Apr 26 08:26:27.891197 (XEN) *** Dumping CPU87 host state: *** Apr 26 08:26:27.891243 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:27.903045 (XEN) CPU: 87 Apr 26 08:26:27.903045 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:27.903045 (XEN) LR: 00000a000026d098 Apr 26 08:26:27.903045 (XEN) SP: 0000800ffd867e60 Apr 26 08:26:27.915028 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:27.915028 (XEN) X0: 0000000000000000 X1: 0000760ffd546000 X2: 0000800ffd86e048 Apr 26 08:26:27.927042 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:27.927042 (XEN) X6: 00000a00003625b0 X7: 0000800ffd8e8590 X8: 0000000000000012 Apr 26 08:26:27.939008 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:27.939008 (XEN) X12: 0000000000000001 X13: 0000000000000307 X14: 0000000000000307 Apr 26 08:26:27.951076 (XEN) X15: 0000aaaad0d03190 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:27.963071 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 0000000000000057 Apr 26 08:26:27.963071 (XEN) X21: 00000a0000330b00 X22: 0000000000800000 X23: 0000000000000057 Apr 26 08:26:27.975082 (XEN) X24: 0000000000000057 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:27.975082 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800ffd867e60 Apr 26 08:26:27.987067 (XEN) Apr 26 08:26:27.987067 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:27.987067 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:27.987067 (XEN) Apr 26 08:26:27.987067 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:27.999043 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:27.999043 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:27.999043 (XEN) Apr 26 08:26:27.999043 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:28.011012 (XEN) HPFAR_EL2: 0000008010805300 Apr 26 08:26:28.011012 (XEN) FAR_EL2: ffff800082d30100 Apr 26 08:26:28.011012 (XEN) Apr 26 08:26:28.011012 (XEN) Xen stack trace from sp=0000800ffd867e60: Apr 26 08:26:28.011012 (XEN) 0000800ffd867e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:28.023031 (XEN) 0000000000000057 0000000000000000 0000000000000000 0000000000010207 Apr 26 08:26:28.035054 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.035054 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.047031 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.047031 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.059041 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.059041 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.071011 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.083045 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.083045 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.094999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.094999 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.107068 (XEN) Xen call trace: Apr 26 08:26:28.107068 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:28.107068 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:28.119010 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:28.119010 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:28.131005 (XEN) Apr 26 08:26:28.131005 (XEN) *** Dumping CPU88 host state: *** Apr 26 08:26:28.131005 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:28.143041 (XEN) CPU: 88 Apr 26 08:26:28.143041 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:28.143041 (XEN) LR: 00000a000026d098 Apr 26 08:26:28.143041 (XEN) SP: 0000800feb7ffe60 Apr 26 08:26:28.155070 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:28.155070 (XEN) X0: 0000000000000000 X1: 0000760ffd542000 X2: 0000800ffd86a048 Apr 26 08:26:28.167055 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:28.167055 (XEN) X6: 00000a00003625b0 X7: 0000800ffd8e8a50 X8: 0000000000000012 Apr 26 08:26:28.179015 (XEN) X9: 0000000000000080 X10: 0000000000000a10 X11: 0000000000000000 Apr 26 08:26:28.179015 (XEN) X12: 0000000000000001 X13: 000000000000019e X14: 000000000000019e Apr 26 08:26:28.191018 (XEN) X15: 0000000000000001 X16: 1fffe00004d5ea21 X17: 0000000000000000 Apr 26 08:26:28.191018 (XEN) X18: ffff8000b0ea3c58 X19: 00000a00003625b8 X20: 0000000000000058 Apr 26 08:26:28.203155 (XEN) X21: 00000a0000330b80 X22: 0000000001000000 X23: 0000000000000058 Apr 26 08:26:28.212793 (XEN) X24: 0000000000000058 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:28.212850 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb7ffe60 Apr 26 08:26:28.224839 (XEN) Apr 26 08:26:28.224887 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:28.224931 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:28.224974 (XEN) Apr 26 08:26:28.225013 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:28.236851 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:28.236909 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:28.236954 (XEN) Apr 26 08:26:28.236993 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:28.248864 (XEN) HPFAR_EL2: 0000008010805f00 Apr 26 08:26:28.248922 (XEN) FAR_EL2: ffff800082df0100 Apr 26 08:26:28.248967 (XEN) Apr 26 08:26:28.249006 (XEN) Xen stack trace from sp=0000800feb7ffe60: Apr 26 08:26:28.249052 (XEN) 0000800feb7ffe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:28.260867 (XEN) 0000000000000058 0000000000000000 0000000000000000 0000000000010208 Apr 26 08:26:28.272849 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.272912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.284854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.284916 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.296855 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.296918 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.308860 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.320912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.320975 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.332890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.332952 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.344869 (XEN) Xen call trace: Apr 26 08:26:28.344925 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:28.344976 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:28.356882 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:28.356944 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:28.368881 (XEN) Apr 26 08:26:28.368941 (XEN) *** Dumping CPU89 host state: *** Apr 26 08:26:28.368991 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:28.380867 (XEN) CPU: 89 Apr 26 08:26:28.380916 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:28.380964 (XEN) LR: 00000a000026d098 Apr 26 08:26:28.381006 (XEN) SP: 0000800feb7efe60 Apr 26 08:26:28.392857 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:28.392914 (XEN) X0: 0000000000000000 X1: 0000760ffd540000 X2: 0000800ffd868048 Apr 26 08:26:28.404889 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:28.404951 (XEN) X6: 00000a00003625b0 X7: 0000800feb7f6010 X8: 0000000000000012 Apr 26 08:26:28.416903 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:28.416965 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:28.428887 (XEN) X15: 0000000000000133 X16: 1fffe00004d9fca1 X17: 0000000000000000 Apr 26 08:26:28.428950 (XEN) X18: ffff8000b0c3bc58 X19: 00000a00003625b8 X20: 0000000000000059 Apr 26 08:26:28.440891 (XEN) X21: 00000a0000330c00 X22: 0000000002000000 X23: 0000000000000059 Apr 26 08:26:28.452875 (XEN) X24: 0000000000000059 X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:28.452938 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb7efe60 Apr 26 08:26:28.464887 (XEN) Apr 26 08:26:28.464941 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:28.464987 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:28.465031 (XEN) Apr 26 08:26:28.465069 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:28.476895 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:28.476953 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:28.476997 (XEN) Apr 26 08:26:28.477037 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:28.477081 (XEN) HPFAR_EL2: 0000009010800b00 Apr 26 08:26:28.488890 (XEN) FAR_EL2: ffff8000830b0100 Apr 26 08:26:28.488949 (XEN) Apr 26 08:26:28.488989 (XEN) Xen stack trace from sp=0000800feb7efe60: Apr 26 08:26:28.489035 (XEN) 0000800feb7efe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:28.500890 (XEN) 0000000000000059 0000000000000000 0000000000000000 0000000000010209 Apr 26 08:26:28.512873 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.512937 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.524884 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.524947 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.536879 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.536941 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.548840 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.548895 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.560738 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.560768 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.572761 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.584854 (XEN) Xen call trace: Apr 26 08:26:28.584910 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:28.584962 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:28.596763 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:28.596793 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:28.596818 (XEN) Apr 26 08:26:28.596840 (XEN) *** Dumping CPU90 host state: *** Apr 26 08:26:28.608761 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:28.608791 (XEN) CPU: 90 Apr 26 08:26:28.608814 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:28.620780 (XEN) LR: 00000a000026d098 Apr 26 08:26:28.620837 (XEN) SP: 0000800feb7e7e60 Apr 26 08:26:28.620863 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:28.632795 (XEN) X0: 0000000000000000 X1: 0000760feb4cc000 X2: 0000800feb7f4048 Apr 26 08:26:28.632830 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:28.644773 (XEN) X6: 00000a00003625b0 X7: 0000800feb7f6410 X8: 0000000000000012 Apr 26 08:26:28.644808 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:28.656765 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:28.668891 (XEN) X15: 0000000000000000 X16: 1fffe00004f1c2a1 X17: 0000000000000000 Apr 26 08:26:28.668954 (XEN) X18: ffff8000ae223c58 X19: 00000a00003625b8 X20: 000000000000005a Apr 26 08:26:28.680866 (XEN) X21: 00000a0000330c80 X22: 0000000004000000 X23: 000000000000005a Apr 26 08:26:28.680922 (XEN) X24: 000000000000005a X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:28.692762 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb7e7e60 Apr 26 08:26:28.692792 (XEN) Apr 26 08:26:28.692814 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:28.704755 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:28.704782 (XEN) Apr 26 08:26:28.704803 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:28.704827 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:28.716782 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:28.716830 (XEN) Apr 26 08:26:28.716867 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:28.716908 (XEN) HPFAR_EL2: 0000009010801700 Apr 26 08:26:28.716949 (XEN) FAR_EL2: ffff800083170100 Apr 26 08:26:28.728807 (XEN) Apr 26 08:26:28.728851 (XEN) Xen stack trace from sp=0000800feb7e7e60: Apr 26 08:26:28.728896 (XEN) 0000800feb7e7e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:28.740803 (XEN) 000000000000005a 0000000000000000 0000000000000000 000000000001020a Apr 26 08:26:28.740853 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.752819 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.752871 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.764817 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.764867 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.776897 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.788760 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.788795 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.800903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.800965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.812903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.812965 (XEN) Xen call trace: Apr 26 08:26:28.824875 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:28.824939 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:28.836901 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:28.836964 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:28.837011 (XEN) Apr 26 08:26:28.837051 (XEN) *** Dumping CPU91 host state: *** Apr 26 08:26:28.848917 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:28.848981 (XEN) CPU: 91 Apr 26 08:26:28.849024 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:28.860783 (XEN) LR: 00000a000026d098 Apr 26 08:26:28.860815 (XEN) SP: 0000800feb77fe60 Apr 26 08:26:28.860839 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:28.872900 (XEN) X0: 0000000000000000 X1: 0000760feb4c8000 X2: 0000800feb7f0048 Apr 26 08:26:28.872994 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:28.884892 (XEN) X6: 00000a00003625b0 X7: 0000800feb7f68d0 X8: 0000000000000012 Apr 26 08:26:28.884956 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:28.896897 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:28.896960 (XEN) X15: 0000000000000001 X16: 1fffe00004f13f41 X17: 0000000000000000 Apr 26 08:26:28.908812 (XEN) X18: ffff8000adb23c58 X19: 00000a00003625b8 X20: 000000000000005b Apr 26 08:26:28.920899 (XEN) X21: 00000a0000330d00 X22: 0000000008000000 X23: 000000000000005b Apr 26 08:26:28.920962 (XEN) X24: 000000000000005b X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:28.932802 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb77fe60 Apr 26 08:26:28.932852 (XEN) Apr 26 08:26:28.932885 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:28.944891 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:28.944950 (XEN) Apr 26 08:26:28.944991 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:28.945034 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:28.945079 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:28.956917 (XEN) Apr 26 08:26:28.956971 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:28.957016 (XEN) HPFAR_EL2: 0000009010802300 Apr 26 08:26:28.957059 (XEN) FAR_EL2: ffff800083230100 Apr 26 08:26:28.968912 (XEN) Apr 26 08:26:28.968966 (XEN) Xen stack trace from sp=0000800feb77fe60: Apr 26 08:26:28.969014 (XEN) 0000800feb77fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:28.980900 (XEN) 000000000000005b 0000000000000000 0000000000000000 000000000001020b Apr 26 08:26:28.980965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.992854 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:28.992888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.004880 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.004942 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.016899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.016962 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.028906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.040904 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.040967 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.052901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.052964 (XEN) Xen call trace: Apr 26 08:26:29.053008 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:29.064908 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:29.064971 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:29.076785 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:29.076818 (XEN) Apr 26 08:26:29.076840 (XEN) *** Dumping CPU92 host state: *** Apr 26 08:26:29.088898 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:29.088962 (XEN) CPU: 92 Apr 26 08:26:29.089003 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:29.100915 (XEN) LR: 00000a000026d098 Apr 26 08:26:29.100972 (XEN) SP: 0000800feb76fe60 Apr 26 08:26:29.101016 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:29.112916 (XEN) X0: 0000000000000000 X1: 0000760feb44e000 X2: 0000800feb776048 Apr 26 08:26:29.112969 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:29.124901 (XEN) X6: 00000a00003625b0 X7: 0000800feb7f6d90 X8: 0000000000000012 Apr 26 08:26:29.125008 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:29.136912 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:29.136974 (XEN) X15: 0000000000000001 X16: 1fffe00004de0d61 X17: 0000000000000000 Apr 26 08:26:29.148899 (XEN) X18: ffff80009855bc58 X19: 00000a00003625b8 X20: 000000000000005c Apr 26 08:26:29.148963 (XEN) X21: 00000a0000330d80 X22: 0000000010000000 X23: 000000000000005c Apr 26 08:26:29.160909 (XEN) X24: 000000000000005c X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:29.172897 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb76fe60 Apr 26 08:26:29.172960 (XEN) Apr 26 08:26:29.173001 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:29.173044 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:29.184903 (XEN) Apr 26 08:26:29.184957 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:29.185002 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:29.185046 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:29.196894 (XEN) Apr 26 08:26:29.196947 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:29.196992 (XEN) HPFAR_EL2: 0000009010802f00 Apr 26 08:26:29.197037 (XEN) FAR_EL2: ffff8000832f0100 Apr 26 08:26:29.197080 (XEN) Apr 26 08:26:29.197120 (XEN) Xen stack trace from sp=0000800feb76fe60: Apr 26 08:26:29.208883 (XEN) 0000800feb76fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:29.208946 (XEN) 000000000000005c 0000000000000000 0000000000000000 000000000001020c Apr 26 08:26:29.220905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.232896 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.232959 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.244888 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.244922 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.256877 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.256940 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.268811 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.268866 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.280912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.292898 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.292961 (XEN) Xen call trace: Apr 26 08:26:29.293004 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:29.304910 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:29.304973 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:29.316911 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:29.316970 (XEN) Apr 26 08:26:29.317011 (XEN) *** Dumping CPU93 host state: *** Apr 26 08:26:29.317056 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:29.328915 (XEN) CPU: 93 Apr 26 08:26:29.328970 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:29.329020 (XEN) LR: 00000a000026d098 Apr 26 08:26:29.340899 (XEN) SP: 0000800feb767e60 Apr 26 08:26:29.340956 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:29.341008 (XEN) X0: 0000000000000000 X1: 0000760feb44a000 X2: 0000800feb772048 Apr 26 08:26:29.352896 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:29.364790 (XEN) X6: 00000a00003625b0 X7: 0000800feb774280 X8: 0000000000000012 Apr 26 08:26:29.364842 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:29.376813 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:29.376881 (XEN) X15: 000000000000036f X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:29.388823 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000005d Apr 26 08:26:29.388875 (XEN) X21: 00000a0000330e00 X22: 0000000020000000 X23: 000000000000005d Apr 26 08:26:29.400821 (XEN) X24: 000000000000005d X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:29.400875 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb767e60 Apr 26 08:26:29.412822 (XEN) Apr 26 08:26:29.412864 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:29.412908 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:29.424902 (XEN) Apr 26 08:26:29.424956 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:29.425001 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:29.425045 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:29.425090 (XEN) Apr 26 08:26:29.425129 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:29.436907 (XEN) HPFAR_EL2: 0000009010803b00 Apr 26 08:26:29.436964 (XEN) FAR_EL2: ffff8000833b0100 Apr 26 08:26:29.437009 (XEN) Apr 26 08:26:29.437048 (XEN) Xen stack trace from sp=0000800feb767e60: Apr 26 08:26:29.448896 (XEN) 0000800feb767e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:29.448959 (XEN) 000000000000005d 0000000000000000 0000000000000000 000000000001020d Apr 26 08:26:29.460882 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.460945 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.472858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.484920 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.484983 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.496902 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.496964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.508903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.508965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.520849 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.520912 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.532857 (XEN) Xen call trace: Apr 26 08:26:29.532913 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:29.544900 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:29.544964 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:29.556852 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:29.556912 (XEN) Apr 26 08:26:29.556952 (XEN) *** Dumping CPU94 host state: *** Apr 26 08:26:29.556997 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:29.568915 (XEN) CPU: 94 Apr 26 08:26:29.568970 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:29.569020 (XEN) LR: 00000a000026d098 Apr 26 08:26:29.580815 (XEN) SP: 0000800feb717e60 Apr 26 08:26:29.580864 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:29.580917 (XEN) X0: 0000000000000000 X1: 0000760feb3f6000 X2: 0000800feb71e048 Apr 26 08:26:29.592900 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:29.592963 (XEN) X6: 00000a00003625b0 X7: 0000800feb774740 X8: 0000000000000012 Apr 26 08:26:29.604920 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:29.616907 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:29.616971 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:29.628780 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000005e Apr 26 08:26:29.628838 (XEN) X21: 00000a0000330e80 X22: 0000000040000000 X23: 000000000000005e Apr 26 08:26:29.640910 (XEN) X24: 000000000000005e X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:29.640974 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb717e60 Apr 26 08:26:29.652928 (XEN) Apr 26 08:26:29.652957 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:29.652982 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:29.653006 (XEN) Apr 26 08:26:29.664910 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:29.664969 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:29.665014 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:29.665057 (XEN) Apr 26 08:26:29.665096 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:29.676899 (XEN) HPFAR_EL2: 0000009010804700 Apr 26 08:26:29.676958 (XEN) FAR_EL2: ffff800083470100 Apr 26 08:26:29.677002 (XEN) Apr 26 08:26:29.677041 (XEN) Xen stack trace from sp=0000800feb717e60: Apr 26 08:26:29.688900 (XEN) 0000800feb717e70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:29.688964 (XEN) 000000000000005e 0000000000000000 0000000000000000 000000000001020e Apr 26 08:26:29.700899 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.700961 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.712905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.712968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.724905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.736901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.736963 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.748913 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.748976 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.760903 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.760965 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.772886 (XEN) Xen call trace: Apr 26 08:26:29.772917 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:29.784904 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:29.784967 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:29.785016 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:29.796909 (XEN) Apr 26 08:26:29.796963 (XEN) *** Dumping CPU95 host state: *** Apr 26 08:26:29.797009 (XEN) ----[ Xen-4.19-unstable arm64 debug=y Not tainted ]---- Apr 26 08:26:29.808903 (XEN) CPU: 95 Apr 26 08:26:29.808958 (XEN) PC: 00000a000026d0b4 domain.c#idle_loop+0x128/0x190 Apr 26 08:26:29.809009 (XEN) LR: 00000a000026d098 Apr 26 08:26:29.809052 (XEN) SP: 0000800feb70fe60 Apr 26 08:26:29.820907 (XEN) CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) Apr 26 08:26:29.820972 (XEN) X0: 0000000000000000 X1: 0000760feb3f4000 X2: 0000800feb71c048 Apr 26 08:26:29.832879 (XEN) X3: ffffffffffffff9e X4: 0000000000000000 X5: 00000a00003625a8 Apr 26 08:26:29.832942 (XEN) X6: 00000a00003625b0 X7: 0000800feb774c00 X8: 0000000000000012 Apr 26 08:26:29.844882 (XEN) X9: 0000000000000080 X10: 7f7f7f7f7f7f7f7f X11: 0101010101010101 Apr 26 08:26:29.844945 (XEN) X12: 0000000000000008 X13: 0000000000000020 X14: 0000000000000000 Apr 26 08:26:29.856926 (XEN) X15: 0000000000000000 X16: 0000000000000000 X17: 0000000000000000 Apr 26 08:26:29.868896 (XEN) X18: 0000000000000000 X19: 00000a00003625b8 X20: 000000000000005f Apr 26 08:26:29.868959 (XEN) X21: 00000a0000330f00 X22: 0000000080000000 X23: 000000000000005f Apr 26 08:26:29.880885 (XEN) X24: 000000000000005f X25: 0000000000000000 X26: 0000000000000000 Apr 26 08:26:29.880949 (XEN) X27: 0000000000000000 X28: 0000000000000000 FP: 0000800feb70fe60 Apr 26 08:26:29.892938 (XEN) Apr 26 08:26:29.892993 (XEN) VTCR_EL2: 00000000800d3590 Apr 26 08:26:29.893039 (XEN) VTTBR_EL2: 00010107eb700000 Apr 26 08:26:29.893082 (XEN) Apr 26 08:26:29.893120 (XEN) SCTLR_EL2: 0000000030cd183d Apr 26 08:26:29.904911 (XEN) HCR_EL2: 00000000807c663f Apr 26 08:26:29.904970 (XEN) TTBR0_EL2: 000001071e3dd000 Apr 26 08:26:29.905015 (XEN) Apr 26 08:26:29.905054 (XEN) ESR_EL2: 0000000007e00000 Apr 26 08:26:29.916896 (XEN) HPFAR_EL2: 0000009010805100 Apr 26 08:26:29.916955 (XEN) FAR_EL2: ffff800083510100 Apr 26 08:26:29.916999 (XEN) Apr 26 08:26:29.917038 (XEN) Xen stack trace from sp=0000800feb70fe60: Apr 26 08:26:29.917084 (XEN) 0000800feb70fe70 00000a0000279908 00000a0000329320 00000a00003625d8 Apr 26 08:26:29.928858 (XEN) 000000000000005f 0000000000000000 0000000000000000 000000000001020f Apr 26 08:26:29.940858 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.940914 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.952906 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.952969 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.964909 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.964971 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.976890 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.988901 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:29.988964 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:30.000905 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:30.000968 (XEN) 0000000000000000 0000000000000000 0000000000000000 0000000000000000 Apr 26 08:26:30.012903 (XEN) Xen call trace: Apr 26 08:26:30.012959 (XEN) [<00000a000026d0b4>] domain.c#idle_loop+0x128/0x190 (PC) Apr 26 08:26:30.013011 (XEN) [<00000a000026d098>] domain.c#idle_loop+0x10c/0x190 (LR) Apr 26 08:26:30.024773 (XEN) [<00000a0000279908>] start_secondary+0x21c/0x220 Apr 26 08:26:30.024807 (XEN) [<00000a00003625d8>] 00000a00003625d8 Apr 26 08:26:30.036862 (XEN) Apr 26 08:26:30.036916 Apr 26 08:26:35.951222 (XEN) 'q' pressed -> dumping domain info (now = 1619373929570) Apr 26 08:26:35.968894 (XEN) General information for domain 0: Apr 26 08:26:35.968952 (XEN) refcnt=3 dying=0 pa Apr 26 08:26:35.971240 use_count=0 Apr 26 08:26:35.980869 (XEN) nr_pages=131072 xenheap_pages=2 dirty_cpus={} max_pages=131072 Apr 26 08:26:35.980930 (XEN) handle=00000000-0000-0000-0000-000000000000 vm_assist=00000020 Apr 26 08:26:35.992874 (XEN) p2m mappings for domain 0 (vmid 1): Apr 26 08:26:35.992933 (XEN) 1G mappings: 4984 (shattered 3) Apr 26 08:26:35.992978 (XEN) 2M mappings: 1444380 (shattered 170) Apr 26 08:26:36.004849 (XEN) 4K mappings: 87056 Apr 26 08:26:36.004907 (XEN) Rangesets belonging to domain 0: Apr 26 08:26:36.004952 (XEN) Interrupts { 32, 38, 48-51 } Apr 26 08:26:36.004997 (XEN) I/O Memory { 802000000-808000000, 810000000-820000000, 838000000-844000000, 846000000-848002000, 849000000-849002000, 84a000000-84a002000, 84b000000-84b002000, 868000000-880000000, 88001f000-880058000, 881010000-883000010, 902000000-908000000, 910000000-920000000, 938000000-944000000, 946000000-948002000, 949000000-949002000, 94a000000-94a002000, 94b000000-94b002000, 968000000-980000000 } Apr 26 08:26:36.040921 (XEN) NODE affinity for domain 0: [0] Apr 26 08:26:36.052902 (XEN) VCPU information and callbacks for domain 0: Apr 26 08:26:36.052963 (XEN) UNIT0 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.053011 (XEN) VCPU0: CPU19 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.064935 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.064995 (XEN) GICH_LRs (vcpu 0) mask=0 Apr 26 08:26:36.065039 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.076906 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.076962 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.077004 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.077045 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.077085 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.077126 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.088901 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.088957 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.088999 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.089040 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.089081 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.100897 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.100954 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.100996 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.101037 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.101077 (XEN) No periodic timer Apr 26 08:26:36.101119 (XEN) UNIT1 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.112908 (XEN) VCPU1: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.112972 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.124902 (XEN) GICH_LRs (vcpu 1) mask=0 Apr 26 08:26:36.124960 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.125002 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.125043 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.125084 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.125124 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.136901 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.136957 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.137000 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.137041 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.137081 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.137121 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.148913 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.148969 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.149011 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.149052 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.149093 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.149133 (XEN) No periodic timer Apr 26 08:26:36.160898 (XEN) UNIT2 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.160959 (XEN) VCPU2: CPU33 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.172897 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.172956 (XEN) GICH_LRs (vcpu 2) mask=0 Apr 26 08:26:36.173000 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.173041 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.184902 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.184958 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.185000 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.185041 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.185081 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.185120 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.196894 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.196950 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.196992 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.197033 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.197074 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.197114 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.208899 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.208955 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.208998 (XEN) No periodic timer Apr 26 08:26:36.209040 (XEN) UNIT3 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.209087 (XEN) VCPU3: CPU34 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.220912 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.220969 (XEN) GICH_LRs (vcpu 3) mask=0 Apr 26 08:26:36.221013 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.232890 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.232945 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.232989 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.233030 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.233071 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.233112 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.244890 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.244946 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.244988 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.245029 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.245070 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.245111 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.256905 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.256961 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.257003 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.257062 (XEN) No periodic timer Apr 26 08:26:36.257107 (XEN) UNIT4 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.268912 (XEN) VCPU4: CPU70 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.268976 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.280895 (XEN) GICH_LRs (vcpu 4) mask=0 Apr 26 08:26:36.280955 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.280998 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.281038 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.281079 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.281119 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.292886 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.292941 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.292984 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.293024 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.293065 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.304905 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.304961 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.305004 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.305045 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.305085 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.305126 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.316903 (XEN) No periodic timer Apr 26 08:26:36.316959 (XEN) UNIT5 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.317007 (XEN) VCPU5: CPU78 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.328789 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.328821 (XEN) GICH_LRs (vcpu 5) mask=0 Apr 26 08:26:36.328845 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.328868 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.328890 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.340788 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.340819 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.340842 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.340865 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.340888 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.340910 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.352786 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.352816 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.352839 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.352862 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.352884 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.364788 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.364819 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.364842 (XEN) No periodic timer Apr 26 08:26:36.364865 (XEN) UNIT6 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.364890 (XEN) VCPU6: CPU3 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.376787 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.376819 (XEN) GICH_LRs (vcpu 6) mask=0 Apr 26 08:26:36.376844 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.388787 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.388819 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.388842 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.388865 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.388887 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.388910 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.400786 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.400817 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.400841 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.400863 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.400886 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.400909 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.412906 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.412966 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.413010 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.413054 (XEN) No periodic timer Apr 26 08:26:36.413096 (XEN) UNIT7 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.424907 (XEN) VCPU7: CPU25 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.424971 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.436904 (XEN) GICH_LRs (vcpu 7) mask=0 Apr 26 08:26:36.436963 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.437007 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.437050 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.437092 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.448904 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.448962 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.449004 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.449046 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.449087 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.449128 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.460900 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.460957 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.461035 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.461080 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.461121 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.461161 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.472896 (XEN) No periodic timer Apr 26 08:26:36.472955 (XEN) UNIT8 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.473004 (XEN) VCPU8: CPU35 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.484881 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.484940 (XEN) GICH_LRs (vcpu 8) mask=0 Apr 26 08:26:36.484986 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.485027 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.485068 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.496902 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.496957 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.497000 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.497041 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.497082 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.497122 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.508903 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.508959 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.509002 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.509043 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.509086 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.509128 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.520908 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.520964 (XEN) No periodic timer Apr 26 08:26:36.521007 (XEN) UNIT9 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.521055 (XEN) VCPU9: CPU57 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.532857 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.532916 (XEN) GICH_LRs (vcpu 9) mask=0 Apr 26 08:26:36.532962 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.544776 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.544807 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.544830 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.544853 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.544875 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.556879 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.556935 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.556978 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.557020 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.557060 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.557101 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.568854 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.568901 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.568943 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.568984 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.569025 (XEN) No periodic timer Apr 26 08:26:36.569067 (XEN) UNIT10 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.580862 (XEN) VCPU10: CPU74 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.580918 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.592844 (XEN) GICH_LRs (vcpu 10) mask=0 Apr 26 08:26:36.592894 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.592935 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.592975 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.593016 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.604846 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.604895 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.604936 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.604976 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.605016 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.605057 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.616851 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.616901 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.616942 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.616984 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.617024 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.617065 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.628902 (XEN) No periodic timer Apr 26 08:26:36.628959 (XEN) UNIT11 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.629008 (XEN) VCPU11: CPU82 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.640901 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.640961 (XEN) GICH_LRs (vcpu 11) mask=0 Apr 26 08:26:36.641007 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.641050 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.641091 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.652906 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.652963 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.653006 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.653048 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.653112 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.653156 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.664915 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.664973 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.665017 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.665060 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.665104 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.676852 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.676909 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.676954 (XEN) No periodic timer Apr 26 08:26:36.676997 (XEN) UNIT12 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.688896 (XEN) VCPU12: CPU4 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.688963 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.689010 (XEN) GICH_LRs (vcpu 12) mask=0 Apr 26 08:26:36.700898 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.700956 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.701000 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.701043 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.701084 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.701127 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.712907 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.712964 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.713006 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.713048 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.713089 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.713132 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.724904 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.724962 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.725007 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.725048 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.725092 (XEN) No periodic timer Apr 26 08:26:36.725135 (XEN) UNIT13 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.736913 (XEN) VCPU13: CPU26 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.736979 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.748916 (XEN) GICH_LRs (vcpu 13) mask=0 Apr 26 08:26:36.748976 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.749021 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.749064 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.749108 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.760906 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.760964 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.761007 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.761049 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.761092 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.761135 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.772894 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.772951 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.772994 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.773037 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.773080 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.773122 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.784900 (XEN) No periodic timer Apr 26 08:26:36.784959 (XEN) UNIT14 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.785008 (XEN) VCPU14: CPU39 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.796893 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.796952 (XEN) GICH_LRs (vcpu 14) mask=0 Apr 26 08:26:36.796997 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.797038 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.808904 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.808962 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.809006 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.809047 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.809090 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.809133 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.820896 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.820954 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.820996 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.821039 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.821080 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.821123 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.832906 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.832961 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.833005 (XEN) No periodic timer Apr 26 08:26:36.833048 (XEN) UNIT15 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.844901 (XEN) VCPU15: CPU51 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.844968 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.845014 (XEN) GICH_LRs (vcpu 15) mask=0 Apr 26 08:26:36.856897 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.856954 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.856997 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.857057 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.857101 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.857142 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.868915 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.868970 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.869013 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.869054 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.869095 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.869135 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.880898 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.880954 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.880996 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.881039 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.881080 (XEN) No periodic timer Apr 26 08:26:36.881121 (XEN) UNIT16 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.892912 (XEN) VCPU16: CPU83 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.892977 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.904903 (XEN) GICH_LRs (vcpu 16) mask=0 Apr 26 08:26:36.904961 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.905004 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.905045 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.905086 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.916907 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.916963 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.917005 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.917047 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.917089 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.917130 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.928886 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.928944 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.928988 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.929030 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.929072 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.940899 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.940956 (XEN) No periodic timer Apr 26 08:26:36.941000 (XEN) UNIT17 affinities: hard={0-95} soft={0-95} Apr 26 08:26:36.941049 (XEN) VCPU17: CPU84 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:36.952872 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:36.952904 (XEN) GICH_LRs (vcpu 17) mask=0 Apr 26 08:26:36.952928 (XEN) VCPU_LR[0]=0 Apr 26 08:26:36.964788 (XEN) VCPU_LR[1]=0 Apr 26 08:26:36.964819 (XEN) VCPU_LR[2]=0 Apr 26 08:26:36.964842 (XEN) VCPU_LR[3]=0 Apr 26 08:26:36.964865 (XEN) VCPU_LR[4]=0 Apr 26 08:26:36.964888 (XEN) VCPU_LR[5]=0 Apr 26 08:26:36.964910 (XEN) VCPU_LR[6]=0 Apr 26 08:26:36.976790 (XEN) VCPU_LR[7]=0 Apr 26 08:26:36.976821 (XEN) VCPU_LR[8]=0 Apr 26 08:26:36.976844 (XEN) VCPU_LR[9]=0 Apr 26 08:26:36.976867 (XEN) VCPU_LR[10]=0 Apr 26 08:26:36.976889 (XEN) VCPU_LR[11]=0 Apr 26 08:26:36.976912 (XEN) VCPU_LR[12]=0 Apr 26 08:26:36.988783 (XEN) VCPU_LR[13]=0 Apr 26 08:26:36.988814 (XEN) VCPU_LR[14]=0 Apr 26 08:26:36.988837 (XEN) VCPU_LR[15]=0 Apr 26 08:26:36.988860 (XEN) No periodic timer Apr 26 08:26:36.988883 (XEN) UNIT18 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.000788 (XEN) VCPU18: CPU5 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.000823 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.000848 (XEN) GICH_LRs (vcpu 18) mask=0 Apr 26 08:26:37.012761 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.012792 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.012815 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.012838 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.012860 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.012882 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.024788 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.024818 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.024840 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.024863 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.024886 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.024908 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.036906 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.036963 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.037007 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.037049 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.037091 (XEN) No periodic timer Apr 26 08:26:37.048887 (XEN) UNIT19 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.048950 (XEN) VCPU19: CPU21 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.060906 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.060990 (XEN) GICH_LRs (vcpu 19) mask=0 Apr 26 08:26:37.061039 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.061081 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.061122 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.072900 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.072958 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.073000 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.073042 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.073083 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.073125 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.084900 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.084957 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.084999 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.085040 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.085082 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.085124 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.096821 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.096852 (XEN) No periodic timer Apr 26 08:26:37.096875 (XEN) UNIT20 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.096901 (XEN) VCPU20: CPU36 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.108912 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.108971 (XEN) GICH_LRs (vcpu 20) mask=0 Apr 26 08:26:37.109016 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.120897 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.120953 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.120995 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.121036 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.121077 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.121118 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.132920 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.132978 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.133021 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.133062 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.133103 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.133144 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.144916 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.144973 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.145017 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.145058 (XEN) No periodic timer Apr 26 08:26:37.145101 (XEN) UNIT21 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.156867 (XEN) VCPU21: CPU52 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.156932 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.156977 (XEN) GICH_LRs (vcpu 21) mask=0 Apr 26 08:26:37.168788 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.168819 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.168842 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.168864 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.168887 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.168909 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.180871 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.180927 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.180969 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.181010 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.181051 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.192866 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.192914 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.192956 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.192997 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.193037 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.204900 (XEN) No periodic timer Apr 26 08:26:37.204958 (XEN) UNIT22 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.205007 (XEN) VCPU22: CPU76 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.216899 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.216959 (XEN) GICH_LRs (vcpu 22) mask=0 Apr 26 08:26:37.217004 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.217047 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.217089 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.228903 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.228960 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.229002 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.229042 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.229084 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.229124 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.240910 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.240968 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.241010 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.241053 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.241095 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.241137 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.252904 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.252960 (XEN) No periodic timer Apr 26 08:26:37.253025 (XEN) UNIT23 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.253075 (XEN) VCPU23: CPU68 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.264917 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.264977 (XEN) GICH_LRs (vcpu 23) mask=0 Apr 26 08:26:37.265023 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.276896 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.276954 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.276998 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.277040 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.277083 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.277123 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.288899 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.288956 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.289000 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.289042 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.289084 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.289126 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.300888 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.300945 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.300989 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.301030 (XEN) No periodic timer Apr 26 08:26:37.301073 (XEN) UNIT24 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.312899 (XEN) VCPU24: CPU6 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.312965 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.324904 (XEN) GICH_LRs (vcpu 24) mask=0 Apr 26 08:26:37.324963 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.325006 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.325047 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.325090 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.336898 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.336958 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.337001 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.337043 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.337085 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.337126 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.348898 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.348956 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.349001 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.349042 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.349084 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.349127 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.360849 (XEN) No periodic timer Apr 26 08:26:37.360907 (XEN) UNIT25 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.360956 (XEN) VCPU25: CPU22 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.372909 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.372969 (XEN) GICH_LRs (vcpu 25) mask=0 Apr 26 08:26:37.373016 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.373058 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.373100 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.384907 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.384963 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.385007 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.385048 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.385090 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.385132 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.396914 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.396971 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.397015 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.397056 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.397098 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.397139 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.408908 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.408964 (XEN) No periodic timer Apr 26 08:26:37.409009 (XEN) UNIT26 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.409057 (XEN) VCPU26: CPU86 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.420909 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.420968 (XEN) GICH_LRs (vcpu 26) mask=0 Apr 26 08:26:37.421014 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.432893 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.432951 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.432995 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.433037 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.433078 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.444896 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.444954 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.444999 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.445040 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.445082 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.445123 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.456927 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.456985 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.457028 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.457069 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.457111 (XEN) No periodic timer Apr 26 08:26:37.457154 (XEN) UNIT27 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.468906 (XEN) VCPU27: CPU56 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.468970 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.480912 (XEN) GICH_LRs (vcpu 27) mask=0 Apr 26 08:26:37.480972 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.481016 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.481058 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.481100 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.492913 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.492971 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.493015 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.493056 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.493098 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.493139 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.504894 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.504951 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.504994 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.505036 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.505078 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.505119 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.516903 (XEN) No periodic timer Apr 26 08:26:37.516960 (XEN) UNIT28 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.517008 (XEN) VCPU28: CPU73 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.528890 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.528949 (XEN) GICH_LRs (vcpu 28) mask=0 Apr 26 08:26:37.528994 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.529036 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.540890 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.540948 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.540992 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.541033 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.541074 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.541114 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.552906 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.552965 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.553008 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.553050 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.553090 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.553132 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.564887 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.564944 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.564987 (XEN) No periodic timer Apr 26 08:26:37.565029 (XEN) UNIT29 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.576905 (XEN) VCPU29: CPU20 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.576969 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.577014 (XEN) GICH_LRs (vcpu 29) mask=0 Apr 26 08:26:37.588896 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.588952 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.588996 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.589038 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.589079 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.589119 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.600897 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.600953 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.600994 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.601035 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.601078 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.601119 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.612907 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.612963 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.613005 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.613046 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.613086 (XEN) No periodic timer Apr 26 08:26:37.624894 (XEN) UNIT30 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.624958 (XEN) VCPU30: CPU8 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.625009 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.636909 (XEN) GICH_LRs (vcpu 30) mask=0 Apr 26 08:26:37.636967 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.637009 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.637049 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.637090 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.648903 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.648958 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.649001 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.649042 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.649101 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.649144 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.660908 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.660964 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.661007 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.661047 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.661087 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.661127 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.672897 (XEN) No periodic timer Apr 26 08:26:37.672953 (XEN) UNIT31 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.673001 (XEN) VCPU31: CPU23 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.684901 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.684959 (XEN) GICH_LRs (vcpu 31) mask=0 Apr 26 08:26:37.685004 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.696900 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.696956 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.696998 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.697039 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.697080 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.697120 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.708888 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.708945 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.708987 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.709028 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.709068 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.709108 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.720893 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.720948 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.720991 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.721032 (XEN) No periodic timer Apr 26 08:26:37.721074 (XEN) UNIT32 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.732901 (XEN) VCPU32: CPU38 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.732965 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.733010 (XEN) GICH_LRs (vcpu 32) mask=0 Apr 26 08:26:37.744908 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.744964 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.745006 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.745046 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.745087 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.745127 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.756892 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.756947 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.756989 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.757030 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.757071 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.757112 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.768924 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.768981 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.769023 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.769063 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.769104 (XEN) No periodic timer Apr 26 08:26:37.780900 (XEN) UNIT33 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.780962 (XEN) VCPU33: CPU54 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.781012 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.792904 (XEN) GICH_LRs (vcpu 33) mask=0 Apr 26 08:26:37.792961 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.793003 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.793044 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.793084 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.804908 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.804964 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.805006 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.805047 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.805087 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.805127 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.816894 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.816950 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.816992 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.817033 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.817074 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.828907 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.828962 (XEN) No periodic timer Apr 26 08:26:37.829005 (XEN) UNIT34 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.829052 (XEN) VCPU34: CPU18 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.840905 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.840963 (XEN) GICH_LRs (vcpu 34) mask=0 Apr 26 08:26:37.841007 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.852883 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.852939 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.853000 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.853044 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.853084 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.853124 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.864911 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.864968 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.865010 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.865051 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.865092 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.865132 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.876911 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.876967 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.877009 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.877050 (XEN) No periodic timer Apr 26 08:26:37.877092 (XEN) UNIT35 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.888896 (XEN) VCPU35: CPU87 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.888959 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.889004 (XEN) GICH_LRs (vcpu 35) mask=0 Apr 26 08:26:37.900901 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.900957 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.900999 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.901039 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.901079 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.912897 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.912989 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.913034 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.913076 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.913116 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.913157 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.924895 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.924951 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.924994 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.925035 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.925075 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.925115 (XEN) No periodic timer Apr 26 08:26:37.936891 (XEN) UNIT36 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.936952 (XEN) VCPU36: CPU7 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.948894 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.948952 (XEN) GICH_LRs (vcpu 36) mask=0 Apr 26 08:26:37.948997 (XEN) VCPU_LR[0]=0 Apr 26 08:26:37.949039 (XEN) VCPU_LR[1]=0 Apr 26 08:26:37.949079 (XEN) VCPU_LR[2]=0 Apr 26 08:26:37.960892 (XEN) VCPU_LR[3]=0 Apr 26 08:26:37.960948 (XEN) VCPU_LR[4]=0 Apr 26 08:26:37.960990 (XEN) VCPU_LR[5]=0 Apr 26 08:26:37.961031 (XEN) VCPU_LR[6]=0 Apr 26 08:26:37.961071 (XEN) VCPU_LR[7]=0 Apr 26 08:26:37.961112 (XEN) VCPU_LR[8]=0 Apr 26 08:26:37.972912 (XEN) VCPU_LR[9]=0 Apr 26 08:26:37.972968 (XEN) VCPU_LR[10]=0 Apr 26 08:26:37.973010 (XEN) VCPU_LR[11]=0 Apr 26 08:26:37.973051 (XEN) VCPU_LR[12]=0 Apr 26 08:26:37.973093 (XEN) VCPU_LR[13]=0 Apr 26 08:26:37.973133 (XEN) VCPU_LR[14]=0 Apr 26 08:26:37.984903 (XEN) VCPU_LR[15]=0 Apr 26 08:26:37.984958 (XEN) No periodic timer Apr 26 08:26:37.985001 (XEN) UNIT37 affinities: hard={0-95} soft={0-95} Apr 26 08:26:37.985047 (XEN) VCPU37: CPU24 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:37.996918 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:37.996976 (XEN) GICH_LRs (vcpu 37) mask=0 Apr 26 08:26:37.997021 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.008850 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.008905 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.008948 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.008988 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.009028 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.009068 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.020901 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.020957 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.020999 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.021039 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.021080 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.021121 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.032851 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.032907 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.032949 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.032989 (XEN) No periodic timer Apr 26 08:26:38.033030 (XEN) UNIT38 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.044903 (XEN) VCPU38: CPU40 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.044967 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.045031 (XEN) GICH_LRs (vcpu 38) mask=0 Apr 26 08:26:38.056906 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.056962 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.057005 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.057046 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.057087 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.068883 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.068940 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.068982 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.069024 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.069064 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.080906 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.080962 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.081005 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.081046 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.081087 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.081128 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.092899 (XEN) No periodic timer Apr 26 08:26:38.092955 (XEN) UNIT39 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.093004 (XEN) VCPU39: CPU58 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.104908 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.104966 (XEN) GICH_LRs (vcpu 39) mask=0 Apr 26 08:26:38.105011 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.105053 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.105093 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.116923 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.116978 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.117020 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.117061 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.117101 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.117141 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.128896 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.128952 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.128994 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.129034 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.129075 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.140904 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.140962 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.141004 (XEN) No periodic timer Apr 26 08:26:38.141046 (XEN) UNIT40 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.141092 (XEN) VCPU40: CPU77 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.152912 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.152970 (XEN) GICH_LRs (vcpu 40) mask=0 Apr 26 08:26:38.153015 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.164908 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.164963 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.165006 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.165046 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.165087 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.165127 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.176905 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.176960 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.177003 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.177044 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.177085 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.177125 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.188901 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.188957 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.189000 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.189041 (XEN) No periodic timer Apr 26 08:26:38.189083 (XEN) UNIT41 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.200895 (XEN) VCPU41: CPU88 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.200959 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.212898 (XEN) GICH_LRs (vcpu 41) mask=0 Apr 26 08:26:38.212955 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.212998 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.213038 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.213078 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.224895 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.224951 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.224993 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.225034 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.225074 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.225114 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.236884 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.236940 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.236983 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.237024 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.237065 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.237105 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.248909 (XEN) No periodic timer Apr 26 08:26:38.248986 (XEN) UNIT42 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.249037 (XEN) VCPU42: CPU9 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.260900 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.260958 (XEN) GICH_LRs (vcpu 42) mask=0 Apr 26 08:26:38.261002 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.261043 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.272897 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.272953 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.272996 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.273037 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.273077 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.273117 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.284895 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.284951 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.284994 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.285035 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.285075 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.285116 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.296900 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.296956 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.296999 (XEN) No periodic timer Apr 26 08:26:38.297041 (XEN) UNIT43 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.297089 (XEN) VCPU43: CPU85 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.308911 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.308969 (XEN) GICH_LRs (vcpu 43) mask=0 Apr 26 08:26:38.309013 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.320892 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.320947 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.320990 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.321030 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.321070 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.332897 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.332953 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.332995 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.333036 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.333076 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.333116 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.344903 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.344958 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.345000 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.345041 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.345081 (XEN) No periodic timer Apr 26 08:26:38.356885 (XEN) UNIT44 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.356948 (XEN) VCPU44: CPU40 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.356999 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.368909 (XEN) GICH_LRs (vcpu 44) mask=0 Apr 26 08:26:38.368967 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.369009 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.369050 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.369091 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.380895 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.380950 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.380993 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.381033 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.381073 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.381114 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.392898 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.392954 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.392996 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.393037 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.393077 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.393118 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.404907 (XEN) No periodic timer Apr 26 08:26:38.404963 (XEN) UNIT45 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.405011 (XEN) VCPU45: CPU59 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.416910 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.416968 (XEN) GICH_LRs (vcpu 45) mask=0 Apr 26 08:26:38.417012 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.417053 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.428911 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.428967 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.429009 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.429050 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.429091 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.429131 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.440893 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.440949 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.440991 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.441032 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.441073 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.441133 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.452885 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.452941 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.452983 (XEN) No periodic timer Apr 26 08:26:38.453025 (XEN) UNIT46 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.464898 (XEN) VCPU46: CPU72 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.464962 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.465007 (XEN) GICH_LRs (vcpu 46) mask=0 Apr 26 08:26:38.476910 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.476966 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.477008 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.477048 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.477089 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.477129 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.488912 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.488968 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.489009 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.489050 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.489090 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.489130 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.500900 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.500955 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.500997 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.501038 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.501078 (XEN) No periodic timer Apr 26 08:26:38.512906 (XEN) UNIT47 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.512968 (XEN) VCPU47: CPU89 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.513019 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.524898 (XEN) GICH_LRs (vcpu 47) mask=0 Apr 26 08:26:38.524956 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.524998 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.525039 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.525079 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.536900 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.536955 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.536997 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.537037 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.537078 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.537118 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.548900 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.548955 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.548997 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.549037 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.549078 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.549118 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.560898 (XEN) No periodic timer Apr 26 08:26:38.560954 (XEN) UNIT48 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.561002 (XEN) VCPU48: CPU10 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.572888 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.572945 (XEN) GICH_LRs (vcpu 48) mask=0 Apr 26 08:26:38.572990 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.584898 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.584954 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.584996 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.585036 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.585077 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.585117 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.596900 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.596956 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.596998 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.597038 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.597079 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.597120 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.608899 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.608955 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.608997 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.609038 (XEN) No periodic timer Apr 26 08:26:38.609080 (XEN) UNIT49 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.620914 (XEN) VCPU49: CPU27 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.620978 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.621023 (XEN) GICH_LRs (vcpu 49) mask=0 Apr 26 08:26:38.632900 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.632956 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.632998 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.633039 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.633079 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.644903 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.644959 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.645002 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.645063 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.645106 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.645147 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.656896 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.656952 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.656995 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.657037 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.657078 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.657118 (XEN) No periodic timer Apr 26 08:26:38.668907 (XEN) UNIT50 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.668968 (XEN) VCPU50: CPU41 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.669019 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.680909 (XEN) GICH_LRs (vcpu 50) mask=0 Apr 26 08:26:38.680967 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.681010 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.681051 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.681091 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.692895 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.692950 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.692992 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.693033 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.693074 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.693114 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.704894 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.704950 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.704991 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.705032 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.705073 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.716898 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.716953 (XEN) No periodic timer Apr 26 08:26:38.716996 (XEN) UNIT51 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.717042 (XEN) VCPU51: CPU60 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.728909 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.728968 (XEN) GICH_LRs (vcpu 51) mask=0 Apr 26 08:26:38.729012 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.740908 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.740963 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.741005 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.741045 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.741086 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.741126 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.752907 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.752963 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.753005 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.753045 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.753085 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.753125 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.764897 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.764953 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.764995 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.765035 (XEN) No periodic timer Apr 26 08:26:38.765077 (XEN) UNIT52 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.776899 (XEN) VCPU52: CPU75 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.776964 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.777009 (XEN) GICH_LRs (vcpu 52) mask=0 Apr 26 08:26:38.788896 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.788952 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.788994 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.789034 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.789074 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.800872 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.800927 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.800970 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.801010 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.801051 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.801091 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.812898 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.812954 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.812996 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.813037 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.813077 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.813117 (XEN) No periodic timer Apr 26 08:26:38.824904 (XEN) UNIT53 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.824965 (XEN) VCPU53: CPU92 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.836883 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.836942 (XEN) GICH_LRs (vcpu 53) mask=0 Apr 26 08:26:38.836987 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.837028 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.848902 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.848959 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.849021 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.849066 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.849106 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.849146 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.849186 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.860907 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.860962 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.861005 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.861045 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.861085 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.872905 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.872961 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.873003 (XEN) No periodic timer Apr 26 08:26:38.873046 (XEN) UNIT54 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.873092 (XEN) VCPU54: CPU11 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.884905 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.884963 (XEN) GICH_LRs (vcpu 54) mask=0 Apr 26 08:26:38.885008 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.896890 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.896946 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.896988 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.897029 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.897070 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.897111 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.908867 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.908922 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.908964 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.909005 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.909045 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.909085 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.920912 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.920967 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.921010 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.921051 (XEN) No periodic timer Apr 26 08:26:38.921092 (XEN) UNIT55 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.932904 (XEN) VCPU55: CPU28 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.932967 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.944909 (XEN) GICH_LRs (vcpu 55) mask=0 Apr 26 08:26:38.944968 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.945011 (XEN) VCPU_LR[1]=0 Apr 26 08:26:38.945051 (XEN) VCPU_LR[2]=0 Apr 26 08:26:38.945092 (XEN) VCPU_LR[3]=0 Apr 26 08:26:38.945132 (XEN) VCPU_LR[4]=0 Apr 26 08:26:38.956776 (XEN) VCPU_LR[5]=0 Apr 26 08:26:38.956806 (XEN) VCPU_LR[6]=0 Apr 26 08:26:38.956830 (XEN) VCPU_LR[7]=0 Apr 26 08:26:38.956852 (XEN) VCPU_LR[8]=0 Apr 26 08:26:38.956874 (XEN) VCPU_LR[9]=0 Apr 26 08:26:38.968785 (XEN) VCPU_LR[10]=0 Apr 26 08:26:38.968816 (XEN) VCPU_LR[11]=0 Apr 26 08:26:38.968839 (XEN) VCPU_LR[12]=0 Apr 26 08:26:38.968861 (XEN) VCPU_LR[13]=0 Apr 26 08:26:38.968884 (XEN) VCPU_LR[14]=0 Apr 26 08:26:38.968906 (XEN) VCPU_LR[15]=0 Apr 26 08:26:38.980788 (XEN) No periodic timer Apr 26 08:26:38.980819 (XEN) UNIT56 affinities: hard={0-95} soft={0-95} Apr 26 08:26:38.980845 (XEN) VCPU56: CPU42 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:38.992787 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:38.992819 (XEN) GICH_LRs (vcpu 56) mask=0 Apr 26 08:26:38.992844 (XEN) VCPU_LR[0]=0 Apr 26 08:26:38.992867 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.004787 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.004818 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.004842 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.004865 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.004887 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.004909 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.016903 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.016958 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.016981 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.017003 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.017025 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.017047 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.028874 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.028932 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.028977 (XEN) No periodic timer Apr 26 08:26:39.029019 (XEN) UNIT57 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.029066 (XEN) VCPU57: CPU61 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.040921 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.041005 (XEN) GICH_LRs (vcpu 57) mask=0 Apr 26 08:26:39.041053 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.052900 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.052958 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.053001 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.053042 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.053084 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.053126 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.064902 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.064958 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.065002 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.065043 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.065085 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.076903 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.076960 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.077003 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.077045 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.077087 (XEN) No periodic timer Apr 26 08:26:39.077128 (XEN) UNIT58 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.088892 (XEN) VCPU58: CPU78 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.088957 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.100909 (XEN) GICH_LRs (vcpu 58) mask=0 Apr 26 08:26:39.100967 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.101010 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.101050 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.101091 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.112902 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.112958 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.113000 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.113042 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.113082 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.113122 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.124904 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.124960 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.125002 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.125044 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.125084 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.125125 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.136853 (XEN) No periodic timer Apr 26 08:26:39.136908 (XEN) UNIT59 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.136956 (XEN) VCPU59: CPU90 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.148919 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.148977 (XEN) GICH_LRs (vcpu 59) mask=0 Apr 26 08:26:39.149022 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.149063 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.160791 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.160822 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.160845 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.160868 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.160890 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.160913 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.172871 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.172927 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.172970 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.173011 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.173052 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.173093 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.184870 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.184918 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.184960 (XEN) No periodic timer Apr 26 08:26:39.185002 (XEN) UNIT60 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.196860 (XEN) VCPU60: CPU12 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.196917 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.196961 (XEN) GICH_LRs (vcpu 60) mask=0 Apr 26 08:26:39.208850 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.208898 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.208939 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.208980 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.209021 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.220860 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.220907 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.220949 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.220990 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.221031 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.221071 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.232863 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.232910 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.232952 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.232994 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.233035 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.233075 (XEN) No periodic timer Apr 26 08:26:39.244874 (XEN) UNIT61 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.244948 (XEN) VCPU61: CPU53 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.245000 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.256840 (XEN) GICH_LRs (vcpu 61) mask=0 Apr 26 08:26:39.256892 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.256934 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.256976 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.257017 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.268864 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.268912 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.268954 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.268995 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.269037 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.269077 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.280859 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.280908 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.280950 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.280992 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.281033 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.292860 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.292908 (XEN) No periodic timer Apr 26 08:26:39.292950 (XEN) UNIT62 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.292996 (XEN) VCPU62: CPU43 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.304913 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.304972 (XEN) GICH_LRs (vcpu 62) mask=0 Apr 26 08:26:39.305018 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.305060 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.316902 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.316958 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.317001 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.317043 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.317083 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.317125 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.328899 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.328957 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.329000 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.329042 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.329084 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.329125 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.340888 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.340945 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.340987 (XEN) No periodic timer Apr 26 08:26:39.341030 (XEN) UNIT63 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.352907 (XEN) VCPU63: CPU62 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.352974 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.353019 (XEN) GICH_LRs (vcpu 63) mask=0 Apr 26 08:26:39.364922 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.364979 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.365023 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.365065 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.365107 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.376901 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.376958 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.377001 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.377042 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.377084 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.377125 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.388899 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.388956 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.388999 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.389041 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.389083 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.389124 (XEN) No periodic timer Apr 26 08:26:39.400909 (XEN) UNIT64 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.400973 (XEN) VCPU64: CPU64 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.401024 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.412904 (XEN) GICH_LRs (vcpu 64) mask=0 Apr 26 08:26:39.412962 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.413006 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.413048 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.424903 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.424961 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.425005 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.425046 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.425088 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.425129 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.436900 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.436957 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.437002 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.437044 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.437105 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.437149 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.448851 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.448908 (XEN) No periodic timer Apr 26 08:26:39.448951 (XEN) UNIT65 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.448998 (XEN) VCPU65: CPU91 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.460900 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.460960 (XEN) GICH_LRs (vcpu 65) mask=0 Apr 26 08:26:39.461005 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.472903 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.472960 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.473003 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.473045 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.473086 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.473127 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.484908 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.484965 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.485007 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.485050 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.485091 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.485132 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.496903 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.496959 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.497002 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.497045 (XEN) No periodic timer Apr 26 08:26:39.497088 (XEN) UNIT66 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.508904 (XEN) VCPU66: CPU13 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.508968 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.520897 (XEN) GICH_LRs (vcpu 66) mask=0 Apr 26 08:26:39.520956 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.520998 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.521040 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.521080 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.521121 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.532901 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.532957 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.533000 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.533041 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.533083 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.533123 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.544910 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.544965 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.545009 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.545051 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.545091 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.545133 (XEN) No periodic timer Apr 26 08:26:39.556911 (XEN) UNIT67 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.556973 (XEN) VCPU67: CPU29 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.568870 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.568930 (XEN) GICH_LRs (vcpu 67) mask=0 Apr 26 08:26:39.568974 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.569016 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.569057 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.580900 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.580956 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.581000 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.581042 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.581083 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.581123 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.592886 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.592943 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.592986 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.593028 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.593068 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.604899 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.604955 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.604999 (XEN) No periodic timer Apr 26 08:26:39.605041 (XEN) UNIT68 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.605087 (XEN) VCPU68: CPU44 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.616796 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.616828 (XEN) GICH_LRs (vcpu 68) mask=0 Apr 26 08:26:39.616852 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.628783 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.628814 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.628837 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.628860 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.628882 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.628904 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.640789 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.640820 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.640853 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.640877 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.640899 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.652786 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.652818 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.652842 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.652864 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.652886 (XEN) No periodic timer Apr 26 08:26:39.652909 (XEN) UNIT69 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.664774 (XEN) VCPU69: CPU63 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.664809 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.676906 (XEN) GICH_LRs (vcpu 69) mask=0 Apr 26 08:26:39.676965 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.677008 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.677051 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.677091 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.677133 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.688906 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.688962 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.689004 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.689045 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.689086 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.689126 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.700912 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.700968 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.701011 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.701051 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.701092 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.701133 (XEN) No periodic timer Apr 26 08:26:39.712903 (XEN) UNIT70 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.712965 (XEN) VCPU70: CPU66 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.724897 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.724956 (XEN) GICH_LRs (vcpu 70) mask=0 Apr 26 08:26:39.725001 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.725043 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.736899 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.736957 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.737001 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.737043 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.737085 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.737126 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.748909 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.748965 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.749009 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.749051 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.749092 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.749133 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.760901 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.760958 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.761001 (XEN) No periodic timer Apr 26 08:26:39.761045 (XEN) UNIT71 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.761092 (XEN) VCPU71: CPU92 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.772916 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.772974 (XEN) GICH_LRs (vcpu 71) mask=0 Apr 26 08:26:39.784906 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.784963 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.785006 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.785048 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.785090 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.785131 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.796893 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.796924 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.796948 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.796970 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.796993 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.797015 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.808899 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.808955 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.808999 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.809040 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.809081 (XEN) No periodic timer Apr 26 08:26:39.809123 (XEN) UNIT72 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.820912 (XEN) VCPU72: CPU14 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.820976 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.832871 (XEN) GICH_LRs (vcpu 72) mask=0 Apr 26 08:26:39.832929 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.832972 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.833013 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.833053 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.833114 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.844782 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.844813 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.844836 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.844859 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.844882 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.856867 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.856924 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.856977 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.857043 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.857100 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.857144 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.868863 (XEN) No periodic timer Apr 26 08:26:39.868919 (XEN) UNIT73 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.868967 (XEN) VCPU73: CPU30 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.880902 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.880960 (XEN) GICH_LRs (vcpu 73) mask=0 Apr 26 08:26:39.881005 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.881047 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.892896 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.892951 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.892993 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.893034 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.893075 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.893115 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.904914 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.904969 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.905012 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.905053 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.905094 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.905134 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.916906 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.916963 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.917005 (XEN) No periodic timer Apr 26 08:26:39.917048 (XEN) UNIT74 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.928906 (XEN) VCPU74: CPU45 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.928971 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.929019 (XEN) GICH_LRs (vcpu 74) mask=0 Apr 26 08:26:39.940898 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.940956 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.940999 (XEN) VCPU_LR[2]=0 Apr 26 08:26:39.941042 (XEN) VCPU_LR[3]=0 Apr 26 08:26:39.941083 (XEN) VCPU_LR[4]=0 Apr 26 08:26:39.941126 (XEN) VCPU_LR[5]=0 Apr 26 08:26:39.952899 (XEN) VCPU_LR[6]=0 Apr 26 08:26:39.952957 (XEN) VCPU_LR[7]=0 Apr 26 08:26:39.953001 (XEN) VCPU_LR[8]=0 Apr 26 08:26:39.953043 (XEN) VCPU_LR[9]=0 Apr 26 08:26:39.953085 (XEN) VCPU_LR[10]=0 Apr 26 08:26:39.953128 (XEN) VCPU_LR[11]=0 Apr 26 08:26:39.964886 (XEN) VCPU_LR[12]=0 Apr 26 08:26:39.964944 (XEN) VCPU_LR[13]=0 Apr 26 08:26:39.964987 (XEN) VCPU_LR[14]=0 Apr 26 08:26:39.965027 (XEN) VCPU_LR[15]=0 Apr 26 08:26:39.965070 (XEN) No periodic timer Apr 26 08:26:39.965112 (XEN) UNIT75 affinities: hard={0-95} soft={0-95} Apr 26 08:26:39.976914 (XEN) VCPU75: CPU48 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:39.976979 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:39.988926 (XEN) GICH_LRs (vcpu 75) mask=0 Apr 26 08:26:39.988984 (XEN) VCPU_LR[0]=0 Apr 26 08:26:39.989027 (XEN) VCPU_LR[1]=0 Apr 26 08:26:39.989068 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.000914 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.000972 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.001014 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.001057 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.001099 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.001139 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.012911 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.012970 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.013014 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.013056 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.013098 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.013140 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.024920 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.024979 (XEN) No periodic timer Apr 26 08:26:40.025024 (XEN) UNIT76 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.025071 (XEN) VCPU76: CPU70 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.036921 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.036980 (XEN) GICH_LRs (vcpu 76) mask=0 Apr 26 08:26:40.037044 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.037089 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.048906 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.048964 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.049008 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.049050 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.049090 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.049131 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.060908 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.060965 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.061009 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.061050 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.061092 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.061133 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.072909 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.072966 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.073009 (XEN) No periodic timer Apr 26 08:26:40.073052 (XEN) UNIT77 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.084927 (XEN) VCPU77: CPU93 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.084992 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.085038 (XEN) GICH_LRs (vcpu 77) mask=0 Apr 26 08:26:40.096911 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.096969 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.097011 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.097052 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.097093 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.108901 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.108959 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.109002 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.109044 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.109085 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.109126 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.120911 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.120968 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.121010 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.121052 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.121094 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.121134 (XEN) No periodic timer Apr 26 08:26:40.132912 (XEN) UNIT78 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.132974 (XEN) VCPU78: CPU15 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.144909 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.144970 (XEN) GICH_LRs (vcpu 78) mask=0 Apr 26 08:26:40.145016 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.145059 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.145100 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.156905 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.156961 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.157004 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.157046 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.157087 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.157129 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.168915 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.168973 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.169018 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.169060 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.169102 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.169142 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.180911 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.180969 (XEN) No periodic timer Apr 26 08:26:40.181012 (XEN) UNIT79 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.181060 (XEN) VCPU79: CPU31 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.192887 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.192946 (XEN) GICH_LRs (vcpu 79) mask=0 Apr 26 08:26:40.192992 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.204911 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.204971 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.205016 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.205058 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.205099 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.205141 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.205182 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.216920 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.216976 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.217019 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.217060 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.217102 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.228904 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.228962 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.229006 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.229046 (XEN) No periodic timer Apr 26 08:26:40.229088 (XEN) UNIT80 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.240934 (XEN) VCPU80: CPU46 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.241000 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.252908 (XEN) GICH_LRs (vcpu 80) mask=0 Apr 26 08:26:40.252969 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.253012 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.253053 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.253094 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.253133 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.264918 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.264974 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.265016 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.265057 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.265097 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.265137 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.276915 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.276971 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.277014 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.277056 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.277097 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.277138 (XEN) No periodic timer Apr 26 08:26:40.288929 (XEN) UNIT81 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.288990 (XEN) VCPU81: CPU49 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.300922 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.300983 (XEN) GICH_LRs (vcpu 81) mask=0 Apr 26 08:26:40.301029 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.301069 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.301109 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.312911 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.312967 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.313010 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.313050 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.313090 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.313131 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.324916 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.324973 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.325015 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.325056 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.325096 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.325136 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.336918 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.336974 (XEN) No periodic timer Apr 26 08:26:40.337017 (XEN) UNIT82 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.337063 (XEN) VCPU82: CPU72 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.348916 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.348974 (XEN) GICH_LRs (vcpu 82) mask=0 Apr 26 08:26:40.349019 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.360903 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.360959 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.361001 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.361042 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.361082 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.372906 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.372963 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.373006 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.373047 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.373087 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.373127 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.384908 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.384965 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.385007 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.385048 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.385088 (XEN) No periodic timer Apr 26 08:26:40.385129 (XEN) UNIT83 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.396916 (XEN) VCPU83: CPU94 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.396981 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.408918 (XEN) GICH_LRs (vcpu 83) mask=0 Apr 26 08:26:40.408976 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.409019 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.409060 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.409100 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.409142 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.420919 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.420975 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.421016 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.421057 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.421097 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.421137 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.432909 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.432965 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.433030 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.433075 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.433116 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.444916 (XEN) No periodic timer Apr 26 08:26:40.444973 (XEN) UNIT84 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.445021 (XEN) VCPU84: CPU0 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.456907 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.456966 (XEN) GICH_LRs (vcpu 84) mask=0 Apr 26 08:26:40.457011 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.457052 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.457092 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.468948 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.469001 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.469047 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.469086 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.469124 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.469172 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.480897 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.480953 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.480995 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.481036 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.481076 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.492910 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.492966 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.493008 (XEN) No periodic timer Apr 26 08:26:40.493049 (XEN) UNIT85 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.504904 (XEN) VCPU85: CPU47 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.504970 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.505015 (XEN) GICH_LRs (vcpu 85) mask=0 Apr 26 08:26:40.516916 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.516973 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.517015 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.517056 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.517096 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.517136 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.528909 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.528965 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.529007 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.529047 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.529088 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.529128 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.540912 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.540968 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.541011 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.541052 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.541093 (XEN) No periodic timer Apr 26 08:26:40.541135 (XEN) UNIT86 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.552926 (XEN) VCPU86: CPU16 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.552990 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.564917 (XEN) GICH_LRs (vcpu 86) mask=0 Apr 26 08:26:40.564975 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.565018 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.565059 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.565099 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.576907 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.576965 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.577007 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.577048 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.577089 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.577129 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.588908 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.588966 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.589009 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.589050 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.589091 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.589132 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.600916 (XEN) No periodic timer Apr 26 08:26:40.600972 (XEN) UNIT87 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.601020 (XEN) VCPU87: CPU50 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.612872 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.612931 (XEN) GICH_LRs (vcpu 87) mask=0 Apr 26 08:26:40.612975 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.613016 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.624925 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.624980 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.625022 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.625063 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.625104 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.625144 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.636886 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.636963 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.637008 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.637048 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.637088 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.637129 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.648909 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.648964 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.649006 (XEN) No periodic timer Apr 26 08:26:40.649047 (XEN) UNIT88 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.660900 (XEN) VCPU88: CPU95 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.660965 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.661010 (XEN) GICH_LRs (vcpu 88) mask=0 Apr 26 08:26:40.672905 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.672961 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.673002 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.673042 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.673082 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.673122 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.684908 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.684964 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.685007 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.685048 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.685088 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.685129 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.696898 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.696953 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.696995 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.697036 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.697076 (XEN) No periodic timer Apr 26 08:26:40.697117 (XEN) UNIT89 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.708915 (XEN) VCPU89: CPU73 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.708979 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.720892 (XEN) GICH_LRs (vcpu 89) mask=0 Apr 26 08:26:40.720950 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.720993 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.721034 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.721074 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.732884 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.732940 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.732983 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.733024 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.733064 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.744929 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.744988 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.745043 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.745086 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.745127 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.745168 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.756914 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.756970 (XEN) No periodic timer Apr 26 08:26:40.757013 (XEN) UNIT90 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.757060 (XEN) VCPU90: CPU1 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.768913 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.768971 (XEN) GICH_LRs (vcpu 90) mask=0 Apr 26 08:26:40.769015 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.769056 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.780903 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.780958 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.781000 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.781041 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.781081 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.781121 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.792902 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.792958 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.793000 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.793041 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.793081 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.793122 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.804913 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.804968 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.805010 (XEN) No periodic timer Apr 26 08:26:40.805052 (XEN) UNIT91 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.816912 (XEN) VCPU91: CPU19 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.816977 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.817022 (XEN) GICH_LRs (vcpu 91) mask=0 Apr 26 08:26:40.828909 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.828965 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.829007 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.829047 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.829106 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.829150 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.840900 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.840955 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.840997 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.841039 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.841079 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.841120 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.852896 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.852952 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.852995 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.853035 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.853076 (XEN) No periodic timer Apr 26 08:26:40.853117 (XEN) UNIT92 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.864913 (XEN) VCPU92: CPU32 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.876894 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.876954 (XEN) GICH_LRs (vcpu 92) mask=0 Apr 26 08:26:40.876999 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.877040 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.877081 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.888891 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.888948 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.888990 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.889031 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.889071 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.889111 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.900906 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.900961 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.901004 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.901045 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.901085 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.901124 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.912905 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.912960 (XEN) No periodic timer Apr 26 08:26:40.913003 (XEN) UNIT93 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.913050 (XEN) VCPU93: CPU52 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.924918 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.924975 (XEN) GICH_LRs (vcpu 93) mask=0 Apr 26 08:26:40.925020 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.936895 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.936952 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.936994 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.937035 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.937076 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.937116 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.948900 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.948957 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.949000 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.949041 (XEN) VCPU_LR[10]=0 Apr 26 08:26:40.949082 (XEN) VCPU_LR[11]=0 Apr 26 08:26:40.949122 (XEN) VCPU_LR[12]=0 Apr 26 08:26:40.960916 (XEN) VCPU_LR[13]=0 Apr 26 08:26:40.960972 (XEN) VCPU_LR[14]=0 Apr 26 08:26:40.961015 (XEN) VCPU_LR[15]=0 Apr 26 08:26:40.961056 (XEN) No periodic timer Apr 26 08:26:40.961098 (XEN) UNIT94 affinities: hard={0-95} soft={0-95} Apr 26 08:26:40.972898 (XEN) VCPU94: CPU74 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:40.972962 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:40.973007 (XEN) GICH_LRs (vcpu 94) mask=0 Apr 26 08:26:40.984910 (XEN) VCPU_LR[0]=0 Apr 26 08:26:40.984966 (XEN) VCPU_LR[1]=0 Apr 26 08:26:40.985008 (XEN) VCPU_LR[2]=0 Apr 26 08:26:40.985048 (XEN) VCPU_LR[3]=0 Apr 26 08:26:40.985089 (XEN) VCPU_LR[4]=0 Apr 26 08:26:40.985128 (XEN) VCPU_LR[5]=0 Apr 26 08:26:40.996891 (XEN) VCPU_LR[6]=0 Apr 26 08:26:40.996946 (XEN) VCPU_LR[7]=0 Apr 26 08:26:40.996988 (XEN) VCPU_LR[8]=0 Apr 26 08:26:40.997029 (XEN) VCPU_LR[9]=0 Apr 26 08:26:40.997069 (XEN) VCPU_LR[10]=0 Apr 26 08:26:41.008900 (XEN) VCPU_LR[11]=0 Apr 26 08:26:41.008956 (XEN) VCPU_LR[12]=0 Apr 26 08:26:41.008999 (XEN) VCPU_LR[13]=0 Apr 26 08:26:41.009040 (XEN) VCPU_LR[14]=0 Apr 26 08:26:41.009080 (XEN) VCPU_LR[15]=0 Apr 26 08:26:41.009120 (XEN) No periodic timer Apr 26 08:26:41.020902 (XEN) UNIT95 affinities: hard={0-95} soft={0-95} Apr 26 08:26:41.020962 (XEN) VCPU95: CPU80 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Apr 26 08:26:41.032901 (XEN) pause_count=0 pause_flags=1 Apr 26 08:26:41.032959 (XEN) GICH_LRs (vcpu 95) mask=0 Apr 26 08:26:41.033025 (XEN) VCPU_LR[0]=0 Apr 26 08:26:41.033069 (XEN) VCPU_LR[1]=0 Apr 26 08:26:41.033110 (XEN) VCPU_LR[2]=0 Apr 26 08:26:41.044909 (XEN) VCPU_LR[3]=0 Apr 26 08:26:41.044965 (XEN) VCPU_LR[4]=0 Apr 26 08:26:41.045007 (XEN) VCPU_LR[5]=0 Apr 26 08:26:41.045048 (XEN) VCPU_LR[6]=0 Apr 26 08:26:41.045088 (XEN) VCPU_LR[7]=0 Apr 26 08:26:41.045129 (XEN) VCPU_LR[8]=0 Apr 26 08:26:41.056891 (XEN) VCPU_LR[9]=0 Apr 26 08:26:41.056947 (XEN) VCPU_LR[10]=0 Apr 26 08:26:41.056990 (XEN) VCPU_LR[11]=0 Apr 26 08:26:41.057030 (XEN) VCPU_LR[12]=0 Apr 26 08:26:41.057071 (XEN) VCPU_LR[13]=0 Apr 26 08:26:41.057111 (XEN) VCPU_LR[14]=0 Apr 26 08:26:41.068904 (XEN) VCPU_LR[15]=0 Apr 26 08:26:41.068959 (XEN) No periodic timer Apr 26 08:26:41.069002 (XEN) Notifying guest 0:0 (virq 1, port 0) Apr 26 08:26:41.069048 (XEN) Notifying guest 0:1 (virq 1, port 0) Apr 26 08:26:41.080901 (XEN) Notifying guest 0:2 (virq 1, port 0) Apr 26 08:26:41.080960 (XEN) Notifying guest 0:3 (virq 1, port 0) Apr 26 08:26:41.081006 (XEN) Notifying guest 0:4 (virq 1, port 0) Apr 26 08:26:41.092898 (XEN) Notifying guest 0:5 (virq 1, port 0) Apr 26 08:26:41.092958 (XEN) Notifying guest 0:6 (virq 1, port 0) Apr 26 08:26:41.093003 (XEN) Notifying guest 0:7 (virq 1, port 0) Apr 26 08:26:41.104903 (XEN) Notifying guest 0:8 (virq 1, port 0) Apr 26 08:26:41.104963 (XEN) Notifying guest 0:9 (virq 1, port 0) Apr 26 08:26:41.105009 (XEN) Notifying guest 0:10 (virq 1, port 0) Apr 26 08:26:41.105053 (XEN) Notifying guest 0:11 (virq 1, port 0) Apr 26 08:26:41.116908 (XEN) Notifying guest 0:12 (virq 1, port 0) Apr 26 08:26:41.116966 (XEN) Notifying guest 0:13 (virq 1, port 0) Apr 26 08:26:41.128897 (XEN) Notifying guest 0:14 (virq 1, port 0) Apr 26 08:26:41.128957 (XEN) Notifying guest 0:15 (virq 1, port 0) Apr 26 08:26:41.129002 (XEN) Notifying guest 0:16 (virq 1, port 0) Apr 26 08:26:41.140909 (XEN) Notifying guest 0:17 (virq 1, port 0) Apr 26 08:26:41.140968 (XEN) Notifying guest 0:18 (virq 1, port 0) Apr 26 08:26:41.141014 (XEN) Notifying guest 0:19 (virq 1, port 0) Apr 26 08:26:41.152905 (XEN) Notifying guest 0:20 (virq 1, port 0) Apr 26 08:26:41.152964 (XEN) Notifying guest 0:21 (virq 1, port 0) Apr 26 08:26:41.153010 (XEN) Notifying guest 0:22 (virq 1, port 0) Apr 26 08:26:41.164885 (XEN) Notifying guest 0:23 (virq 1, port 0) Apr 26 08:26:41.164946 (XEN) Notifying guest 0:24 (virq 1, port 0) Apr 26 08:26:41.164991 (XEN) Notifying guest 0:25 (virq 1, port 0) Apr 26 08:26:41.176901 (XEN) Notifying guest 0:26 (virq 1, port 0) Apr 26 08:26:41.176962 (XEN) Notifying guest 0:27 (virq 1, port 0) Apr 26 08:26:41.177007 (XEN) Notifying guest 0:28 (virq 1, port 0) Apr 26 08:26:41.177052 (XEN) Notifying guest 0:29 (virq 1, port 0) Apr 26 08:26:41.188901 (XEN) Notifying guest 0:30 (virq 1, port 0) Apr 26 08:26:41.188959 (XEN) Notifying guest 0:31 (virq 1, port 0) Apr 26 08:26:41.189004 (XEN) Notifying guest 0:32 (virq 1, port 0) Apr 26 08:26:41.200911 (XEN) Notifying guest 0:33 (virq 1, port 0) Apr 26 08:26:41.200969 (XEN) Notifying guest 0:34 (virq 1, port 0) Apr 26 08:26:41.201014 (XEN) Notifying guest 0:35 (virq 1, port 0) Apr 26 08:26:41.212899 (XEN) Notifying guest 0:36 (virq 1, port 0) Apr 26 08:26:41.212958 (XEN) Notifying guest 0:37 (virq 1, port 0) Apr 26 08:26:41.213003 (XEN) Notifying guest 0:38 (virq 1, port 0) Apr 26 08:26:41.224913 (XEN) Notifying guest 0:39 (virq 1, port 0) Apr 26 08:26:41.224972 (XEN) Notifying guest 0:40 (virq 1, port 0) Apr 26 08:26:41.225016 (XEN) Notifying guest 0:41 (virq 1, port 0) Apr 26 08:26:41.236900 (XEN) Notifying guest 0:42 (virq 1, port 0) Apr 26 08:26:41.236959 (XEN) Notifying guest 0:43 (virq 1, port 0) Apr 26 08:26:41.237004 (XEN) Notifying guest 0:44 (virq 1, port 0) Apr 26 08:26:41.248909 (XEN) Notifying guest 0:45 (virq 1, port 0) Apr 26 08:26:41.248968 (XEN) Notifying guest 0:46 (virq 1, port 0) Apr 26 08:26:41.249013 (XEN) Notifying guest 0:47 (virq 1, port 0) Apr 26 08:26:41.260891 (XEN) Notifying guest 0:48 (virq 1, port 0) Apr 26 08:26:41.260968 (XEN) Notifying guest 0:49 (virq 1, port 0) Apr 26 08:26:41.261017 (XEN) Notifying guest 0:50 (virq 1, port 0) Apr 26 08:26:41.272911 (XEN) Notifying guest 0:51 (virq 1, port 0) Apr 26 08:26:41.272970 (XEN) Notifying guest 0:52 (virq 1, port 0) Apr 26 08:26:41.273015 (XEN) Notifying guest 0:53 (virq 1, port 0) Apr 26 08:26:41.284883 (XEN) Notifying guest 0:54 (virq 1, port 0) Apr 26 08:26:41.284943 (XEN) Notifying guest 0:55 (virq 1, port 0) Apr 26 08:26:41.284989 (XEN) Notifying guest 0:56 (virq 1, port 0) Apr 26 08:26:41.296902 (XEN) Notifying guest 0:57 (virq 1, port 0) Apr 26 08:26:41.296961 (XEN) Notifying guest 0:58 (virq 1, port 0) Apr 26 08:26:41.297007 (XEN) Notifying guest 0:59 (virq 1, port 0) Apr 26 08:26:41.308902 (XEN) Notifying guest 0:60 (virq 1, port 0) Apr 26 08:26:41.308961 (XEN) Notifying guest 0:61 (virq 1, port 0) Apr 26 08:26:41.309006 (XEN) Notifying guest 0:62 (virq 1, port 0) Apr 26 08:26:41.320900 (XEN) Notifying guest 0:63 (virq 1, port 0) Apr 26 08:26:41.320959 (XEN) Notifying guest 0:64 (virq 1, port 0) Apr 26 08:26:41.321005 (XEN) Notifying guest 0:65 (virq 1, port 0) Apr 26 08:26:41.332902 (XEN) Notifying guest 0:66 (virq 1, port 0) Apr 26 08:26:41.332961 (XEN) Notifying guest 0:67 (virq 1, port 0) Apr 26 08:26:41.333006 (XEN) Notifying guest 0:68 (virq 1, port 0) Apr 26 08:26:41.344911 (XEN) Notifying guest 0:69 (virq 1, port 0) Apr 26 08:26:41.344970 (XEN) Notifying guest 0:70 (virq 1, port 0) Apr 26 08:26:41.345015 (XEN) Notifying guest 0:71 (virq 1, port 0) Apr 26 08:26:41.356893 (XEN) Notifying guest 0:72 (virq 1, port 0) Apr 26 08:26:41.356952 (XEN) Notifying guest 0:73 (virq 1, port 0) Apr 26 08:26:41.356997 (XEN) Notifying guest 0:74 (virq 1, port 0) Apr 26 08:26:41.368835 (XEN) Notifying guest 0:75 (virq 1, port 0) Apr 26 08:26:41.368895 (XEN) Notifying guest 0:76 (virq 1, port 0) Apr 26 08:26:41.368940 (XEN) Notifying guest 0:77 (virq 1, port 0) Apr 26 08:26:41.380914 (XEN) Notifying guest 0:78 (virq 1, port 0) Apr 26 08:26:41.380974 (XEN) Notifying guest 0:79 (virq 1, port 0) Apr 26 08:26:41.381019 (XEN) Notifying guest 0:80 (virq 1, port 0) Apr 26 08:26:41.392893 (XEN) Notifying guest 0:81 (virq 1, port 0) Apr 26 08:26:41.392952 (XEN) Notifying guest 0:82 (virq 1, port 0) Apr 26 08:26:41.392998 (XEN) Notifying guest 0:83 (virq 1, port 0) Apr 26 08:26:41.404879 (XEN) Notifying guest 0:84 (virq 1, port 0) Apr 26 08:26:41.404938 (XEN) Notifying guest 0:85 (virq 1, port 0) Apr 26 08:26:41.404984 (XEN) Notifying guest 0:86 (virq 1, port 0) Apr 26 08:26:41.416930 (XEN) Notifying guest 0:87 (virq 1, port 0) Apr 26 08:26:41.416990 (XEN) Notifying guest 0:88 (virq 1, port 0) Apr 26 08:26:41.417035 (XEN) Notifying guest 0:89 (virq 1, port 0) Apr 26 08:26:41.428900 (XEN) Notifying guest 0:90 (virq 1, port 0) Apr 26 08:26:41.428959 (XEN) Notifying guest 0:91 (virq 1, port 0) Apr 26 08:26:41.429005 (XEN) Notifying guest 0:92 (virq 1, port 0) Apr 26 08:26:41.440909 (XEN) Notifying guest 0:93 (virq 1, port 0) Apr 26 08:26:41.440969 (XEN) Notifying guest 0:94 (virq 1, port 0) Apr 26 08:26:41.441015 (XEN) Notifying guest 0:95 (virq 1, port 0) Apr 26 08:26:41.452842 Apr 26 08:26:47.954803 (XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input) Apr 26 08:26:47.976910 Apr 26 08:26:47.978288