Jun 24 09:58:54.174997 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.175316 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.175361 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.175402 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.184785 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.184844 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.184907 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.184949 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.184990 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.185031 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.196797 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.196875 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.196920 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.196961 (XEN) No periodic timer
Jun 24 09:58:54.197003 (XEN)   UNIT76 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.208797 (XEN)     VCPU76: CPU69 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.208883 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.208930 (XEN) GICH_LRs (vcpu 76) mask=0
Jun 24 09:58:54.220834 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.220889 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.220931 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.220995 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.221036 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.221077 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.232827 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.232883 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.232948 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.232989 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.233031 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.244834 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.244890 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.244954 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.244995 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.245036 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.245076 (XEN) No periodic timer
Jun 24 09:58:54.256833 (XEN)   UNIT77 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.256916 (XEN)     VCPU77: CPU86 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.268826 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.268885 (XEN) GICH_LRs (vcpu 77) mask=0
Jun 24 09:58:54.268931 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.268973 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.269037 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.280828 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.280884 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.280926 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.280967 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.281031 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.281073 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.292835 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.292891 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.292934 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.292997 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.293039 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.293079 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.304827 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.304883 (XEN) No periodic timer
Jun 24 09:58:54.304927 (XEN)   UNIT78 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.304996 (XEN)     VCPU78: CPU0 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.316835 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.316894 (XEN) GICH_LRs (vcpu 78) mask=0
Jun 24 09:58:54.316939 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.328828 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.328906 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.328950 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.328991 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.329032 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.329073 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.340833 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.340889 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.340932 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.340973 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.341015 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.341078 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.352829 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.352885 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.352928 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.352969 (XEN) No periodic timer
Jun 24 09:58:54.353033 (XEN)   UNIT79 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.364844 (XEN)     VCPU79: CPU31 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.364908 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.376845 (XEN) GICH_LRs (vcpu 79) mask=0
Jun 24 09:58:54.376905 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.376972 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.377015 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.377056 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.377097 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.388838 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.388915 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.388959 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.389000 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.389041 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.389081 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.400844 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.400900 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.400943 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.400984 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.401026 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.412827 (XEN) No periodic timer
Jun 24 09:58:54.412884 (XEN)   UNIT80 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.412934 (XEN)     VCPU80: CPU32 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.424824 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.424883 (XEN) GICH_LRs (vcpu 80) mask=0
Jun 24 09:58:54.424946 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.424989 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.425030 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.436879 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.436935 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.436999 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.437043 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.437084 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.437125 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.448857 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.448936 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.448981 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.449022 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.449063 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.449104 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.460834 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.460890 (XEN) No periodic timer
Jun 24 09:58:54.460933 (XEN)   UNIT81 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.460981 (XEN)     VCPU81: CPU50 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.472920 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.473001 (XEN) GICH_LRs (vcpu 81) mask=0
Jun 24 09:58:54.473047 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.484899 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.484956 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.484998 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.485064 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.485107 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.496905 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.496962 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.497006 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.497048 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.497111 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.497154 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.508902 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.508959 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.509004 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.509068 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.509111 (XEN) No periodic timer
Jun 24 09:58:54.509153 (XEN)   UNIT82 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.520918 (XEN)     VCPU82: CPU70 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.520983 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.532910 (XEN) GICH_LRs (vcpu 82) mask=0
Jun 24 09:58:54.532969 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.533012 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.533053 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.533094 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.544901 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.544960 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.545003 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.545046 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.545089 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.545152 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.556903 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.556961 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.557003 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.557045 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.557109 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.557151 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.568902 (XEN) No periodic timer
Jun 24 09:58:54.568958 (XEN)   UNIT83 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.569025 (XEN)     VCPU83: CPU82 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.580913 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.580971 (XEN) GICH_LRs (vcpu 83) mask=0
Jun 24 09:58:54.581018 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.581060 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.581102 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.592900 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.592955 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.592998 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.593039 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.593081 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.593145 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.604900 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.604956 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.604999 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.605042 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.605106 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.605150 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.616899 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.616977 (XEN) No periodic timer
Jun 24 09:58:54.617021 (XEN)   UNIT84 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.628906 (XEN)     VCPU84: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.628970 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.629016 (XEN) GICH_LRs (vcpu 84) mask=0
Jun 24 09:58:54.640918 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.640973 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.641017 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.641060 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.641100 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.641163 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.652906 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.652961 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.653006 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.653047 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.653088 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.653130 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.664910 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.664966 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.665009 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.665050 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.665091 (XEN) No periodic timer
Jun 24 09:58:54.665133 (XEN)   UNIT85 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.676917 (XEN)     VCPU85: CPU34 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.676980 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.688911 (XEN) GICH_LRs (vcpu 85) mask=0
Jun 24 09:58:54.688970 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.689012 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.689053 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.689094 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.700909 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.700965 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.701008 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.701051 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.701093 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.701134 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.712907 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.712964 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.713007 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.713049 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.713089 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.713130 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.724907 (XEN) No periodic timer
Jun 24 09:58:54.724964 (XEN)   UNIT86 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.725012 (XEN)     VCPU86: CPU16 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.736902 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.736960 (XEN) GICH_LRs (vcpu 86) mask=0
Jun 24 09:58:54.737005 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.737048 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.748905 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.748960 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.749002 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.749043 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.749084 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.749124 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.760914 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.760971 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.761013 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.761056 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.761097 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.761156 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.772910 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.772965 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.773009 (XEN) No periodic timer
Jun 24 09:58:54.773052 (XEN)   UNIT87 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.784900 (XEN)     VCPU87: CPU51 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.784965 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.785010 (XEN) GICH_LRs (vcpu 87) mask=0
Jun 24 09:58:54.796918 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.796974 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.797017 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.797057 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.797098 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.797138 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.808906 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.808962 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.809004 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.809046 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.809087 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.809127 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.820910 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.820965 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.821007 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.821048 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.821090 (XEN) No periodic timer
Jun 24 09:58:54.821132 (XEN)   UNIT88 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.832913 (XEN)     VCPU88: CPU87 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.832977 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.844895 (XEN) GICH_LRs (vcpu 88) mask=0
Jun 24 09:58:54.844953 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.844996 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.845036 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.845077 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.856901 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.856956 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.856998 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.857039 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.857080 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.857120 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.868895 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.868951 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.868994 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.869035 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.869076 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.880909 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.880965 (XEN) No periodic timer
Jun 24 09:58:54.881008 (XEN)   UNIT89 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.881055 (XEN)     VCPU89: CPU71 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.892871 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.892929 (XEN) GICH_LRs (vcpu 89) mask=0
Jun 24 09:58:54.892974 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.904915 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.904972 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.905014 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.905055 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.905096 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.905136 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.916922 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.916990 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.917035 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.917077 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.917118 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.917159 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.928904 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.928960 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.929003 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.929044 (XEN) No periodic timer
Jun 24 09:58:54.929087 (XEN)   UNIT90 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.940921 (XEN)     VCPU90: CPU3 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:54.941044 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:54.941095 (XEN) GICH_LRs (vcpu 90) mask=0
Jun 24 09:58:54.952911 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:54.952967 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:54.953009 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:54.953050 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:54.953091 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:54.953131 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:54.964909 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:54.964964 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:54.965006 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:54.965065 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:54.965109 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:54.965149 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:54.976896 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:54.976952 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:54.976995 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:54.977036 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:54.977076 (XEN) No periodic timer
Jun 24 09:58:54.988838 (XEN)   UNIT91 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:54.988901 (XEN)     VCPU91: CPU17 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:55.000923 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:55.000982 (XEN) GICH_LRs (vcpu 91) mask=0
Jun 24 09:58:55.001027 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:55.001069 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:55.001110 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:55.012896 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:55.012952 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:55.012994 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:55.013035 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:55.013075 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:55.013115 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:55.024909 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:55.024965 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:55.025008 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:55.025049 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:55.025090 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:55.025130 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:55.036906 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:55.036961 (XEN) No periodic timer
Jun 24 09:58:55.037004 (XEN)   UNIT92 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:55.037051 (XEN)     VCPU92: CPU37 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:55.048916 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:55.048974 (XEN) GICH_LRs (vcpu 92) mask=0
Jun 24 09:58:55.049018 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:55.060907 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:55.060963 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:55.061006 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:55.061047 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:55.061088 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:55.061128 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:55.072902 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:55.072958 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:55.073001 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:55.073042 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:55.073082 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:55.073123 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:55.084900 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:55.084956 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:55.084998 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:55.085039 (XEN) No periodic timer
Jun 24 09:58:55.085080 (XEN)   UNIT93 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:55.096896 (XEN)     VCPU93: CPU52 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:55.096960 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:55.097006 (XEN) GICH_LRs (vcpu 93) mask=0
Jun 24 09:58:55.108913 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:55.108968 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:55.109011 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:55.109052 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:55.109092 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:55.120895 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:55.120952 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:55.120995 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:55.121035 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:55.121075 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:55.121115 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:55.132901 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:55.132957 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:55.132999 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:55.133040 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:55.133081 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:55.144915 (XEN) No periodic timer
Jun 24 09:58:55.144971 (XEN)   UNIT94 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:55.145019 (XEN)     VCPU94: CPU72 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:55.156901 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:55.156959 (XEN) GICH_LRs (vcpu 94) mask=0
Jun 24 09:58:55.157004 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:55.157045 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:55.157086 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:55.168894 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:55.168967 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:55.169012 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:55.169053 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:55.169093 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:55.169133 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:55.180912 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:55.180967 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:55.181010 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:55.181052 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:55.181092 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:55.181133 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:55.192910 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:55.192965 (XEN) No periodic timer
Jun 24 09:58:55.193009 (XEN)   UNIT95 affinities: hard={0-95} soft={0-95}
Jun 24 09:58:55.193056 (XEN)     VCPU95: CPU85 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 24 09:58:55.204914 (XEN)     pause_count=0 pause_flags=1
Jun 24 09:58:55.204972 (XEN) GICH_LRs (vcpu 95) mask=0
Jun 24 09:58:55.205017 (XEN)    VCPU_LR[0]=0
Jun 24 09:58:55.216907 (XEN)    VCPU_LR[1]=0
Jun 24 09:58:55.216962 (XEN)    VCPU_LR[2]=0
Jun 24 09:58:55.217005 (XEN)    VCPU_LR[3]=0
Jun 24 09:58:55.217046 (XEN)    VCPU_LR[4]=0
Jun 24 09:58:55.217086 (XEN)    VCPU_LR[5]=0
Jun 24 09:58:55.217126 (XEN)    VCPU_LR[6]=0
Jun 24 09:58:55.228873 (XEN)    VCPU_LR[7]=0
Jun 24 09:58:55.228928 (XEN)    VCPU_LR[8]=0
Jun 24 09:58:55.228970 (XEN)    VCPU_LR[9]=0
Jun 24 09:58:55.229012 (XEN)    VCPU_LR[10]=0
Jun 24 09:58:55.229053 (XEN)    VCPU_LR[11]=0
Jun 24 09:58:55.229095 (XEN)    VCPU_LR[12]=0
Jun 24 09:58:55.240913 (XEN)    VCPU_LR[13]=0
Jun 24 09:58:55.240969 (XEN)    VCPU_LR[14]=0
Jun 24 09:58:55.241011 (XEN)    VCPU_LR[15]=0
Jun 24 09:58:55.241052 (XEN) No periodic timer
Jun 24 09:58:55.241094 (XEN) Notifying guest 0:0 (virq 1, port 0)
Jun 24 09:58:55.252897 (XEN) Notifying guest 0:1 (virq 1, port 0)
Jun 24 09:58:55.252956 (XEN) Notifying guest 0:2 (virq 1, port 0)
Jun 24 09:58:55.253001 (XEN) Notifying guest 0:3 (virq 1, port 0)
Jun 24 09:58:55.264907 (XEN) Notifying guest 0:4 (virq 1, port 0)
Jun 24 09:58:55.264966 (XEN) Notifying guest 0:5 (virq 1, port 0)
Jun 24 09:58:55.265011 (XEN) Notifying guest 0:6 (virq 1, port 0)
Jun 24 09:58:55.276907 (XEN) Notifying guest 0:7 (virq 1, port 0)
Jun 24 09:58:55.276965 (XEN) Notifying guest 0:8 (virq 1, port 0)
Jun 24 09:58:55.277011 (XEN) Notifying guest 0:9 (virq 1, port 0)
Jun 24 09:58:55.288903 (XEN) Notifying guest 0:10 (virq 1, port 0)
Jun 24 09:58:55.288962 (XEN) Notifying guest 0:11 (virq 1, port 0)
Jun 24 09:58:55.289008 (XEN) Notifying guest 0:12 (virq 1, port 0)
Jun 24 09:58:55.300919 (XEN) Notifying guest 0:13 (virq 1, port 0)
Jun 24 09:58:55.300979 (XEN) Notifying guest 0:14 (virq 1, port 0)
Jun 24 09:58:55.301024 (XEN) Notifying guest 0:15 (virq 1, port 0)
Jun 24 09:58:55.312912 (XEN) Notifying guest 0:16 (virq 1, port 0)
Jun 24 09:58:55.312971 (XEN) Notifying guest 0:17 (virq 1, port 0)
Jun 24 09:58:55.313016 (XEN) Notifying guest 0:18 (virq 1, port 0)
Jun 24 09:58:55.324904 (XEN) Notifying guest 0:19 (virq 1, port 0)
Jun 24 09:58:55.324963 (XEN) Notifying guest 0:20 (virq 1, port 0)
Jun 24 09:58:55.325009 (XEN) Notifying guest 0:21 (virq 1, port 0)
Jun 24 09:58:55.336906 (XEN) Notifying guest 0:22 (virq 1, port 0)
Jun 24 09:58:55.336965 (XEN) Notifying guest 0:23 (virq 1, port 0)
Jun 24 09:58:55.337012 (XEN) Notifying guest 0:24 (virq 1, port 0)
Jun 24 09:58:55.348899 (XEN) Notifying guest 0:25 (virq 1, port 0)
Jun 24 09:58:55.348961 (XEN) Notifying guest 0:26 (virq 1, port 0)
Jun 24 09:58:55.349007 (XEN) Notifying guest 0:27 (virq 1, port 0)
Jun 24 09:58:55.349051 (XEN) Notifying guest 0:28 (virq 1, port 0)
Jun 24 09:58:55.360911 (XEN) Notifying guest 0:29 (virq 1, port 0)
Jun 24 09:58:55.360969 (XEN) Notifying guest 0:30 (virq 1, port 0)
Jun 24 09:58:55.361014 (XEN) Notifying guest 0:31 (virq 1, port 0)
Jun 24 09:58:55.372904 (XEN) Notifying guest 0:32 (virq 1, port 0)
Jun 24 09:58:55.372963 (XEN) Notifying guest 0:33 (virq 1, port 0)
Jun 24 09:58:55.384854 (XEN) Notifying guest 0:34 (virq 1, port 0)
Jun 24 09:58:55.384913 (XEN) Notifying guest 0:35 (virq 1, port 0)
Jun 24 09:58:55.384977 (XEN) Notifying guest 0:36 (virq 1, port 0)
Jun 24 09:58:55.396896 (XEN) Notifying guest 0:37 (virq 1, port 0)
Jun 24 09:58:55.396955 (XEN) Notifying guest 0:38 (virq 1, port 0)
Jun 24 09:58:55.397001 (XEN) Notifying guest 0:39 (virq 1, port 0)
Jun 24 09:58:55.408891 (XEN) Notifying guest 0:40 (virq 1, port 0)
Jun 24 09:58:55.408951 (XEN) Notifying guest 0:41 (virq 1, port 0)
Jun 24 09:58:55.408997 (XEN) Notifying guest 0:42 (virq 1, port 0)
Jun 24 09:58:55.420886 (XEN) Notifying guest 0:43 (virq 1, port 0)
Jun 24 09:58:55.420947 (XEN) Notifying guest 0:44 (virq 1, port 0)
Jun 24 09:58:55.420992 (XEN) Notifying guest 0:45 (virq 1, port 0)
Jun 24 09:58:55.421036 (XEN) Notifying guest 0:46 (virq 1, port 0)
Jun 24 09:58:55.432893 (XEN) Notifying guest 0:47 (virq 1, port 0)
Jun 24 09:58:55.432952 (XEN) Notifying guest 0:48 (virq 1, port 0)
Jun 24 09:58:55.432997 (XEN) Notifying guest 0:49 (virq 1, port 0)
Jun 24 09:58:55.444889 (XEN) Notifying guest 0:50 (virq 1, port 0)
Jun 24 09:58:55.444948 (XEN) Notifying guest 0:51 (virq 1, port 0)
Jun 24 09:58:55.444993 (XEN) Notifying guest 0:52 (virq 1, port 0)
Jun 24 09:58:55.456887 (XEN) Notifying guest 0:53 (virq 1, port 0)
Jun 24 09:58:55.456946 (XEN) Notifying guest 0:54 (virq 1, port 0)
Jun 24 09:58:55.456991 (XEN) Notifying guest 0:55 (virq 1, port 0)
Jun 24 09:58:55.468896 (XEN) Notifying guest 0:56 (virq 1, port 0)
Jun 24 09:58:55.468955 (XEN) Notifying guest 0:57 (virq 1, port 0)
Jun 24 09:58:55.469001 (XEN) Notifying guest 0:58 (virq 1, port 0)
Jun 24 09:58:55.480903 (XEN) Notifying guest 0:59 (virq 1, port 0)
Jun 24 09:58:55.480963 (XEN) Notifying guest 0:60 (virq 1, port 0)
Jun 24 09:58:55.481008 (XEN) Notifying guest 0:61 (virq 1, port 0)
Jun 24 09:58:55.492883 (XEN) Notifying guest 0:62 (virq 1, port 0)
Jun 24 09:58:55.492931 (XEN) Notifying guest 0:63 (virq 1, port 0)
Jun 24 09:58:55.492969 (XEN) Notifying guest 0:64 (virq 1, port 0)
Jun 24 09:58:55.504909 (XEN) Notifying guest 0:65 (virq 1, port 0)
Jun 24 09:58:55.504969 (XEN) Notifying guest 0:66 (virq 1, port 0)
Jun 24 09:58:55.505015 (XEN) Notifying guest 0:67 (virq 1, port 0)
Jun 24 09:58:55.516930 (XEN) Notifying guest 0:68 (virq 1, port 0)
Jun 24 09:58:55.516988 (XEN) Notifying guest 0:69 (virq 1, port 0)
Jun 24 09:58:55.517034 (XEN) Notifying guest 0:70 (virq 1, port 0)
Jun 24 09:58:55.528925 (XEN) Notifying guest 0:71 (virq 1, port 0)
Jun 24 09:58:55.528983 (XEN) Notifying guest 0:72 (virq 1, port 0)
Jun 24 09:58:55.529028 (XEN) Notifying guest 0:73 (virq 1, port 0)
Jun 24 09:58:55.540858 (XEN) Notifying guest 0:74 (virq 1, port 0)
Jun 24 09:58:55.540917 (XEN) Notifying guest 0:75 (virq 1, port 0)
Jun 24 09:58:55.540963 (XEN) Notifying guest 0:76 (virq 1, port 0)
Jun 24 09:58:55.552899 (XEN) Notifying guest 0:77 (virq 1, port 0)
Jun 24 09:58:55.552958 (XEN) Notifying guest 0:78 (virq 1, port 0)
Jun 24 09:58:55.553003 (XEN) Notifying guest 0:79 (virq 1, port 0)
Jun 24 09:58:55.564907 (XEN) Notifying guest 0:80 (virq 1, port 0)
Jun 24 09:58:55.564965 (XEN) Notifying guest 0:81 (virq 1, port 0)
Jun 24 09:58:55.565011 (XEN) Notifying guest 0:82 (virq 1, port 0)
Jun 24 09:58:55.576969 (XEN) Notifying guest 0:83 (virq 1, port 0)
Jun 24 09:58:55.577029 (XEN) Notifying guest 0:84 (virq 1, port 0)
Jun 24 09:58:55.577075 (XEN) Notifying guest 0:85 (virq 1, port 0)
Jun 24 09:58:55.592908 (XEN) Notifying guest 0:86 (virq 1, port 0)
Jun 24 09:58:55.592969 (XEN) Notifying guest 0:87 (virq 1, port 0)
Jun 24 09:58:55.593016 (XEN) Notifying guest 0:88 (virq 1, port 0)
Jun 24 09:58:55.593060 (XEN) Notifying guest 0:89 (virq 1, port 0)
Jun 24 09:58:55.604898 (XEN) Notifying guest 0:90 (virq 1, port 0)
Jun 24 09:58:55.604959 (XEN) Notifying guest 0:91 (virq 1, port 0)
Jun 24 09:58:55.605005 (XEN) Notifying guest 0:92 (virq 1, port 0)
Jun 24 09:58:55.616882 (XEN) Notifying guest 0:93 (virq 1, port 0)
Jun 24 09:58:55.616943 (XEN) Notifying guest 0:94 (virq 1, port 0)
Jun 24 09:58:55.616990 (XEN) Notifying guest 0:95 (virq 1, port 0)
Jun 24 09:58:55.628820 Jun 24 09:59:02.124532 <client 0x1a615f0 connected - now 1 clients>
(XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input)
Jun 24 09:59:02.148935 Jun 24 09:59:02.150314 <client 0x1a615f0 disconnected - now 0 clients>