Jun 24 17:38:50.463207 (XEN) VCPU81: CPU50 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.472799 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.472858 (XEN) GICH_LRs (vcpu 81) mask=0 Jun 24 17:38:50.472902 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.484782 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.484860 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.484903 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.484945 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.484986 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.485027 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.496785 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.496840 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.496882 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.496922 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.496963 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.497026 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.508825 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.508881 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.508924 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.508965 (XEN) No periodic timer Jun 24 17:38:50.509030 (XEN) UNIT82 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.520827 (XEN) VCPU82: CPU67 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.520891 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.520936 (XEN) GICH_LRs (vcpu 82) mask=0 Jun 24 17:38:50.532779 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.532856 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.532899 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.532940 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.532980 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.544829 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.544907 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.544950 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.544991 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.545031 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.545069 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.556822 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.556879 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.556921 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.556961 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.557002 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.557065 (XEN) No periodic timer Jun 24 17:38:50.568808 (XEN) UNIT83 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.568871 (XEN) VCPU83: CPU95 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.580840 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.580898 (XEN) GICH_LRs (vcpu 83) mask=0 Jun 24 17:38:50.580964 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.581006 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.581046 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.592846 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.592902 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.592966 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.593008 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.593048 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.593088 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.604836 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.604891 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.604955 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.604996 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.605036 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.616825 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.616883 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.616947 (XEN) No periodic timer Jun 24 17:38:50.616990 (XEN) UNIT84 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.617035 (XEN) VCPU84: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.628824 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.628881 (XEN) GICH_LRs (vcpu 84) mask=0 Jun 24 17:38:50.628947 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.640834 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.640890 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.640932 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.640972 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.641036 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.641079 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.652831 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.652887 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.652929 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.652992 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.653034 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.653075 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.664829 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.664885 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.664969 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.665013 (XEN) No periodic timer Jun 24 17:38:50.665054 (XEN) UNIT85 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.676821 (XEN) VCPU85: CPU33 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.676885 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.676953 (XEN) GICH_LRs (vcpu 85) mask=0 Jun 24 17:38:50.688819 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.688874 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.688915 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.688956 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.700826 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.700882 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.700924 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.700965 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.701006 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.701068 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.712848 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.712913 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.712956 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.712997 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.713059 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.713101 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.724907 (XEN) No periodic timer Jun 24 17:38:50.724984 (XEN) UNIT86 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.725033 (XEN) VCPU86: CPU16 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.736865 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.736922 (XEN) GICH_LRs (vcpu 86) mask=0 Jun 24 17:38:50.736967 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.737030 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.748898 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.748954 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.748996 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.749038 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.749101 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.749143 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.760900 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.760956 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.760998 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.761061 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.761103 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.761143 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.772889 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.772946 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.773010 (XEN) No periodic timer Jun 24 17:38:50.773052 (XEN) UNIT87 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.773098 (XEN) VCPU87: CPU51 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.784904 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.784962 (XEN) GICH_LRs (vcpu 87) mask=0 Jun 24 17:38:50.785027 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.796898 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.796953 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.796995 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.797036 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.797099 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.797140 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.808893 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.808948 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.808990 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.809053 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.809095 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.809135 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.820893 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.820948 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.821012 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.821055 (XEN) No periodic timer Jun 24 17:38:50.832894 (XEN) UNIT88 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.832959 (XEN) VCPU88: CPU80 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.833012 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.844895 (XEN) GICH_LRs (vcpu 88) mask=0 Jun 24 17:38:50.844955 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.844998 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.845040 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.845082 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.856905 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.856962 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.857005 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.857046 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.857089 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.857154 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.868915 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.868972 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.869017 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.869058 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.869121 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.869164 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.880834 (XEN) No periodic timer Jun 24 17:38:50.880897 (XEN) UNIT89 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.880946 (XEN) VCPU89: CPU68 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.892921 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.892981 (XEN) GICH_LRs (vcpu 89) mask=0 Jun 24 17:38:50.893026 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.893069 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.904913 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.904990 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.905033 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.905074 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.905113 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.905153 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.916912 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.917000 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.917047 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.917088 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.917129 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.917170 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.928896 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.928951 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.928994 (XEN) No periodic timer Jun 24 17:38:50.929036 (XEN) UNIT90 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.929082 (XEN) VCPU90: CPU3 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.940907 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:50.941028 (XEN) GICH_LRs (vcpu 90) mask=0 Jun 24 17:38:50.952894 (XEN) VCPU_LR[0]=0 Jun 24 17:38:50.952950 (XEN) VCPU_LR[1]=0 Jun 24 17:38:50.952991 (XEN) VCPU_LR[2]=0 Jun 24 17:38:50.953060 (XEN) VCPU_LR[3]=0 Jun 24 17:38:50.953102 (XEN) VCPU_LR[4]=0 Jun 24 17:38:50.953142 (XEN) VCPU_LR[5]=0 Jun 24 17:38:50.964903 (XEN) VCPU_LR[6]=0 Jun 24 17:38:50.964958 (XEN) VCPU_LR[7]=0 Jun 24 17:38:50.965000 (XEN) VCPU_LR[8]=0 Jun 24 17:38:50.965042 (XEN) VCPU_LR[9]=0 Jun 24 17:38:50.965083 (XEN) VCPU_LR[10]=0 Jun 24 17:38:50.965125 (XEN) VCPU_LR[11]=0 Jun 24 17:38:50.976903 (XEN) VCPU_LR[12]=0 Jun 24 17:38:50.976959 (XEN) VCPU_LR[13]=0 Jun 24 17:38:50.977001 (XEN) VCPU_LR[14]=0 Jun 24 17:38:50.977043 (XEN) VCPU_LR[15]=0 Jun 24 17:38:50.977085 (XEN) No periodic timer Jun 24 17:38:50.988895 (XEN) UNIT91 affinities: hard={0-95} soft={0-95} Jun 24 17:38:50.988957 (XEN) VCPU91: CPU18 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:50.989008 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:51.000903 (XEN) GICH_LRs (vcpu 91) mask=0 Jun 24 17:38:51.000961 (XEN) VCPU_LR[0]=0 Jun 24 17:38:51.001005 (XEN) VCPU_LR[1]=0 Jun 24 17:38:51.001048 (XEN) VCPU_LR[2]=0 Jun 24 17:38:51.001089 (XEN) VCPU_LR[3]=0 Jun 24 17:38:51.012839 (XEN) VCPU_LR[4]=0 Jun 24 17:38:51.012869 (XEN) VCPU_LR[5]=0 Jun 24 17:38:51.012892 (XEN) VCPU_LR[6]=0 Jun 24 17:38:51.012915 (XEN) VCPU_LR[7]=0 Jun 24 17:38:51.012937 (XEN) VCPU_LR[8]=0 Jun 24 17:38:51.012960 (XEN) VCPU_LR[9]=0 Jun 24 17:38:51.024898 (XEN) VCPU_LR[10]=0 Jun 24 17:38:51.024953 (XEN) VCPU_LR[11]=0 Jun 24 17:38:51.024996 (XEN) VCPU_LR[12]=0 Jun 24 17:38:51.025037 (XEN) VCPU_LR[13]=0 Jun 24 17:38:51.025078 (XEN) VCPU_LR[14]=0 Jun 24 17:38:51.025118 (XEN) VCPU_LR[15]=0 Jun 24 17:38:51.036899 (XEN) No periodic timer Jun 24 17:38:51.036956 (XEN) UNIT92 affinities: hard={0-95} soft={0-95} Jun 24 17:38:51.037004 (XEN) VCPU92: CPU34 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:51.048904 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:51.048963 (XEN) GICH_LRs (vcpu 92) mask=0 Jun 24 17:38:51.049008 (XEN) VCPU_LR[0]=0 Jun 24 17:38:51.049050 (XEN) VCPU_LR[1]=0 Jun 24 17:38:51.060904 (XEN) VCPU_LR[2]=0 Jun 24 17:38:51.060960 (XEN) VCPU_LR[3]=0 Jun 24 17:38:51.061002 (XEN) VCPU_LR[4]=0 Jun 24 17:38:51.061042 (XEN) VCPU_LR[5]=0 Jun 24 17:38:51.061098 (XEN) VCPU_LR[6]=0 Jun 24 17:38:51.061142 (XEN) VCPU_LR[7]=0 Jun 24 17:38:51.072890 (XEN) VCPU_LR[8]=0 Jun 24 17:38:51.072945 (XEN) VCPU_LR[9]=0 Jun 24 17:38:51.072988 (XEN) VCPU_LR[10]=0 Jun 24 17:38:51.073029 (XEN) VCPU_LR[11]=0 Jun 24 17:38:51.073070 (XEN) VCPU_LR[12]=0 Jun 24 17:38:51.084899 (XEN) VCPU_LR[13]=0 Jun 24 17:38:51.084956 (XEN) VCPU_LR[14]=0 Jun 24 17:38:51.084999 (XEN) VCPU_LR[15]=0 Jun 24 17:38:51.085042 (XEN) No periodic timer Jun 24 17:38:51.085084 (XEN) UNIT93 affinities: hard={0-95} soft={0-95} Jun 24 17:38:51.096901 (XEN) VCPU93: CPU53 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:51.096964 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:51.097010 (XEN) GICH_LRs (vcpu 93) mask=0 Jun 24 17:38:51.108906 (XEN) VCPU_LR[0]=0 Jun 24 17:38:51.108962 (XEN) VCPU_LR[1]=0 Jun 24 17:38:51.109004 (XEN) VCPU_LR[2]=0 Jun 24 17:38:51.109046 (XEN) VCPU_LR[3]=0 Jun 24 17:38:51.109086 (XEN) VCPU_LR[4]=0 Jun 24 17:38:51.120903 (XEN) VCPU_LR[5]=0 Jun 24 17:38:51.120958 (XEN) VCPU_LR[6]=0 Jun 24 17:38:51.121000 (XEN) VCPU_LR[7]=0 Jun 24 17:38:51.121041 (XEN) VCPU_LR[8]=0 Jun 24 17:38:51.121081 (XEN) VCPU_LR[9]=0 Jun 24 17:38:51.121122 (XEN) VCPU_LR[10]=0 Jun 24 17:38:51.132890 (XEN) VCPU_LR[11]=0 Jun 24 17:38:51.132945 (XEN) VCPU_LR[12]=0 Jun 24 17:38:51.132988 (XEN) VCPU_LR[13]=0 Jun 24 17:38:51.133029 (XEN) VCPU_LR[14]=0 Jun 24 17:38:51.133069 (XEN) VCPU_LR[15]=0 Jun 24 17:38:51.133110 (XEN) No periodic timer Jun 24 17:38:51.144897 (XEN) UNIT94 affinities: hard={0-95} soft={0-95} Jun 24 17:38:51.144958 (XEN) VCPU94: CPU69 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:51.145009 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:51.156898 (XEN) GICH_LRs (vcpu 94) mask=0 Jun 24 17:38:51.156956 (XEN) VCPU_LR[0]=0 Jun 24 17:38:51.156998 (XEN) VCPU_LR[1]=0 Jun 24 17:38:51.157039 (XEN) VCPU_LR[2]=0 Jun 24 17:38:51.157079 (XEN) VCPU_LR[3]=0 Jun 24 17:38:51.168910 (XEN) VCPU_LR[4]=0 Jun 24 17:38:51.168966 (XEN) VCPU_LR[5]=0 Jun 24 17:38:51.169007 (XEN) VCPU_LR[6]=0 Jun 24 17:38:51.169047 (XEN) VCPU_LR[7]=0 Jun 24 17:38:51.169087 (XEN) VCPU_LR[8]=0 Jun 24 17:38:51.169127 (XEN) VCPU_LR[9]=0 Jun 24 17:38:51.180906 (XEN) VCPU_LR[10]=0 Jun 24 17:38:51.180961 (XEN) VCPU_LR[11]=0 Jun 24 17:38:51.181003 (XEN) VCPU_LR[12]=0 Jun 24 17:38:51.181043 (XEN) VCPU_LR[13]=0 Jun 24 17:38:51.181084 (XEN) VCPU_LR[14]=0 Jun 24 17:38:51.192901 (XEN) VCPU_LR[15]=0 Jun 24 17:38:51.192957 (XEN) No periodic timer Jun 24 17:38:51.192999 (XEN) UNIT95 affinities: hard={0-95} soft={0-95} Jun 24 17:38:51.193046 (XEN) VCPU95: CPU81 [has=F] poll=0 upcall_pend=00 upcall_mask=01 Jun 24 17:38:51.204906 (XEN) pause_count=0 pause_flags=1 Jun 24 17:38:51.204963 (XEN) GICH_LRs (vcpu 95) mask=0 Jun 24 17:38:51.205007 (XEN) VCPU_LR[0]=0 Jun 24 17:38:51.216910 (XEN) VCPU_LR[1]=0 Jun 24 17:38:51.216964 (XEN) VCPU_LR[2]=0 Jun 24 17:38:51.217005 (XEN) VCPU_LR[3]=0 Jun 24 17:38:51.217046 (XEN) VCPU_LR[4]=0 Jun 24 17:38:51.217086 (XEN) VCPU_LR[5]=0 Jun 24 17:38:51.217127 (XEN) VCPU_LR[6]=0 Jun 24 17:38:51.228809 (XEN) VCPU_LR[7]=0 Jun 24 17:38:51.228858 (XEN) VCPU_LR[8]=0 Jun 24 17:38:51.228901 (XEN) VCPU_LR[9]=0 Jun 24 17:38:51.228942 (XEN) VCPU_LR[10]=0 Jun 24 17:38:51.228982 (XEN) VCPU_LR[11]=0 Jun 24 17:38:51.229022 (XEN) VCPU_LR[12]=0 Jun 24 17:38:51.240897 (XEN) VCPU_LR[13]=0 Jun 24 17:38:51.240952 (XEN) VCPU_LR[14]=0 Jun 24 17:38:51.240994 (XEN) VCPU_LR[15]=0 Jun 24 17:38:51.241035 (XEN) No periodic timer Jun 24 17:38:51.241076 (XEN) Notifying guest 0:0 (virq 1, port 0) Jun 24 17:38:51.252908 (XEN) Notifying guest 0:1 (virq 1, port 0) Jun 24 17:38:51.252968 (XEN) Notifying guest 0:2 (virq 1, port 0) Jun 24 17:38:51.253012 (XEN) Notifying guest 0:3 (virq 1, port 0) Jun 24 17:38:51.264913 (XEN) Notifying guest 0:4 (virq 1, port 0) Jun 24 17:38:51.264990 (XEN) Notifying guest 0:5 (virq 1, port 0) Jun 24 17:38:51.265038 (XEN) Notifying guest 0:6 (virq 1, port 0) Jun 24 17:38:51.276894 (XEN) Notifying guest 0:7 (virq 1, port 0) Jun 24 17:38:51.276953 (XEN) Notifying guest 0:8 (virq 1, port 0) Jun 24 17:38:51.276998 (XEN) Notifying guest 0:9 (virq 1, port 0) Jun 24 17:38:51.277042 (XEN) Notifying guest 0:10 (virq 1, port 0) Jun 24 17:38:51.288903 (XEN) Notifying guest 0:11 (virq 1, port 0) Jun 24 17:38:51.288960 (XEN) Notifying guest 0:12 (virq 1, port 0) Jun 24 17:38:51.289004 (XEN) Notifying guest 0:13 (virq 1, port 0) Jun 24 17:38:51.300916 (XEN) Notifying guest 0:14 (virq 1, port 0) Jun 24 17:38:51.300974 (XEN) Notifying guest 0:15 (virq 1, port 0) Jun 24 17:38:51.301018 (XEN) Notifying guest 0:16 (virq 1, port 0) Jun 24 17:38:51.312903 (XEN) Notifying guest 0:17 (virq 1, port 0) Jun 24 17:38:51.312961 (XEN) Notifying guest 0:18 (virq 1, port 0) Jun 24 17:38:51.313005 (XEN) Notifying guest 0:19 (virq 1, port 0) Jun 24 17:38:51.324900 (XEN) Notifying guest 0:20 (virq 1, port 0) Jun 24 17:38:51.324958 (XEN) Notifying guest 0:21 (virq 1, port 0) Jun 24 17:38:51.336899 (XEN) Notifying guest 0:22 (virq 1, port 0) Jun 24 17:38:51.336959 (XEN) Notifying guest 0:23 (virq 1, port 0) Jun 24 17:38:51.337004 (XEN) Notifying guest 0:24 (virq 1, port 0) Jun 24 17:38:51.348898 (XEN) Notifying guest 0:25 (virq 1, port 0) Jun 24 17:38:51.348957 (XEN) Notifying guest 0:26 (virq 1, port 0) Jun 24 17:38:51.349003 (XEN) Notifying guest 0:27 (virq 1, port 0) Jun 24 17:38:51.349047 (XEN) Notifying guest 0:28 (virq 1, port 0) Jun 24 17:38:51.360910 (XEN) Notifying guest 0:29 (virq 1, port 0) Jun 24 17:38:51.360968 (XEN) Notifying guest 0:30 (virq 1, port 0) Jun 24 17:38:51.361012 (XEN) Notifying guest 0:31 (virq 1, port 0) Jun 24 17:38:51.372909 (XEN) Notifying guest 0:32 (virq 1, port 0) Jun 24 17:38:51.372967 (XEN) Notifying guest 0:33 (virq 1, port 0) Jun 24 17:38:51.373011 (XEN) Notifying guest 0:34 (virq 1, port 0) Jun 24 17:38:51.384904 (XEN) Notifying guest 0:35 (virq 1, port 0) Jun 24 17:38:51.384963 (XEN) Notifying guest 0:36 (virq 1, port 0) Jun 24 17:38:51.385007 (XEN) Notifying guest 0:37 (virq 1, port 0) Jun 24 17:38:51.396899 (XEN) Notifying guest 0:38 (virq 1, port 0) Jun 24 17:38:51.396957 (XEN) Notifying guest 0:39 (virq 1, port 0) Jun 24 17:38:51.397002 (XEN) Notifying guest 0:40 (virq 1, port 0) Jun 24 17:38:51.408903 (XEN) Notifying guest 0:41 (virq 1, port 0) Jun 24 17:38:51.408962 (XEN) Notifying guest 0:42 (virq 1, port 0) Jun 24 17:38:51.409006 (XEN) Notifying guest 0:43 (virq 1, port 0) Jun 24 17:38:51.420909 (XEN) Notifying guest 0:44 (virq 1, port 0) Jun 24 17:38:51.420967 (XEN) Notifying guest 0:45 (virq 1, port 0) Jun 24 17:38:51.421012 (XEN) Notifying guest 0:46 (virq 1, port 0) Jun 24 17:38:51.432903 (XEN) Notifying guest 0:47 (virq 1, port 0) Jun 24 17:38:51.432961 (XEN) Notifying guest 0:48 (virq 1, port 0) Jun 24 17:38:51.433006 (XEN) Notifying guest 0:49 (virq 1, port 0) Jun 24 17:38:51.444905 (XEN) Notifying guest 0:50 (virq 1, port 0) Jun 24 17:38:51.444964 (XEN) Notifying guest 0:51 (virq 1, port 0) Jun 24 17:38:51.445010 (XEN) Notifying guest 0:52 (virq 1, port 0) Jun 24 17:38:51.456888 (XEN) Notifying guest 0:53 (virq 1, port 0) Jun 24 17:38:51.456947 (XEN) Notifying guest 0:54 (virq 1, port 0) Jun 24 17:38:51.456992 (XEN) Notifying guest 0:55 (virq 1, port 0) Jun 24 17:38:51.468902 (XEN) Notifying guest 0:56 (virq 1, port 0) Jun 24 17:38:51.468960 (XEN) Notifying guest 0:57 (virq 1, port 0) Jun 24 17:38:51.469005 (XEN) Notifying guest 0:58 (virq 1, port 0) Jun 24 17:38:51.480917 (XEN) Notifying guest 0:59 (virq 1, port 0) Jun 24 17:38:51.480976 (XEN) Notifying guest 0:60 (virq 1, port 0) Jun 24 17:38:51.481021 (XEN) Notifying guest 0:61 (virq 1, port 0) Jun 24 17:38:51.492896 (XEN) Notifying guest 0:62 (virq 1, port 0) Jun 24 17:38:51.492955 (XEN) Notifying guest 0:63 (virq 1, port 0) Jun 24 17:38:51.493000 (XEN) Notifying guest 0:64 (virq 1, port 0) Jun 24 17:38:51.504914 (XEN) Notifying guest 0:65 (virq 1, port 0) Jun 24 17:38:51.504974 (XEN) Notifying guest 0:66 (virq 1, port 0) Jun 24 17:38:51.505019 (XEN) Notifying guest 0:67 (virq 1, port 0) Jun 24 17:38:51.516900 (XEN) Notifying guest 0:68 (virq 1, port 0) Jun 24 17:38:51.516958 (XEN) Notifying guest 0:69 (virq 1, port 0) Jun 24 17:38:51.517003 (XEN) Notifying guest 0:70 (virq 1, port 0) Jun 24 17:38:51.528909 (XEN) Notifying guest 0:71 (virq 1, port 0) Jun 24 17:38:51.528967 (XEN) Notifying guest 0:72 (virq 1, port 0) Jun 24 17:38:51.529012 (XEN) Notifying guest 0:73 (virq 1, port 0) Jun 24 17:38:51.540853 (XEN) Notifying guest 0:74 (virq 1, port 0) Jun 24 17:38:51.540912 (XEN) Notifying guest 0:75 (virq 1, port 0) Jun 24 17:38:51.540957 (XEN) Notifying guest 0:76 (virq 1, port 0) Jun 24 17:38:51.552901 (XEN) Notifying guest 0:77 (virq 1, port 0) Jun 24 17:38:51.552960 (XEN) Notifying guest 0:78 (virq 1, port 0) Jun 24 17:38:51.553005 (XEN) Notifying guest 0:79 (virq 1, port 0) Jun 24 17:38:51.564906 (XEN) Notifying guest 0:80 (virq 1, port 0) Jun 24 17:38:51.564965 (XEN) Notifying guest 0:81 (virq 1, port 0) Jun 24 17:38:51.565010 (XEN) Notifying guest 0:82 (virq 1, port 0) Jun 24 17:38:51.576905 (XEN) Notifying guest 0:83 (virq 1, port 0) Jun 24 17:38:51.576965 (XEN) Notifying guest 0:84 (virq 1, port 0) Jun 24 17:38:51.577010 (XEN) Notifying guest 0:85 (virq 1, port 0) Jun 24 17:38:51.588901 (XEN) Notifying guest 0:86 (virq 1, port 0) Jun 24 17:38:51.588960 (XEN) Notifying guest 0:87 (virq 1, port 0) Jun 24 17:38:51.589005 (XEN) Notifying guest 0:88 (virq 1, port 0) Jun 24 17:38:51.600901 (XEN) Notifying guest 0:89 (virq 1, port 0) Jun 24 17:38:51.600959 (XEN) Notifying guest 0:90 (virq 1, port 0) Jun 24 17:38:51.601005 (XEN) Notifying guest 0:91 (virq 1, port 0) Jun 24 17:38:51.612897 (XEN) Notifying guest 0:92 (virq 1, port 0) Jun 24 17:38:51.612956 (XEN) Notifying guest 0:93 (virq 1, port 0) Jun 24 17:38:51.613002 (XEN) Notifying guest 0:94 (virq 1, port 0) Jun 24 17:38:51.624864 (XEN) Notifying guest 0:95 (virq 1, port 0) Jun 24 17:38:51.624923 Jun 24 17:38:58.117697 (XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input) Jun 24 17:38:58.139220 Jun 24 17:38:58.139951