Jun 25 00:54:13.399319 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.399684 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.399758 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.399828 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.399922 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.408667 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.408667 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.408667 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.408667 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.408667 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.408667 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.420711 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.420711 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.420711 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.420711 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.420711 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.420711 (XEN) No periodic timer
Jun 25 00:54:13.432656 (XEN)   UNIT71 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.432656 (XEN)     VCPU71: CPU81 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.444662 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.444662 (XEN) GICH_LRs (vcpu 71) mask=0
Jun 25 00:54:13.444662 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.444662 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.456664 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.456664 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.456664 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.456664 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.456664 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.456664 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.468663 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.468663 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.468663 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.468663 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.468663 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.468663 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.480664 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.480664 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.480664 (XEN) No periodic timer
Jun 25 00:54:13.480664 (XEN)   UNIT72 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.480664 (XEN)     VCPU72: CPU1 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.492659 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.492659 (XEN) GICH_LRs (vcpu 72) mask=0
Jun 25 00:54:13.492659 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.504665 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.504665 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.504665 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.504665 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.504665 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.504665 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.516663 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.516663 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.516663 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.516663 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.516663 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.528664 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.528664 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.528664 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.528664 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.528664 (XEN) No periodic timer
Jun 25 00:54:13.528664 (XEN)   UNIT73 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.540660 (XEN)     VCPU73: CPU22 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.540660 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.552663 (XEN) GICH_LRs (vcpu 73) mask=0
Jun 25 00:54:13.552663 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.552663 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.552663 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.552663 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.552663 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.564654 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.564654 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.564654 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.564654 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.564654 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.576658 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.576658 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.576658 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.576658 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.576658 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.576658 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.588661 (XEN) No periodic timer
Jun 25 00:54:13.588661 (XEN)   UNIT74 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.588661 (XEN)     VCPU74: CPU36 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.600663 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.600663 (XEN) GICH_LRs (vcpu 74) mask=0
Jun 25 00:54:13.600663 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.600663 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.612662 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.612662 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.612662 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.612662 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.612662 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.612662 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.624661 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.624661 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.624661 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.624661 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.624661 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.624661 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.636661 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.636661 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.636661 (XEN) No periodic timer
Jun 25 00:54:13.636661 (XEN)   UNIT75 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.636661 (XEN)     VCPU75: CPU63 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.648716 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.648907 (XEN) GICH_LRs (vcpu 75) mask=0
Jun 25 00:54:13.660950 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.661014 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.661056 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.661120 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.661161 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.661202 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.672909 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.672965 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.673031 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.673073 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.673115 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.673156 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.684890 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.684968 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.685014 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.685055 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.685098 (XEN) No periodic timer
Jun 25 00:54:13.696921 (XEN)   UNIT76 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.697004 (XEN)     VCPU76: CPU64 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.697056 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.708924 (XEN) GICH_LRs (vcpu 76) mask=0
Jun 25 00:54:13.708983 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.709025 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.709088 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.709131 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.720937 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.720995 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.721037 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.721101 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.721143 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.721186 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.732924 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.732981 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.733046 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.733087 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.733128 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.744912 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.744970 (XEN) No periodic timer
Jun 25 00:54:13.745037 (XEN)   UNIT77 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.745086 (XEN)     VCPU77: CPU82 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.756929 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.756989 (XEN) GICH_LRs (vcpu 77) mask=0
Jun 25 00:54:13.757034 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.757100 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.768915 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.768971 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.769014 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.769057 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.769119 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.769160 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.780923 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.780980 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.781022 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.781086 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.781128 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.781169 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.792928 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.793002 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.793069 (XEN) No periodic timer
Jun 25 00:54:13.793112 (XEN)   UNIT78 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.804912 (XEN)     VCPU78: CPU2 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.804977 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.805022 (XEN) GICH_LRs (vcpu 78) mask=0
Jun 25 00:54:13.816751 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.816781 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.816805 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.816827 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.816849 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.828850 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.828906 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.828949 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.828989 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.829029 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.829069 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.840913 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.840977 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.841020 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.841061 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.841102 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.841166 (XEN) No periodic timer
Jun 25 00:54:13.852881 (XEN)   UNIT79 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.852944 (XEN)     VCPU79: CPU23 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.852996 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.864865 (XEN) GICH_LRs (vcpu 79) mask=0
Jun 25 00:54:13.864945 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.864991 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.865034 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.865076 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.876924 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.877002 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.877048 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.877090 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.877132 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.877174 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.888929 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.888985 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.889028 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.889071 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.889114 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.900920 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.900983 (XEN) No periodic timer
Jun 25 00:54:13.901026 (XEN)   UNIT80 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.901073 (XEN)     VCPU80: CPU37 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.912931 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.912990 (XEN) GICH_LRs (vcpu 80) mask=0
Jun 25 00:54:13.913035 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.913077 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.924854 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.924909 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.924952 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.924993 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.925034 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.925075 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.936855 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.936911 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.936953 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.936995 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.937036 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.948853 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.948909 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.948952 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.948993 (XEN) No periodic timer
Jun 25 00:54:13.949035 (XEN)   UNIT81 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:13.960861 (XEN)     VCPU81: CPU48 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:13.960930 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:13.972855 (XEN) GICH_LRs (vcpu 81) mask=0
Jun 25 00:54:13.972916 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:13.972959 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:13.973000 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:13.973042 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:13.973083 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:13.984919 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:13.984975 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:13.985018 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:13.985060 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:13.985101 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:13.985159 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:13.996918 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:13.996975 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:13.997017 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:13.997059 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:13.997100 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:13.997140 (XEN) No periodic timer
Jun 25 00:54:14.008919 (XEN)   UNIT82 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.008981 (XEN)     VCPU82: CPU66 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.020914 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.020982 (XEN) GICH_LRs (vcpu 82) mask=0
Jun 25 00:54:14.021027 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.021070 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.021111 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.032929 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.032986 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.033028 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.033070 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.033111 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.033152 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.044877 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.044934 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.044977 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.045018 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.045059 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.045100 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.056879 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.056936 (XEN) No periodic timer
Jun 25 00:54:14.056980 (XEN)   UNIT83 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.057027 (XEN)     VCPU83: CPU83 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.068878 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.068936 (XEN) GICH_LRs (vcpu 83) mask=0
Jun 25 00:54:14.068981 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.080881 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.080944 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.080987 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.081028 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.081069 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.081109 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.092844 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.092900 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.092942 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.092984 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.093025 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.093067 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.104880 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.104936 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.104978 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.105019 (XEN) No periodic timer
Jun 25 00:54:14.105060 (XEN)   UNIT84 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.116884 (XEN)     VCPU84: CPU4 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.116948 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.128877 (XEN) GICH_LRs (vcpu 84) mask=0
Jun 25 00:54:14.128936 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.128978 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.129019 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.129060 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.129101 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.140930 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.140994 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.141036 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.141078 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.141119 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.141160 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.152913 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.152969 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.153011 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.153052 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.153093 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.153134 (XEN) No periodic timer
Jun 25 00:54:14.164876 (XEN)   UNIT85 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.164929 (XEN)     VCPU85: CPU38 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.176864 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.176914 (XEN) GICH_LRs (vcpu 85) mask=0
Jun 25 00:54:14.176958 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.176998 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.177038 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.188871 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.188918 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.188959 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.189017 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.189061 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.189101 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.200854 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.200901 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.200947 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.200989 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.201029 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.212871 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.212917 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.212958 (XEN) No periodic timer
Jun 25 00:54:14.213000 (XEN)   UNIT86 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.213045 (XEN)     VCPU86: CPU24 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.224872 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.224921 (XEN) GICH_LRs (vcpu 86) mask=0
Jun 25 00:54:14.236918 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.236975 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.237019 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.237059 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.237101 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.237141 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.248909 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.248966 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.249009 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.249050 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.249090 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.249130 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.260922 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.260986 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.261029 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.261072 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.261115 (XEN) No periodic timer
Jun 25 00:54:14.261156 (XEN)   UNIT87 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.272922 (XEN)     VCPU87: CPU49 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.272985 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.284922 (XEN) GICH_LRs (vcpu 87) mask=0
Jun 25 00:54:14.284980 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.285023 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.285064 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.285105 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.285145 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.296920 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.296976 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.297019 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.297060 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.297101 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.297141 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.308923 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.308979 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.309021 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.309062 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.309102 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.320911 (XEN) No periodic timer
Jun 25 00:54:14.320976 (XEN)   UNIT88 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.321025 (XEN)     VCPU88: CPU84 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.332919 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.332978 (XEN) GICH_LRs (vcpu 88) mask=0
Jun 25 00:54:14.333023 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.333065 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.344910 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.344966 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.345008 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.345049 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.345090 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.345130 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.356920 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.356976 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.357018 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.357060 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.357100 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.357141 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.368925 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.368980 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.369022 (XEN) No periodic timer
Jun 25 00:54:14.369065 (XEN)   UNIT89 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.380913 (XEN)     VCPU89: CPU67 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.380987 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.381033 (XEN) GICH_LRs (vcpu 89) mask=0
Jun 25 00:54:14.392917 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.392992 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.393038 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.393079 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.393119 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.393159 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.404922 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.404978 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.405021 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.405062 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.405102 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.405143 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.416943 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.417000 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.417059 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.417103 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.417146 (XEN) No periodic timer
Jun 25 00:54:14.417189 (XEN)   UNIT90 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.428926 (XEN)     VCPU90: CPU5 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.428990 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.440913 (XEN) GICH_LRs (vcpu 90) mask=0
Jun 25 00:54:14.440977 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.441020 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.441061 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.441102 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.441142 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.452881 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.452936 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.452979 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.453020 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.453060 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.464949 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.465006 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.465049 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.465090 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.465130 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.476911 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.476968 (XEN) No periodic timer
Jun 25 00:54:14.477012 (XEN)   UNIT91 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.477058 (XEN)     VCPU91: CPU25 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.488921 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.488979 (XEN) GICH_LRs (vcpu 91) mask=0
Jun 25 00:54:14.489024 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.489065 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.500914 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.500976 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.501018 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.501060 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.501100 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.501141 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.512923 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.512978 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.513020 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.513060 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.513101 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.513142 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.524915 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.524971 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.525013 (XEN) No periodic timer
Jun 25 00:54:14.525055 (XEN)   UNIT92 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.536918 (XEN)     VCPU92: CPU39 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.536982 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.537028 (XEN) GICH_LRs (vcpu 92) mask=0
Jun 25 00:54:14.548921 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.548977 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.549019 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.549060 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.549100 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.549140 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.560919 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.560983 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.561025 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.561065 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.561106 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.561146 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.572908 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.572965 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.573007 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.573048 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.573088 (XEN) No periodic timer
Jun 25 00:54:14.584921 (XEN)   UNIT93 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.584982 (XEN)     VCPU93: CPU50 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.585050 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.596916 (XEN) GICH_LRs (vcpu 93) mask=0
Jun 25 00:54:14.596973 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.597016 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.597057 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.608916 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.608973 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.609015 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.609056 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.609096 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.609137 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.620918 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.620981 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.621025 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.621066 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.621105 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.621145 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.632921 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.632977 (XEN) No periodic timer
Jun 25 00:54:14.633020 (XEN)   UNIT94 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.633068 (XEN)     VCPU94: CPU68 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.644924 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.644982 (XEN) GICH_LRs (vcpu 94) mask=0
Jun 25 00:54:14.645026 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.645068 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.656927 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.656982 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.657024 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.657065 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.657106 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.657146 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.668922 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.668977 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.669019 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.669060 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.669101 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.669141 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.680921 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.680985 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.681028 (XEN) No periodic timer
Jun 25 00:54:14.681071 (XEN)   UNIT95 affinities: hard={0-95} soft={0-95}
Jun 25 00:54:14.692924 (XEN)     VCPU95: CPU85 [has=F] poll=0 upcall_pend=00 upcall_mask=01 
Jun 25 00:54:14.692989 (XEN)     pause_count=0 pause_flags=1
Jun 25 00:54:14.693035 (XEN) GICH_LRs (vcpu 95) mask=0
Jun 25 00:54:14.704905 (XEN)    VCPU_LR[0]=0
Jun 25 00:54:14.704961 (XEN)    VCPU_LR[1]=0
Jun 25 00:54:14.705003 (XEN)    VCPU_LR[2]=0
Jun 25 00:54:14.705044 (XEN)    VCPU_LR[3]=0
Jun 25 00:54:14.705084 (XEN)    VCPU_LR[4]=0
Jun 25 00:54:14.716924 (XEN)    VCPU_LR[5]=0
Jun 25 00:54:14.716980 (XEN)    VCPU_LR[6]=0
Jun 25 00:54:14.717021 (XEN)    VCPU_LR[7]=0
Jun 25 00:54:14.717062 (XEN)    VCPU_LR[8]=0
Jun 25 00:54:14.717103 (XEN)    VCPU_LR[9]=0
Jun 25 00:54:14.717144 (XEN)    VCPU_LR[10]=0
Jun 25 00:54:14.728918 (XEN)    VCPU_LR[11]=0
Jun 25 00:54:14.728974 (XEN)    VCPU_LR[12]=0
Jun 25 00:54:14.729016 (XEN)    VCPU_LR[13]=0
Jun 25 00:54:14.729057 (XEN)    VCPU_LR[14]=0
Jun 25 00:54:14.729097 (XEN)    VCPU_LR[15]=0
Jun 25 00:54:14.729138 (XEN) No periodic timer
Jun 25 00:54:14.740921 (XEN) Notifying guest 0:0 (virq 1, port 0)
Jun 25 00:54:14.740989 (XEN) Notifying guest 0:1 (virq 1, port 0)
Jun 25 00:54:14.741036 (XEN) Notifying guest 0:2 (virq 1, port 0)
Jun 25 00:54:14.752916 (XEN) Notifying guest 0:3 (virq 1, port 0)
Jun 25 00:54:14.752976 (XEN) Notifying guest 0:4 (virq 1, port 0)
Jun 25 00:54:14.753021 (XEN) Notifying guest 0:5 (virq 1, port 0)
Jun 25 00:54:14.764912 (XEN) Notifying guest 0:6 (virq 1, port 0)
Jun 25 00:54:14.764972 (XEN) Notifying guest 0:7 (virq 1, port 0)
Jun 25 00:54:14.765018 (XEN) Notifying guest 0:8 (virq 1, port 0)
Jun 25 00:54:14.776909 (XEN) Notifying guest 0:9 (virq 1, port 0)
Jun 25 00:54:14.776971 (XEN) Notifying guest 0:10 (virq 1, port 0)
Jun 25 00:54:14.777016 (XEN) Notifying guest 0:11 (virq 1, port 0)
Jun 25 00:54:14.777060 (XEN) Notifying guest 0:12 (virq 1, port 0)
Jun 25 00:54:14.788923 (XEN) Notifying guest 0:13 (virq 1, port 0)
Jun 25 00:54:14.788982 (XEN) Notifying guest 0:14 (virq 1, port 0)
Jun 25 00:54:14.789046 (XEN) Notifying guest 0:15 (virq 1, port 0)
Jun 25 00:54:14.800933 (XEN) Notifying guest 0:16 (virq 1, port 0)
Jun 25 00:54:14.801000 (XEN) Notifying guest 0:17 (virq 1, port 0)
Jun 25 00:54:14.801046 (XEN) Notifying guest 0:18 (virq 1, port 0)
Jun 25 00:54:14.812930 (XEN) Notifying guest 0:19 (virq 1, port 0)
Jun 25 00:54:14.812989 (XEN) Notifying guest 0:20 (virq 1, port 0)
Jun 25 00:54:14.813034 (XEN) Notifying guest 0:21 (virq 1, port 0)
Jun 25 00:54:14.824926 (XEN) Notifying guest 0:22 (virq 1, port 0)
Jun 25 00:54:14.824985 (XEN) Notifying guest 0:23 (virq 1, port 0)
Jun 25 00:54:14.825030 (XEN) Notifying guest 0:24 (virq 1, port 0)
Jun 25 00:54:14.836912 (XEN) Notifying guest 0:25 (virq 1, port 0)
Jun 25 00:54:14.836971 (XEN) Notifying guest 0:26 (virq 1, port 0)
Jun 25 00:54:14.837017 (XEN) Notifying guest 0:27 (virq 1, port 0)
Jun 25 00:54:14.848920 (XEN) Notifying guest 0:28 (virq 1, port 0)
Jun 25 00:54:14.848978 (XEN) Notifying guest 0:29 (virq 1, port 0)
Jun 25 00:54:14.849024 (XEN) Notifying guest 0:30 (virq 1, port 0)
Jun 25 00:54:14.860925 (XEN) Notifying guest 0:31 (virq 1, port 0)
Jun 25 00:54:14.860993 (XEN) Notifying guest 0:32 (virq 1, port 0)
Jun 25 00:54:14.861039 (XEN) Notifying guest 0:33 (virq 1, port 0)
Jun 25 00:54:14.872886 (XEN) Notifying guest 0:34 (virq 1, port 0)
Jun 25 00:54:14.872946 (XEN) Notifying guest 0:35 (virq 1, port 0)
Jun 25 00:54:14.872991 (XEN) Notifying guest 0:36 (virq 1, port 0)
Jun 25 00:54:14.884924 (XEN) Notifying guest 0:37 (virq 1, port 0)
Jun 25 00:54:14.884983 (XEN) Notifying guest 0:38 (virq 1, port 0)
Jun 25 00:54:14.885028 (XEN) Notifying guest 0:39 (virq 1, port 0)
Jun 25 00:54:14.896946 (XEN) Notifying guest 0:40 (virq 1, port 0)
Jun 25 00:54:14.897005 (XEN) Notifying guest 0:41 (virq 1, port 0)
Jun 25 00:54:14.897049 (XEN) Notifying guest 0:42 (virq 1, port 0)
Jun 25 00:54:14.908926 (XEN) Notifying guest 0:43 (virq 1, port 0)
Jun 25 00:54:14.908985 (XEN) Notifying guest 0:44 (virq 1, port 0)
Jun 25 00:54:14.909031 (XEN) Notifying guest 0:45 (virq 1, port 0)
Jun 25 00:54:14.920922 (XEN) Notifying guest 0:46 (virq 1, port 0)
Jun 25 00:54:14.920987 (XEN) Notifying guest 0:47 (virq 1, port 0)
Jun 25 00:54:14.921034 (XEN) Notifying guest 0:48 (virq 1, port 0)
Jun 25 00:54:14.932926 (XEN) Notifying guest 0:49 (virq 1, port 0)
Jun 25 00:54:14.932985 (XEN) Notifying guest 0:50 (virq 1, port 0)
Jun 25 00:54:14.933031 (XEN) Notifying guest 0:51 (virq 1, port 0)
Jun 25 00:54:14.944925 (XEN) Notifying guest 0:52 (virq 1, port 0)
Jun 25 00:54:14.944984 (XEN) Notifying guest 0:53 (virq 1, port 0)
Jun 25 00:54:14.945029 (XEN) Notifying guest 0:54 (virq 1, port 0)
Jun 25 00:54:14.956903 (XEN) Notifying guest 0:55 (virq 1, port 0)
Jun 25 00:54:14.956962 (XEN) Notifying guest 0:56 (virq 1, port 0)
Jun 25 00:54:14.957008 (XEN) Notifying guest 0:57 (virq 1, port 0)
Jun 25 00:54:14.968928 (XEN) Notifying guest 0:58 (virq 1, port 0)
Jun 25 00:54:14.968987 (XEN) Notifying guest 0:59 (virq 1, port 0)
Jun 25 00:54:14.969032 (XEN) Notifying guest 0:60 (virq 1, port 0)
Jun 25 00:54:14.980918 (XEN) Notifying guest 0:61 (virq 1, port 0)
Jun 25 00:54:14.980977 (XEN) Notifying guest 0:62 (virq 1, port 0)
Jun 25 00:54:14.981031 (XEN) Notifying guest 0:63 (virq 1, port 0)
Jun 25 00:54:14.992925 (XEN) Notifying guest 0:64 (virq 1, port 0)
Jun 25 00:54:14.992984 (XEN) Notifying guest 0:65 (virq 1, port 0)
Jun 25 00:54:14.993029 (XEN) Notifying guest 0:66 (virq 1, port 0)
Jun 25 00:54:15.004914 (XEN) Notifying guest 0:67 (virq 1, port 0)
Jun 25 00:54:15.004974 (XEN) Notifying guest 0:68 (virq 1, port 0)
Jun 25 00:54:15.005019 (XEN) Notifying guest 0:69 (virq 1, port 0)
Jun 25 00:54:15.016921 (XEN) Notifying guest 0:70 (virq 1, port 0)
Jun 25 00:54:15.016981 (XEN) Notifying guest 0:71 (virq 1, port 0)
Jun 25 00:54:15.017026 (XEN) Notifying guest 0:72 (virq 1, port 0)
Jun 25 00:54:15.028913 (XEN) Notifying guest 0:73 (virq 1, port 0)
Jun 25 00:54:15.028973 (XEN) Notifying guest 0:74 (virq 1, port 0)
Jun 25 00:54:15.029036 (XEN) Notifying guest 0:75 (virq 1, port 0)
Jun 25 00:54:15.040926 (XEN) Notifying guest 0:76 (virq 1, port 0)
Jun 25 00:54:15.040993 (XEN) Notifying guest 0:77 (virq 1, port 0)
Jun 25 00:54:15.041039 (XEN) Notifying guest 0:78 (virq 1, port 0)
Jun 25 00:54:15.052919 (XEN) Notifying guest 0:79 (virq 1, port 0)
Jun 25 00:54:15.052979 (XEN) Notifying guest 0:80 (virq 1, port 0)
Jun 25 00:54:15.053026 (XEN) Notifying guest 0:81 (virq 1, port 0)
Jun 25 00:54:15.064921 (XEN) Notifying guest 0:82 (virq 1, port 0)
Jun 25 00:54:15.064981 (XEN) Notifying guest 0:83 (virq 1, port 0)
Jun 25 00:54:15.065027 (XEN) Notifying guest 0:84 (virq 1, port 0)
Jun 25 00:54:15.076907 (XEN) Notifying guest 0:85 (virq 1, port 0)
Jun 25 00:54:15.076968 (XEN) Notifying guest 0:86 (virq 1, port 0)
Jun 25 00:54:15.077013 (XEN) Notifying guest 0:87 (virq 1, port 0)
Jun 25 00:54:15.088868 (XEN) Notifying guest 0:88 (virq 1, port 0)
Jun 25 00:54:15.088930 (XEN) Notifying guest 0:89 (virq 1, port 0)
Jun 25 00:54:15.088975 (XEN) Notifying guest 0:90 (virq 1, port 0)
Jun 25 00:54:15.100911 (XEN) Notifying guest 0:91 (virq 1, port 0)
Jun 25 00:54:15.100971 (XEN) Notifying guest 0:92 (virq 1, port 0)
Jun 25 00:54:15.101024 (XEN) Notifying guest 0:93 (virq 1, port 0)
Jun 25 00:54:15.112920 (XEN) Notifying guest 0:94 (virq 1, port 0)
Jun 25 00:54:15.112980 (XEN) Notifying guest 0:95 (virq 1, port 0)
Jun 25 00:54:15.113026 Jun 25 00:54:21.626431 <client 0x195a580 connected - now 1 clients>
(XEN) *** Serial input to DOM0 (type 'CTRL-x' three times to switch input)
Jun 25 00:54:21.648897 


Jun 25 00:54:21.648947 rochester0 login: 
Jun 25 00:54:21.650659 <client 0x195a580 disconnected - now 0 clients>